10:08:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:08:44:ST3_Shared:INFO:	                         FEB-Sensor                         
10:08:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:09:50:ST3_ModuleSelector:INFO:	L7DL500123 M7DL5T2001232A2 62 C

10:09:50:ST3_ModuleSelector:INFO:	15453

10:09:50:febtest:INFO:	Testing FEB with SN 2208
10:09:52:smx_tester:INFO:	Scanning setup
10:09:52:elinks:INFO:	Disabling clock on downlink 0
10:09:52:elinks:INFO:	Disabling clock on downlink 1
10:09:52:elinks:INFO:	Disabling clock on downlink 2
10:09:52:elinks:INFO:	Disabling clock on downlink 3
10:09:52:elinks:INFO:	Disabling clock on downlink 4
10:09:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:09:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:09:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:09:52:elinks:INFO:	Disabling clock on downlink 0
10:09:52:elinks:INFO:	Disabling clock on downlink 1
10:09:52:elinks:INFO:	Disabling clock on downlink 2
10:09:52:elinks:INFO:	Disabling clock on downlink 3
10:09:52:elinks:INFO:	Disabling clock on downlink 4
10:09:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:09:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:09:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:09:52:elinks:INFO:	Disabling clock on downlink 0
10:09:52:elinks:INFO:	Disabling clock on downlink 1
10:09:52:elinks:INFO:	Disabling clock on downlink 2
10:09:52:elinks:INFO:	Disabling clock on downlink 3
10:09:52:elinks:INFO:	Disabling clock on downlink 4
10:09:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:09:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:09:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:09:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:09:52:elinks:INFO:	Disabling clock on downlink 0
10:09:52:elinks:INFO:	Disabling clock on downlink 1
10:09:52:elinks:INFO:	Disabling clock on downlink 2
10:09:52:elinks:INFO:	Disabling clock on downlink 3
10:09:52:elinks:INFO:	Disabling clock on downlink 4
10:09:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:09:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:09:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:09:52:elinks:INFO:	Disabling clock on downlink 0
10:09:52:elinks:INFO:	Disabling clock on downlink 1
10:09:52:elinks:INFO:	Disabling clock on downlink 2
10:09:52:elinks:INFO:	Disabling clock on downlink 3
10:09:52:elinks:INFO:	Disabling clock on downlink 4
10:09:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:09:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:09:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:09:53:setup_element:INFO:	Scanning clock phase
10:09:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:09:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:09:53:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:09:53:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 20: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:09:53:setup_element:INFO:	Eye window for uplink 21: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:09:53:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:09:53:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:09:53:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XX__________
Clock Delay: 28
10:09:53:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XX__________
Clock Delay: 28
10:09:53:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:09:53:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:09:53:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:09:53:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
10:09:53:setup_element:INFO:	Scanning data phases
10:09:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:09:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:09:59:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:09:59:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
10:09:59:setup_element:INFO:	Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
10:09:59:setup_element:INFO:	Eye window for uplink 18: XX________________________________XXXXXX
Data delay found: 17
10:09:59:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXXX__
Data delay found: 14
10:09:59:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXXX__
Data delay found: 15
10:09:59:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXXX___
Data delay found: 13
10:09:59:setup_element:INFO:	Eye window for uplink 22: XXX_________________________________XXXX
Data delay found: 19
10:09:59:setup_element:INFO:	Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
10:09:59:setup_element:INFO:	Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:09:59:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:09:59:setup_element:INFO:	Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
10:09:59:setup_element:INFO:	Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
10:09:59:setup_element:INFO:	Eye window for uplink 28: _______________XXXX_____________________
Data delay found: 36
10:09:59:setup_element:INFO:	Eye window for uplink 29: _________________XXXXX__________________
Data delay found: 39
10:09:59:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
10:09:59:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
10:09:59:setup_element:INFO:	Setting the data phase to 19 for uplink 16
10:09:59:setup_element:INFO:	Setting the data phase to 18 for uplink 17
10:09:59:setup_element:INFO:	Setting the data phase to 17 for uplink 18
10:09:59:setup_element:INFO:	Setting the data phase to 14 for uplink 19
10:09:59:setup_element:INFO:	Setting the data phase to 15 for uplink 20
10:09:59:setup_element:INFO:	Setting the data phase to 13 for uplink 21
10:09:59:setup_element:INFO:	Setting the data phase to 19 for uplink 22
10:09:59:setup_element:INFO:	Setting the data phase to 20 for uplink 23
10:09:59:setup_element:INFO:	Setting the data phase to 29 for uplink 24
10:09:59:setup_element:INFO:	Setting the data phase to 31 for uplink 25
10:09:59:setup_element:INFO:	Setting the data phase to 31 for uplink 26
10:09:59:setup_element:INFO:	Setting the data phase to 34 for uplink 27
10:09:59:setup_element:INFO:	Setting the data phase to 36 for uplink 28
10:09:59:setup_element:INFO:	Setting the data phase to 39 for uplink 29
10:09:59:setup_element:INFO:	Setting the data phase to 39 for uplink 30
10:09:59:setup_element:INFO:	Setting the data phase to 39 for uplink 31
10:09:59:setup_element:INFO:	Beginning SMX ASICs map scan
10:09:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:09:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:09:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:09:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:09:59:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:09:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:09:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:09:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:09:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:09:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:09:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:09:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:09:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:10:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:10:00:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:10:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:10:00:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:10:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:10:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:10:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:10:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:10:01:setup_element:INFO:	Performing Elink synchronization
10:10:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:10:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:10:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:10:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:10:01:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:10:01:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:10:02:febtest:INFO:	Init all SMX (CSA): 30
10:10:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:10:17:febtest:INFO:	23-00 | XA-000-08-002-003-006-030-13 |  25.1 | 1177.4
10:10:17:febtest:INFO:	30-01 | XA-000-08-002-000-006-174-15 |  34.6 | 1141.9
10:10:17:febtest:INFO:	21-02 | XA-000-08-002-003-006-025-13 |  40.9 | 1130.0
10:10:17:febtest:INFO:	28-03 | XA-000-08-002-000-006-179-08 |  25.1 | 1159.7
10:10:18:febtest:INFO:	19-04 | XA-000-08-002-003-006-029-13 |  28.2 | 1159.7
10:10:18:febtest:INFO:	26-05 | XA-000-08-002-003-006-018-13 |  40.9 | 1112.1
10:10:18:febtest:INFO:	17-06 | XA-000-08-002-003-006-028-13 |  34.6 | 1141.9
10:10:18:febtest:INFO:	24-07 | XA-000-08-002-003-006-027-13 |  28.2 | 1153.7
10:10:19:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:10:21:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1183.292940 mV
10:10:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:21:ST3_smx:INFO:		Electrons
10:10:21:ST3_smx:INFO:	# loops 0
10:10:23:ST3_smx:INFO:	# loops 1
10:10:25:ST3_smx:INFO:	# loops 2
10:10:26:ST3_smx:INFO:	# loops 3
10:10:28:ST3_smx:INFO:	# loops 4
10:10:29:ST3_smx:INFO:	Total # of broken channels: 0
10:10:29:ST3_smx:INFO:	List of broken channels: []
10:10:29:ST3_smx:INFO:	Total # of broken channels: 0
10:10:29:ST3_smx:INFO:	List of broken channels: []
10:10:31:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1153.732915 mV
10:10:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:31:ST3_smx:INFO:		Electrons
10:10:31:ST3_smx:INFO:	# loops 0
10:10:33:ST3_smx:INFO:	# loops 1
10:10:35:ST3_smx:INFO:	# loops 2
10:10:36:ST3_smx:INFO:	# loops 3
10:10:38:ST3_smx:INFO:	# loops 4
10:10:40:ST3_smx:INFO:	Total # of broken channels: 0
10:10:40:ST3_smx:INFO:	List of broken channels: []
10:10:40:ST3_smx:INFO:	Total # of broken channels: 1
10:10:40:ST3_smx:INFO:	List of broken channels: [0]
10:10:41:ST3_smx:INFO:	chip: 21-2 	 40.898880 C 	 1135.937260 mV
10:10:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:41:ST3_smx:INFO:		Electrons
10:10:41:ST3_smx:INFO:	# loops 0
10:10:43:ST3_smx:INFO:	# loops 1
10:10:44:ST3_smx:INFO:	# loops 2
10:10:46:ST3_smx:INFO:	# loops 3
10:10:48:ST3_smx:INFO:	# loops 4
10:10:49:ST3_smx:INFO:	Total # of broken channels: 1
10:10:49:ST3_smx:INFO:	List of broken channels: [1]
10:10:49:ST3_smx:INFO:	Total # of broken channels: 1
10:10:49:ST3_smx:INFO:	List of broken channels: [1]
10:10:51:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1171.483840 mV
10:10:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:10:51:ST3_smx:INFO:		Electrons
10:10:51:ST3_smx:INFO:	# loops 0
10:10:53:ST3_smx:INFO:	# loops 1
10:10:54:ST3_smx:INFO:	# loops 2
10:10:56:ST3_smx:INFO:	# loops 3
10:10:58:ST3_smx:INFO:	# loops 4
10:10:59:ST3_smx:INFO:	Total # of broken channels: 0
10:10:59:ST3_smx:INFO:	List of broken channels: []
10:10:59:ST3_smx:INFO:	Total # of broken channels: 1
10:10:59:ST3_smx:INFO:	List of broken channels: [40]
10:11:01:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1165.571835 mV
10:11:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:01:ST3_smx:INFO:		Electrons
10:11:01:ST3_smx:INFO:	# loops 0
10:11:03:ST3_smx:INFO:	# loops 1
10:11:04:ST3_smx:INFO:	# loops 2
10:11:06:ST3_smx:INFO:	# loops 3
10:11:07:ST3_smx:INFO:	# loops 4
10:11:09:ST3_smx:INFO:	Total # of broken channels: 0
10:11:09:ST3_smx:INFO:	List of broken channels: []
10:11:09:ST3_smx:INFO:	Total # of broken channels: 2
10:11:09:ST3_smx:INFO:	List of broken channels: [43, 127]
10:11:11:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1118.096875 mV
10:11:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:11:ST3_smx:INFO:		Electrons
10:11:11:ST3_smx:INFO:	# loops 0
10:11:12:ST3_smx:INFO:	# loops 1
10:11:14:ST3_smx:INFO:	# loops 2
10:11:16:ST3_smx:INFO:	# loops 3
10:11:17:ST3_smx:INFO:	# loops 4
10:11:19:ST3_smx:INFO:	Total # of broken channels: 0
10:11:19:ST3_smx:INFO:	List of broken channels: []
10:11:19:ST3_smx:INFO:	Total # of broken channels: 0
10:11:19:ST3_smx:INFO:	List of broken channels: []
10:11:21:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1153.732915 mV
10:11:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:21:ST3_smx:INFO:		Electrons
10:11:21:ST3_smx:INFO:	# loops 0
10:11:22:ST3_smx:INFO:	# loops 1
10:11:24:ST3_smx:INFO:	# loops 2
10:11:25:ST3_smx:INFO:	# loops 3
10:11:27:ST3_smx:INFO:	# loops 4
10:11:29:ST3_smx:INFO:	Total # of broken channels: 0
10:11:29:ST3_smx:INFO:	List of broken channels: []
10:11:29:ST3_smx:INFO:	Total # of broken channels: 0
10:11:29:ST3_smx:INFO:	List of broken channels: []
10:11:30:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1165.571835 mV
10:11:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:11:30:ST3_smx:INFO:		Electrons
10:11:30:ST3_smx:INFO:	# loops 0
10:11:32:ST3_smx:INFO:	# loops 1
10:11:34:ST3_smx:INFO:	# loops 2
10:11:35:ST3_smx:INFO:	# loops 3
10:11:37:ST3_smx:INFO:	# loops 4
10:11:39:ST3_smx:INFO:	Total # of broken channels: 0
10:11:39:ST3_smx:INFO:	List of broken channels: []
10:11:39:ST3_smx:INFO:	Total # of broken channels: 0
10:11:39:ST3_smx:INFO:	List of broken channels: []
10:11:39:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:11:39:febtest:INFO:	23-00 | XA-000-08-002-003-006-030-13 |  28.2 | 1206.9
10:11:39:febtest:INFO:	30-01 | XA-000-08-002-000-006-174-15 |  37.7 | 1171.5
10:11:39:febtest:INFO:	21-02 | XA-000-08-002-003-006-025-13 |  44.1 | 1159.7
10:11:40:febtest:INFO:	28-03 | XA-000-08-002-000-006-179-08 |  28.2 | 1189.2
10:11:40:febtest:INFO:	19-04 | XA-000-08-002-003-006-029-13 |  31.4 | 1183.3
10:11:40:febtest:INFO:	26-05 | XA-000-08-002-003-006-018-13 |  47.3 | 1141.9
10:11:40:febtest:INFO:	17-06 | XA-000-08-002-003-006-028-13 |  37.7 | 1171.5
10:11:41:febtest:INFO:	24-07 | XA-000-08-002-003-006-027-13 |  31.4 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_07_18-10_08_44
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2208| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	15453

MODULE_NAME:	L7DL500123 M7DL5T2001232A2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L7DL500123
MODULE_MODULE:	M7DL5T2001232A2
MODULE_SIZE:	62
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5370', '1.852', '2.0940']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0890', '1.850', '2.6150']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.850', '0.5244']
10:13:53:ST3_Shared:INFO:	Listo of operators:Robert V.;