FEB_2209 03.07.24 10:30:09
Info
10:30:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:09:ST3_Shared:INFO: FEB-Microcable
10:30:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:09:febtest:INFO: Testing FEB with SN 2209
10:30:11:smx_tester:INFO: Scanning setup
10:30:11:elinks:INFO: Disabling clock on downlink 0
10:30:11:elinks:INFO: Disabling clock on downlink 1
10:30:11:elinks:INFO: Disabling clock on downlink 2
10:30:11:elinks:INFO: Disabling clock on downlink 3
10:30:11:elinks:INFO: Disabling clock on downlink 4
10:30:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:11:elinks:INFO: Disabling clock on downlink 0
10:30:11:elinks:INFO: Disabling clock on downlink 1
10:30:11:elinks:INFO: Disabling clock on downlink 2
10:30:11:elinks:INFO: Disabling clock on downlink 3
10:30:11:elinks:INFO: Disabling clock on downlink 4
10:30:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:11:elinks:INFO: Disabling clock on downlink 0
10:30:11:elinks:INFO: Disabling clock on downlink 1
10:30:11:elinks:INFO: Disabling clock on downlink 2
10:30:11:elinks:INFO: Disabling clock on downlink 3
10:30:11:elinks:INFO: Disabling clock on downlink 4
10:30:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:30:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:11:elinks:INFO: Disabling clock on downlink 0
10:30:11:elinks:INFO: Disabling clock on downlink 1
10:30:11:elinks:INFO: Disabling clock on downlink 2
10:30:11:elinks:INFO: Disabling clock on downlink 3
10:30:11:elinks:INFO: Disabling clock on downlink 4
10:30:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:11:elinks:INFO: Disabling clock on downlink 0
10:30:11:elinks:INFO: Disabling clock on downlink 1
10:30:11:elinks:INFO: Disabling clock on downlink 2
10:30:11:elinks:INFO: Disabling clock on downlink 3
10:30:11:elinks:INFO: Disabling clock on downlink 4
10:30:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:30:11:setup_element:INFO: Scanning clock phase
10:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:30:12:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:30:12:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:30:12:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:30:12:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:30:12:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:30:12:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:30:12:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:30:12:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:30:12:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2
10:30:12:setup_element:INFO: Scanning data phases
10:30:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:30:17:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________
Data delay found: 29
10:30:17:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:30:17:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:30:17:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
10:30:17:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
10:30:17:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
10:30:17:setup_element:INFO: Eye window for uplink 30: ____________XXXXXX______________________
Data delay found: 34
10:30:17:setup_element:INFO: Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
10:30:17:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:30:17:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:30:17:setup_element:INFO: Setting the data phase to 28 for uplink 26
10:30:17:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:30:17:setup_element:INFO: Setting the data phase to 37 for uplink 28
10:30:17:setup_element:INFO: Setting the data phase to 39 for uplink 29
10:30:17:setup_element:INFO: Setting the data phase to 34 for uplink 30
10:30:17:setup_element:INFO: Setting the data phase to 34 for uplink 31
10:30:17:setup_element:INFO: Beginning SMX ASICs map scan
10:30:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:30:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:30:17:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:30:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:30:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:30:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:30:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:30:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:30:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:30:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:30:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:30:20:setup_element:INFO: Performing Elink synchronization
10:30:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:30:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:30:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:30:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:30:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:30:20:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:30:20:febtest:INFO: Init all SMX (CSA): 30
10:30:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:28:febtest:INFO: 30-01 | XA-000-08-002-002-008-235-10 | 31.4 | 1165.6
10:30:28:febtest:INFO: 28-03 | XA-000-08-002-002-008-238-10 | 15.6 | 1212.7
10:30:28:febtest:INFO: 26-05 | XA-000-08-002-002-008-239-10 | 34.6 | 1141.9
10:30:29:febtest:INFO: 24-07 | XA-000-08-002-002-008-242-13 | 47.3 | 1106.2
10:30:30:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:30:32:ST3_smx:INFO: chip: 30-1 31.389742 C 1177.390875 mV
10:30:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:32:ST3_smx:INFO: Electrons
10:30:32:ST3_smx:INFO: # loops 0
10:30:33:ST3_smx:INFO: # loops 1
10:30:35:ST3_smx:INFO: # loops 2
10:30:36:ST3_smx:INFO: Total # of broken channels: 0
10:30:36:ST3_smx:INFO: List of broken channels: []
10:30:36:ST3_smx:INFO: Total # of broken channels: 0
10:30:36:ST3_smx:INFO: List of broken channels: []
10:30:38:ST3_smx:INFO: chip: 28-3 15.590880 C 1230.330540 mV
10:30:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:38:ST3_smx:INFO: Electrons
10:30:38:ST3_smx:INFO: # loops 0
10:30:40:ST3_smx:INFO: # loops 1
10:30:41:ST3_smx:INFO: # loops 2
10:30:43:ST3_smx:INFO: Total # of broken channels: 0
10:30:43:ST3_smx:INFO: List of broken channels: []
10:30:43:ST3_smx:INFO: Total # of broken channels: 0
10:30:43:ST3_smx:INFO: List of broken channels: []
10:30:45:ST3_smx:INFO: chip: 26-5 34.556970 C 1153.732915 mV
10:30:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:45:ST3_smx:INFO: Electrons
10:30:45:ST3_smx:INFO: # loops 0
10:30:46:ST3_smx:INFO: # loops 1
10:30:48:ST3_smx:INFO: # loops 2
10:30:49:ST3_smx:INFO: Total # of broken channels: 0
10:30:49:ST3_smx:INFO: List of broken channels: []
10:30:49:ST3_smx:INFO: Total # of broken channels: 0
10:30:49:ST3_smx:INFO: List of broken channels: []
10:30:51:ST3_smx:INFO: chip: 24-7 50.430383 C 1118.096875 mV
10:30:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:30:51:ST3_smx:INFO: Electrons
10:30:51:ST3_smx:INFO: # loops 0
10:30:53:ST3_smx:INFO: # loops 1
10:30:54:ST3_smx:INFO: # loops 2
10:30:56:ST3_smx:INFO: Total # of broken channels: 0
10:30:56:ST3_smx:INFO: List of broken channels: []
10:30:56:ST3_smx:INFO: Total # of broken channels: 0
10:30:56:ST3_smx:INFO: List of broken channels: []
10:30:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:30:56:febtest:INFO: 30-01 | XA-000-08-002-002-008-235-10 | 31.4 | 1195.1
10:30:56:febtest:INFO: 28-03 | XA-000-08-002-002-008-238-10 | 15.6 | 1247.9
10:30:57:febtest:INFO: 26-05 | XA-000-08-002-002-008-239-10 | 37.7 | 1177.4
10:30:57:febtest:INFO: 24-07 | XA-000-08-002-002-008-242-13 | 50.4 | 1135.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_03-10_30_09
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2209| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7284', '1.853', '0.7134']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '1.2990']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9887', '1.850', '0.2657']