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FEB_2211 02.07.24 14:48:26
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14:48:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:48:26:ST3_Shared:INFO: FEB-Microcable
14:48:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:48:26:febtest:INFO: Testing FEB with SN 2211
14:48:27:smx_tester:INFO: Scanning setup
14:48:27:elinks:INFO: Disabling clock on downlink 0
14:48:27:elinks:INFO: Disabling clock on downlink 1
14:48:27:elinks:INFO: Disabling clock on downlink 2
14:48:27:elinks:INFO: Disabling clock on downlink 3
14:48:27:elinks:INFO: Disabling clock on downlink 4
14:48:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:48:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:48:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:48:27:elinks:INFO: Disabling clock on downlink 0
14:48:27:elinks:INFO: Disabling clock on downlink 1
14:48:27:elinks:INFO: Disabling clock on downlink 2
14:48:27:elinks:INFO: Disabling clock on downlink 3
14:48:27:elinks:INFO: Disabling clock on downlink 4
14:48:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:48:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:48:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:48:28:elinks:INFO: Disabling clock on downlink 0
14:48:28:elinks:INFO: Disabling clock on downlink 1
14:48:28:elinks:INFO: Disabling clock on downlink 2
14:48:28:elinks:INFO: Disabling clock on downlink 3
14:48:28:elinks:INFO: Disabling clock on downlink 4
14:48:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:48:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:48:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:48:28:elinks:INFO: Disabling clock on downlink 0
14:48:28:elinks:INFO: Disabling clock on downlink 1
14:48:28:elinks:INFO: Disabling clock on downlink 2
14:48:28:elinks:INFO: Disabling clock on downlink 3
14:48:28:elinks:INFO: Disabling clock on downlink 4
14:48:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:48:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:48:28:elinks:INFO: Disabling clock on downlink 0
14:48:28:elinks:INFO: Disabling clock on downlink 1
14:48:28:elinks:INFO: Disabling clock on downlink 2
14:48:28:elinks:INFO: Disabling clock on downlink 3
14:48:28:elinks:INFO: Disabling clock on downlink 4
14:48:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:48:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:48:28:setup_element:INFO: Scanning clock phase
14:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:48:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:48:28:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:48:28:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
14:48:28:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
14:48:28:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:48:28:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:48:28:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
14:48:28:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
14:48:28:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
14:48:28:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
14:48:28:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:48:28:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:48:28:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:48:28:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
14:48:28:setup_element:INFO: Scanning data phases
14:48:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:48:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:48:34:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:48:34:setup_element:INFO: Eye window for uplink 16: ___________________________________XXXX_
Data delay found: 16
14:48:34:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
14:48:34:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
14:48:34:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXXX
Data delay found: 16
14:48:34:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
14:48:34:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
14:48:34:setup_element:INFO: Eye window for uplink 22: XXX_________________________________XXXX
Data delay found: 19
14:48:34:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
14:48:34:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
14:48:34:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
14:48:34:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
14:48:34:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
14:48:34:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
14:48:34:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
14:48:34:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
14:48:34:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
14:48:34:setup_element:INFO: Setting the data phase to 16 for uplink 16
14:48:34:setup_element:INFO: Setting the data phase to 15 for uplink 17
14:48:34:setup_element:INFO: Setting the data phase to 18 for uplink 18
14:48:34:setup_element:INFO: Setting the data phase to 16 for uplink 19
14:48:34:setup_element:INFO: Setting the data phase to 16 for uplink 20
14:48:34:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:48:34:setup_element:INFO: Setting the data phase to 19 for uplink 22
14:48:34:setup_element:INFO: Setting the data phase to 21 for uplink 23
14:48:34:setup_element:INFO: Setting the data phase to 29 for uplink 24
14:48:34:setup_element:INFO: Setting the data phase to 32 for uplink 25
14:48:34:setup_element:INFO: Setting the data phase to 32 for uplink 26
14:48:34:setup_element:INFO: Setting the data phase to 36 for uplink 27
14:48:34:setup_element:INFO: Setting the data phase to 33 for uplink 28
14:48:34:setup_element:INFO: Setting the data phase to 35 for uplink 29
14:48:34:setup_element:INFO: Setting the data phase to 37 for uplink 30
14:48:34:setup_element:INFO: Setting the data phase to 38 for uplink 31
14:48:34:setup_element:INFO: Beginning SMX ASICs map scan
14:48:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:48:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:48:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:48:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:48:34:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:48:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:48:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:48:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:48:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:48:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:48:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:48:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:48:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:48:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:48:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:48:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:48:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:48:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:48:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:48:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:48:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:48:37:setup_element:INFO: Performing Elink synchronization
14:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:48:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:48:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:48:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:48:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:48:37:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
14:48:38:febtest:INFO: Init all SMX (CSA): 30
14:48:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:48:53:febtest:INFO: 23-00 | XA-000-08-002-003-006-017-13 | 34.6 | 1165.6
14:48:53:febtest:INFO: 30-01 | XA-000-08-002-003-006-034-04 | 44.1 | 1130.0
14:48:54:febtest:INFO: 21-02 | XA-000-08-002-002-008-233-10 | 47.3 | 1124.0
14:48:54:febtest:INFO: 28-03 | XA-000-08-002-003-006-003-10 | 47.3 | 1135.9
14:48:54:febtest:INFO: 19-04 | XA-000-08-002-002-008-248-13 | 34.6 | 1171.5
14:48:54:febtest:INFO: 26-05 | XA-000-08-002-002-007-222-07 | 15.6 | 1224.5
14:48:54:febtest:INFO: 17-06 | XA-000-08-002-003-006-010-10 | 40.9 | 1141.9
14:48:55:febtest:INFO: 24-07 | XA-000-08-002-002-007-216-07 | 28.2 | 1171.5
14:48:56:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:48:58:ST3_smx:INFO: chip: 23-0 37.726682 C 1177.390875 mV
14:48:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:58:ST3_smx:INFO: Electrons
14:48:58:ST3_smx:INFO: # loops 0
14:48:59:ST3_smx:INFO: # loops 1
14:49:01:ST3_smx:INFO: # loops 2
14:49:03:ST3_smx:INFO: Total # of broken channels: 0
14:49:03:ST3_smx:INFO: List of broken channels: []
14:49:03:ST3_smx:INFO: Total # of broken channels: 0
14:49:03:ST3_smx:INFO: List of broken channels: []
14:49:05:ST3_smx:INFO: chip: 30-1 44.073563 C 1147.806000 mV
14:49:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:05:ST3_smx:INFO: Electrons
14:49:05:ST3_smx:INFO: # loops 0
14:49:06:ST3_smx:INFO: # loops 1
14:49:08:ST3_smx:INFO: # loops 2
14:49:10:ST3_smx:INFO: Total # of broken channels: 0
14:49:10:ST3_smx:INFO: List of broken channels: []
14:49:10:ST3_smx:INFO: Total # of broken channels: 0
14:49:10:ST3_smx:INFO: List of broken channels: []
14:49:11:ST3_smx:INFO: chip: 21-2 47.250730 C 1135.937260 mV
14:49:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:11:ST3_smx:INFO: Electrons
14:49:11:ST3_smx:INFO: # loops 0
14:49:13:ST3_smx:INFO: # loops 1
14:49:15:ST3_smx:INFO: # loops 2
14:49:16:ST3_smx:INFO: Total # of broken channels: 0
14:49:16:ST3_smx:INFO: List of broken channels: []
14:49:16:ST3_smx:INFO: Total # of broken channels: 0
14:49:17:ST3_smx:INFO: List of broken channels: []
14:49:18:ST3_smx:INFO: chip: 28-3 47.250730 C 1147.806000 mV
14:49:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:18:ST3_smx:INFO: Electrons
14:49:18:ST3_smx:INFO: # loops 0
14:49:20:ST3_smx:INFO: # loops 1
14:49:22:ST3_smx:INFO: # loops 2
14:49:23:ST3_smx:INFO: Total # of broken channels: 0
14:49:23:ST3_smx:INFO: List of broken channels: []
14:49:23:ST3_smx:INFO: Total # of broken channels: 0
14:49:23:ST3_smx:INFO: List of broken channels: []
14:49:25:ST3_smx:INFO: chip: 19-4 34.556970 C 1177.390875 mV
14:49:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:25:ST3_smx:INFO: Electrons
14:49:25:ST3_smx:INFO: # loops 0
14:49:27:ST3_smx:INFO: # loops 1
14:49:29:ST3_smx:INFO: # loops 2
14:49:30:ST3_smx:INFO: Total # of broken channels: 0
14:49:30:ST3_smx:INFO: List of broken channels: []
14:49:30:ST3_smx:INFO: Total # of broken channels: 0
14:49:30:ST3_smx:INFO: List of broken channels: []
14:49:32:ST3_smx:INFO: chip: 26-5 18.745682 C 1236.187875 mV
14:49:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:32:ST3_smx:INFO: Electrons
14:49:32:ST3_smx:INFO: # loops 0
14:49:34:ST3_smx:INFO: # loops 1
14:49:35:ST3_smx:INFO: # loops 2
14:49:37:ST3_smx:INFO: Total # of broken channels: 0
14:49:37:ST3_smx:INFO: List of broken channels: []
14:49:37:ST3_smx:INFO: Total # of broken channels: 0
14:49:37:ST3_smx:INFO: List of broken channels: []
14:49:38:ST3_smx:INFO: chip: 17-6 40.898880 C 1147.806000 mV
14:49:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:38:ST3_smx:INFO: Electrons
14:49:38:ST3_smx:INFO: # loops 0
14:49:40:ST3_smx:INFO: # loops 1
14:49:41:ST3_smx:INFO: # loops 2
14:49:43:ST3_smx:INFO: Total # of broken channels: 0
14:49:43:ST3_smx:INFO: List of broken channels: []
14:49:43:ST3_smx:INFO: Total # of broken channels: 1
14:49:43:ST3_smx:INFO: List of broken channels: [65]
14:49:45:ST3_smx:INFO: chip: 24-7 31.389742 C 1183.292940 mV
14:49:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:45:ST3_smx:INFO: Electrons
14:49:45:ST3_smx:INFO: # loops 0
14:49:46:ST3_smx:INFO: # loops 1
14:49:48:ST3_smx:INFO: # loops 2
14:49:49:ST3_smx:INFO: Total # of broken channels: 0
14:49:49:ST3_smx:INFO: List of broken channels: []
14:49:49:ST3_smx:INFO: Total # of broken channels: 0
14:49:49:ST3_smx:INFO: List of broken channels: []
14:49:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:49:50:febtest:INFO: 23-00 | XA-000-08-002-003-006-017-13 | 37.7 | 1195.1
14:49:50:febtest:INFO: 30-01 | XA-000-08-002-003-006-034-04 | 47.3 | 1171.5
14:49:50:febtest:INFO: 21-02 | XA-000-08-002-002-008-233-10 | 50.4 | 1159.7
14:49:51:febtest:INFO: 28-03 | XA-000-08-002-003-006-003-10 | 50.4 | 1165.6
14:49:51:febtest:INFO: 19-04 | XA-000-08-002-002-008-248-13 | 37.7 | 1201.0
14:49:51:febtest:INFO: 26-05 | XA-000-08-002-002-007-222-07 | 18.7 | 1259.6
14:49:51:febtest:INFO: 17-06 | XA-000-08-002-003-006-010-10 | 40.9 | 1165.6
14:49:51:febtest:INFO: 24-07 | XA-000-08-002-002-007-216-07 | 31.4 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_02-14_48_26
OPERATOR : Oleksandr S.; Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2211| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4780', '1.852', '1.9420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '2.5990']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.851', '0.5233']