FEB_2217    29.08.24 08:55:46

TextEdit.txt
            08:55:46:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:55:46:ST3_Shared:INFO:	                         FEB-Sensor                         
08:55:46:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:55:58:ST3_ModuleSelector:INFO:	M8UL6B0010240A2
08:55:58:ST3_ModuleSelector:INFO:	17042
08:55:58:febtest:INFO:	Testing FEB with SN 2217
08:56:00:smx_tester:INFO:	Scanning setup
08:56:00:elinks:INFO:	Disabling clock on downlink 0
08:56:00:elinks:INFO:	Disabling clock on downlink 1
08:56:00:elinks:INFO:	Disabling clock on downlink 2
08:56:00:elinks:INFO:	Disabling clock on downlink 3
08:56:00:elinks:INFO:	Disabling clock on downlink 4
08:56:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:56:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:56:00:elinks:INFO:	Disabling clock on downlink 0
08:56:00:elinks:INFO:	Disabling clock on downlink 1
08:56:00:elinks:INFO:	Disabling clock on downlink 2
08:56:00:elinks:INFO:	Disabling clock on downlink 3
08:56:00:elinks:INFO:	Disabling clock on downlink 4
08:56:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:56:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:56:00:elinks:INFO:	Disabling clock on downlink 0
08:56:00:elinks:INFO:	Disabling clock on downlink 1
08:56:00:elinks:INFO:	Disabling clock on downlink 2
08:56:00:elinks:INFO:	Disabling clock on downlink 3
08:56:00:elinks:INFO:	Disabling clock on downlink 4
08:56:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:56:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:56:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:56:00:elinks:INFO:	Disabling clock on downlink 0
08:56:00:elinks:INFO:	Disabling clock on downlink 1
08:56:00:elinks:INFO:	Disabling clock on downlink 2
08:56:00:elinks:INFO:	Disabling clock on downlink 3
08:56:00:elinks:INFO:	Disabling clock on downlink 4
08:56:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:56:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:56:00:elinks:INFO:	Disabling clock on downlink 0
08:56:00:elinks:INFO:	Disabling clock on downlink 1
08:56:00:elinks:INFO:	Disabling clock on downlink 2
08:56:00:elinks:INFO:	Disabling clock on downlink 3
08:56:00:elinks:INFO:	Disabling clock on downlink 4
08:56:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:56:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:56:00:setup_element:INFO:	Scanning clock phase
08:56:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:56:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:01:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:56:01:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:56:01:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:56:01:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:01:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:01:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
08:56:01:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
08:56:01:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:56:01:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:56:01:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:56:01:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:56:01:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:01:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:56:01:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:56:01:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:56:01:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:56:01:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:56:01:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
08:56:01:setup_element:INFO:	Scanning data phases
08:56:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:56:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:56:06:setup_element:INFO:	Eye window for uplink 16: XXX____________________________________X
Data delay found: 20
08:56:06:setup_element:INFO:	Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
08:56:06:setup_element:INFO:	Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
08:56:06:setup_element:INFO:	Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
08:56:06:setup_element:INFO:	Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
08:56:06:setup_element:INFO:	Eye window for uplink 21: XXX_________________________________XXXX
Data delay found: 19
08:56:06:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
08:56:06:setup_element:INFO:	Eye window for uplink 23: XXXXX______________________________XXXXX
Data delay found: 19
08:56:06:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
08:56:06:setup_element:INFO:	Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
08:56:06:setup_element:INFO:	Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
08:56:06:setup_element:INFO:	Eye window for uplink 27: ______________XXXX______________________
Data delay found: 35
08:56:06:setup_element:INFO:	Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
08:56:06:setup_element:INFO:	Eye window for uplink 29: _________________XXXXXXX________________
Data delay found: 0
08:56:06:setup_element:INFO:	Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
08:56:06:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
08:56:06:setup_element:INFO:	Setting the data phase to 20 for uplink 16
08:56:06:setup_element:INFO:	Setting the data phase to 18 for uplink 17
08:56:06:setup_element:INFO:	Setting the data phase to 20 for uplink 18
08:56:06:setup_element:INFO:	Setting the data phase to 18 for uplink 19
08:56:06:setup_element:INFO:	Setting the data phase to 20 for uplink 20
08:56:06:setup_element:INFO:	Setting the data phase to 19 for uplink 21
08:56:06:setup_element:INFO:	Setting the data phase to 19 for uplink 22
08:56:06:setup_element:INFO:	Setting the data phase to 19 for uplink 23
08:56:07:setup_element:INFO:	Setting the data phase to 30 for uplink 24
08:56:07:setup_element:INFO:	Setting the data phase to 32 for uplink 25
08:56:07:setup_element:INFO:	Setting the data phase to 32 for uplink 26
08:56:07:setup_element:INFO:	Setting the data phase to 35 for uplink 27
08:56:07:setup_element:INFO:	Setting the data phase to 37 for uplink 28
08:56:07:setup_element:INFO:	Setting the data phase to 0 for uplink 29
08:56:07:setup_element:INFO:	Setting the data phase to 0 for uplink 30
08:56:07:setup_element:INFO:	Setting the data phase to 0 for uplink 31
08:56:07:setup_element:INFO:	Beginning SMX ASICs map scan
08:56:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:56:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:56:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:56:07:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:56:07:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:56:07:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:56:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:56:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:56:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:56:07:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:56:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:56:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:56:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:56:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:56:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:56:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:56:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:56:08:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:56:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:56:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:56:09:setup_element:INFO:	Performing Elink synchronization
08:56:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:56:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:56:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:56:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:56:09:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x0
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x1
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x2
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x3
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x4
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x5
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x6
08:56:10:ST3_emu_feb:DEBUG:	Chip address:  	0x7
08:56:10:febtest:INFO:	Init all SMX (CSA): 30
08:56:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:56:25:febtest:INFO:	23-00 | XA-000-08-002-001-006-026-04 |  31.4 | 1141.9
08:56:25:febtest:INFO:	30-01 | XA-000-08-002-001-006-010-03 |  34.6 | 1135.9
08:56:25:febtest:INFO:	21-02 | XA-000-08-002-000-008-249-04 |  25.1 | 1165.6
08:56:26:febtest:INFO:	28-03 | XA-000-08-002-001-006-029-04 |  44.1 | 1100.2
08:56:26:febtest:INFO:	19-04 | XA-000-08-002-001-006-019-04 |  37.7 | 1135.9
08:56:26:febtest:INFO:	26-05 | XA-000-08-002-000-008-241-04 |  25.1 | 1159.7
08:56:26:febtest:INFO:	17-06 | XA-000-08-002-001-006-027-04 |  44.1 | 1118.1
08:56:26:febtest:INFO:	24-07 | XA-000-08-002-001-006-017-04 |  34.6 | 1130.0
08:56:27:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:56:29:ST3_smx:INFO:	chip: 23-0 	 34.556970 C 	 1147.806000 mV
08:56:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:29:ST3_smx:INFO:		Electrons
08:56:29:ST3_smx:INFO:	# loops 0
08:56:31:ST3_smx:INFO:	# loops 1
08:56:33:ST3_smx:INFO:	# loops 2
08:56:34:ST3_smx:INFO:	# loops 3
08:56:36:ST3_smx:INFO:	# loops 4
08:56:38:ST3_smx:INFO:	Total # of broken channels: 0
08:56:38:ST3_smx:INFO:	List of broken channels: []
08:56:38:ST3_smx:INFO:	Total # of broken channels: 0
08:56:38:ST3_smx:INFO:	List of broken channels: []
08:56:40:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1147.806000 mV
08:56:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:40:ST3_smx:INFO:		Electrons
08:56:40:ST3_smx:INFO:	# loops 0
08:56:41:ST3_smx:INFO:	# loops 1
08:56:43:ST3_smx:INFO:	# loops 2
08:56:45:ST3_smx:INFO:	# loops 3
08:56:46:ST3_smx:INFO:	# loops 4
08:56:48:ST3_smx:INFO:	Total # of broken channels: 0
08:56:48:ST3_smx:INFO:	List of broken channels: []
08:56:48:ST3_smx:INFO:	Total # of broken channels: 2
08:56:48:ST3_smx:INFO:	List of broken channels: [0, 1]
08:56:50:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1177.390875 mV
08:56:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:56:50:ST3_smx:INFO:		Electrons
08:56:50:ST3_smx:INFO:	# loops 0
08:56:51:ST3_smx:INFO:	# loops 1
08:56:53:ST3_smx:INFO:	# loops 2
08:56:55:ST3_smx:INFO:	# loops 3
08:56:56:ST3_smx:INFO:	# loops 4
08:56:58:ST3_smx:INFO:	Total # of broken channels: 0
08:56:58:ST3_smx:INFO:	List of broken channels: []
08:56:58:ST3_smx:INFO:	Total # of broken channels: 0
08:56:58:ST3_smx:INFO:	List of broken channels: []
08:57:00:ST3_smx:INFO:	chip: 28-3 	 44.073563 C 	 1112.140140 mV
08:57:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:00:ST3_smx:INFO:		Electrons
08:57:00:ST3_smx:INFO:	# loops 0
08:57:01:ST3_smx:INFO:	# loops 1
08:57:03:ST3_smx:INFO:	# loops 2
08:57:05:ST3_smx:INFO:	# loops 3
08:57:06:ST3_smx:INFO:	# loops 4
08:57:08:ST3_smx:INFO:	Total # of broken channels: 0
08:57:08:ST3_smx:INFO:	List of broken channels: []
08:57:08:ST3_smx:INFO:	Total # of broken channels: 1
08:57:08:ST3_smx:INFO:	List of broken channels: [33]
08:57:10:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1147.806000 mV
08:57:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:10:ST3_smx:INFO:		Electrons
08:57:10:ST3_smx:INFO:	# loops 0
08:57:11:ST3_smx:INFO:	# loops 1
08:57:13:ST3_smx:INFO:	# loops 2
08:57:15:ST3_smx:INFO:	# loops 3
08:57:16:ST3_smx:INFO:	# loops 4
08:57:18:ST3_smx:INFO:	Total # of broken channels: 0
08:57:18:ST3_smx:INFO:	List of broken channels: []
08:57:18:ST3_smx:INFO:	Total # of broken channels: 0
08:57:18:ST3_smx:INFO:	List of broken channels: []
08:57:20:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1171.483840 mV
08:57:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:20:ST3_smx:INFO:		Electrons
08:57:20:ST3_smx:INFO:	# loops 0
08:57:21:ST3_smx:INFO:	# loops 1
08:57:23:ST3_smx:INFO:	# loops 2
08:57:25:ST3_smx:INFO:	# loops 3
08:57:26:ST3_smx:INFO:	# loops 4
08:57:28:ST3_smx:INFO:	Total # of broken channels: 0
08:57:28:ST3_smx:INFO:	List of broken channels: []
08:57:28:ST3_smx:INFO:	Total # of broken channels: 11
08:57:28:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 5, 7, 9, 11, 13, 14, 15]
08:57:30:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1124.048640 mV
08:57:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:30:ST3_smx:INFO:		Electrons
08:57:30:ST3_smx:INFO:	# loops 0
08:57:31:ST3_smx:INFO:	# loops 1
08:57:33:ST3_smx:INFO:	# loops 2
08:57:35:ST3_smx:INFO:	# loops 3
08:57:37:ST3_smx:INFO:	# loops 4
08:57:38:ST3_smx:INFO:	Total # of broken channels: 0
08:57:38:ST3_smx:INFO:	List of broken channels: []
08:57:38:ST3_smx:INFO:	Total # of broken channels: 0
08:57:38:ST3_smx:INFO:	List of broken channels: []
08:57:40:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1141.874115 mV
08:57:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:57:40:ST3_smx:INFO:		Electrons
08:57:40:ST3_smx:INFO:	# loops 0
08:57:42:ST3_smx:INFO:	# loops 1
08:57:43:ST3_smx:INFO:	# loops 2
08:57:45:ST3_smx:INFO:	# loops 3
08:57:47:ST3_smx:INFO:	# loops 4
08:57:48:ST3_smx:INFO:	Total # of broken channels: 0
08:57:48:ST3_smx:INFO:	List of broken channels: []
08:57:48:ST3_smx:INFO:	Total # of broken channels: 17
08:57:48:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 17, 19]
08:57:49:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:49:febtest:INFO:	23-00 | XA-000-08-002-001-006-026-04 |  34.6 | 1171.5
08:57:49:febtest:INFO:	30-01 | XA-000-08-002-001-006-010-03 |  34.6 | 1171.5
08:57:49:febtest:INFO:	21-02 | XA-000-08-002-000-008-249-04 |  28.2 | 1195.1
08:57:49:febtest:INFO:	28-03 | XA-000-08-002-001-006-029-04 |  44.1 | 1135.9
08:57:50:febtest:INFO:	19-04 | XA-000-08-002-001-006-019-04 |  37.7 | 1165.6
08:57:50:febtest:INFO:	26-05 | XA-000-08-002-000-008-241-04 |  28.2 | 1189.2
08:57:50:febtest:INFO:	17-06 | XA-000-08-002-001-006-027-04 |  44.1 | 1147.8
08:57:50:febtest:INFO:	24-07 | XA-000-08-002-001-006-017-04 |  37.7 | 1159.7
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#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_29-08_55_46
OPERATOR  : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2217| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 17042 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL6B0010240A2
LADDER_NAME: L8UL601024
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9430', '1.848', '2.4590']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0160', '1.850', '2.6020']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '0.5255']
08:58:17:ST3_Shared:INFO:	Listo of operators:Olga B.;