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FEB_2218 21.08.24 14:59:43
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14:59:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:59:43:ST3_Shared:INFO: FEB-Microcable
14:59:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:59:43:febtest:INFO: Testing FEB with SN 2218
14:59:44:smx_tester:INFO: Scanning setup
14:59:45:elinks:INFO: Disabling clock on downlink 0
14:59:45:elinks:INFO: Disabling clock on downlink 1
14:59:45:elinks:INFO: Disabling clock on downlink 2
14:59:45:elinks:INFO: Disabling clock on downlink 3
14:59:45:elinks:INFO: Disabling clock on downlink 4
14:59:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:59:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:59:45:elinks:INFO: Disabling clock on downlink 0
14:59:45:elinks:INFO: Disabling clock on downlink 1
14:59:45:elinks:INFO: Disabling clock on downlink 2
14:59:45:elinks:INFO: Disabling clock on downlink 3
14:59:45:elinks:INFO: Disabling clock on downlink 4
14:59:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:59:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:59:45:elinks:INFO: Disabling clock on downlink 0
14:59:45:elinks:INFO: Disabling clock on downlink 1
14:59:45:elinks:INFO: Disabling clock on downlink 2
14:59:45:elinks:INFO: Disabling clock on downlink 3
14:59:45:elinks:INFO: Disabling clock on downlink 4
14:59:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:59:45:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:59:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:59:45:elinks:INFO: Disabling clock on downlink 0
14:59:45:elinks:INFO: Disabling clock on downlink 1
14:59:45:elinks:INFO: Disabling clock on downlink 2
14:59:45:elinks:INFO: Disabling clock on downlink 3
14:59:45:elinks:INFO: Disabling clock on downlink 4
14:59:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:59:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:59:45:elinks:INFO: Disabling clock on downlink 0
14:59:45:elinks:INFO: Disabling clock on downlink 1
14:59:45:elinks:INFO: Disabling clock on downlink 2
14:59:45:elinks:INFO: Disabling clock on downlink 3
14:59:45:elinks:INFO: Disabling clock on downlink 4
14:59:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:59:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:59:45:setup_element:INFO: Scanning clock phase
14:59:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:46:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:59:46:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:59:46:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:59:46:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XX___________
Clock Delay: 27
14:59:46:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XX___________
Clock Delay: 27
14:59:46:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:59:46:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:59:46:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
14:59:46:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:59:46:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:59:46:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:59:46:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:59:46:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
14:59:46:setup_element:INFO: Scanning data phases
14:59:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:51:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:59:51:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
14:59:51:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
14:59:51:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
14:59:51:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX
Data delay found: 17
14:59:51:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
14:59:51:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
14:59:51:setup_element:INFO: Eye window for uplink 22: X___________________________________XXX_
Data delay found: 18
14:59:51:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
14:59:51:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
14:59:51:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
14:59:51:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
14:59:51:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
14:59:51:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
14:59:51:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
14:59:51:setup_element:INFO: Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
14:59:51:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
14:59:51:setup_element:INFO: Setting the data phase to 20 for uplink 16
14:59:51:setup_element:INFO: Setting the data phase to 19 for uplink 17
14:59:51:setup_element:INFO: Setting the data phase to 20 for uplink 18
14:59:51:setup_element:INFO: Setting the data phase to 17 for uplink 19
14:59:51:setup_element:INFO: Setting the data phase to 17 for uplink 20
14:59:51:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:59:51:setup_element:INFO: Setting the data phase to 18 for uplink 22
14:59:51:setup_element:INFO: Setting the data phase to 18 for uplink 23
14:59:51:setup_element:INFO: Setting the data phase to 31 for uplink 24
14:59:51:setup_element:INFO: Setting the data phase to 33 for uplink 25
14:59:51:setup_element:INFO: Setting the data phase to 30 for uplink 26
14:59:51:setup_element:INFO: Setting the data phase to 33 for uplink 27
14:59:51:setup_element:INFO: Setting the data phase to 38 for uplink 28
14:59:51:setup_element:INFO: Setting the data phase to 0 for uplink 29
14:59:51:setup_element:INFO: Setting the data phase to 39 for uplink 30
14:59:51:setup_element:INFO: Setting the data phase to 39 for uplink 31
14:59:51:setup_element:INFO: Beginning SMX ASICs map scan
14:59:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:59:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:59:51:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:59:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:59:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:59:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:59:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:59:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:59:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:59:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:59:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:59:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:59:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:59:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:59:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:59:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:59:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:59:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:59:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:59:54:setup_element:INFO: Performing Elink synchronization
14:59:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:59:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:59:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:59:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:59:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:59:54:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x0
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x1
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x2
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x3
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x4
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x5
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x6
14:59:55:ST3_emu_feb:DEBUG: Chip address: 0x7
14:59:55:febtest:INFO: Init all SMX (CSA): 30
15:00:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:00:09:febtest:INFO: 23-00 | XA-000-08-002-001-007-017-09 | 40.9 | 1147.8
15:00:09:febtest:INFO: 30-01 | XA-000-08-002-001-007-044-00 | 50.4 | 1100.2
15:00:09:febtest:INFO: 21-02 | XA-000-08-002-001-006-139-09 | 37.7 | 1165.6
15:00:09:febtest:INFO: 28-03 | XA-000-08-002-001-008-055-03 | 56.8 | 1088.3
15:00:10:febtest:INFO: 19-04 | XA-000-08-002-001-006-098-08 | 40.9 | 1147.8
15:00:10:febtest:INFO: 26-05 | XA-000-08-002-001-008-064-15 | 44.1 | 1135.9
15:00:10:febtest:INFO: 17-06 | XA-000-08-002-001-006-104-08 | 31.4 | 1195.1
15:00:10:febtest:INFO: 24-07 | XA-000-08-002-001-006-123-15 | 40.9 | 1141.9
15:00:11:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:00:13:ST3_smx:INFO: chip: 23-0 40.898880 C 1159.654860 mV
15:00:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:14:ST3_smx:INFO: Electrons
15:00:14:ST3_smx:INFO: # loops 0
15:00:15:ST3_smx:INFO: # loops 1
15:00:17:ST3_smx:INFO: # loops 2
15:00:18:ST3_smx:INFO: Total # of broken channels: 0
15:00:18:ST3_smx:INFO: List of broken channels: []
15:00:18:ST3_smx:INFO: Total # of broken channels: 11
15:00:18:ST3_smx:INFO: List of broken channels: [0, 6, 10, 84, 92, 96, 98, 100, 108, 110, 112]
15:00:20:ST3_smx:INFO: chip: 30-1 50.430383 C 1112.140140 mV
15:00:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:20:ST3_smx:INFO: Electrons
15:00:20:ST3_smx:INFO: # loops 0
15:00:22:ST3_smx:INFO: # loops 1
15:00:23:ST3_smx:INFO: # loops 2
15:00:25:ST3_smx:INFO: Total # of broken channels: 0
15:00:25:ST3_smx:INFO: List of broken channels: []
15:00:25:ST3_smx:INFO: Total # of broken channels: 1
15:00:25:ST3_smx:INFO: List of broken channels: [94]
15:00:26:ST3_smx:INFO: chip: 21-2 37.726682 C 1177.390875 mV
15:00:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:26:ST3_smx:INFO: Electrons
15:00:26:ST3_smx:INFO: # loops 0
15:00:28:ST3_smx:INFO: # loops 1
15:00:29:ST3_smx:INFO: # loops 2
15:00:31:ST3_smx:INFO: Total # of broken channels: 2
15:00:31:ST3_smx:INFO: List of broken channels: [111, 113]
15:00:31:ST3_smx:INFO: Total # of broken channels: 52
15:00:31:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 106, 111, 113, 115]
15:00:33:ST3_smx:INFO: chip: 28-3 56.797143 C 1100.211760 mV
15:00:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:33:ST3_smx:INFO: Electrons
15:00:33:ST3_smx:INFO: # loops 0
15:00:34:ST3_smx:INFO: # loops 1
15:00:36:ST3_smx:INFO: # loops 2
15:00:37:ST3_smx:INFO: Total # of broken channels: 0
15:00:37:ST3_smx:INFO: List of broken channels: []
15:00:37:ST3_smx:INFO: Total # of broken channels: 1
15:00:37:ST3_smx:INFO: List of broken channels: [85]
15:00:39:ST3_smx:INFO: chip: 19-4 40.898880 C 1159.654860 mV
15:00:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:39:ST3_smx:INFO: Electrons
15:00:39:ST3_smx:INFO: # loops 0
15:00:41:ST3_smx:INFO: # loops 1
15:00:42:ST3_smx:INFO: # loops 2
15:00:44:ST3_smx:INFO: Total # of broken channels: 3
15:00:44:ST3_smx:INFO: List of broken channels: [17, 63, 72]
15:00:44:ST3_smx:INFO: Total # of broken channels: 8
15:00:44:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 17]
15:00:46:ST3_smx:INFO: chip: 26-5 44.073563 C 1147.806000 mV
15:00:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:46:ST3_smx:INFO: Electrons
15:00:46:ST3_smx:INFO: # loops 0
15:00:47:ST3_smx:INFO: # loops 1
15:00:49:ST3_smx:INFO: # loops 2
15:00:50:ST3_smx:INFO: Total # of broken channels: 0
15:00:50:ST3_smx:INFO: List of broken channels: []
15:00:50:ST3_smx:INFO: Total # of broken channels: 11
15:00:50:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 23]
15:00:52:ST3_smx:INFO: chip: 17-6 31.389742 C 1206.851500 mV
15:00:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:52:ST3_smx:INFO: Electrons
15:00:52:ST3_smx:INFO: # loops 0
15:00:54:ST3_smx:INFO: # loops 1
15:00:55:ST3_smx:INFO: # loops 2
15:00:57:ST3_smx:INFO: Total # of broken channels: 1
15:00:57:ST3_smx:INFO: List of broken channels: [27]
15:00:57:ST3_smx:INFO: Total # of broken channels: 7
15:00:57:ST3_smx:INFO: List of broken channels: [0, 4, 6, 8, 10, 12, 27]
15:00:59:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV
15:00:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:00:59:ST3_smx:INFO: Electrons
15:00:59:ST3_smx:INFO: # loops 0
15:01:01:ST3_smx:INFO: # loops 1
15:01:02:ST3_smx:INFO: # loops 2
15:01:04:ST3_smx:INFO: Total # of broken channels: 0
15:01:04:ST3_smx:INFO: List of broken channels: []
15:01:04:ST3_smx:INFO: Total # of broken channels: 25
15:01:04:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 32, 34, 36, 38, 40, 46, 48, 50, 52, 54]
15:01:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:01:04:febtest:INFO: 23-00 | XA-000-08-002-001-007-017-09 | 40.9 | 1183.3
15:01:04:febtest:INFO: 30-01 | XA-000-08-002-001-007-044-00 | 50.4 | 1135.9
15:01:05:febtest:INFO: 21-02 | XA-000-08-002-001-006-139-09 | 37.7 | 1201.0
15:01:05:febtest:INFO: 28-03 | XA-000-08-002-001-008-055-03 | 60.0 | 1130.0
15:01:05:febtest:INFO: 19-04 | XA-000-08-002-001-006-098-08 | 44.1 | 1189.2
15:01:05:febtest:INFO: 26-05 | XA-000-08-002-001-008-064-15 | 44.1 | 1171.5
15:01:06:febtest:INFO: 17-06 | XA-000-08-002-001-006-104-08 | 31.4 | 1236.2
15:01:06:febtest:INFO: 24-07 | XA-000-08-002-001-006-123-15 | 44.1 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_21-14_59_43
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2218| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4540', '1.847', '2.5420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.850', '2.5780']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.5206']