
FEB_2218 28.08.24 08:47:14
TextEdit.txt
08:47:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:47:14:ST3_Shared:INFO: FEB-Sensor 08:47:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:47:26:ST3_ModuleSelector:INFO: M8UL2B4010224A2 08:47:26:ST3_ModuleSelector:INFO: 29124 08:47:26:febtest:INFO: Testing FEB with SN 2218 08:47:27:smx_tester:INFO: Scanning setup 08:47:27:elinks:INFO: Disabling clock on downlink 0 08:47:27:elinks:INFO: Disabling clock on downlink 1 08:47:27:elinks:INFO: Disabling clock on downlink 2 08:47:27:elinks:INFO: Disabling clock on downlink 3 08:47:27:elinks:INFO: Disabling clock on downlink 4 08:47:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:47:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:47:28:elinks:INFO: Disabling clock on downlink 0 08:47:28:elinks:INFO: Disabling clock on downlink 1 08:47:28:elinks:INFO: Disabling clock on downlink 2 08:47:28:elinks:INFO: Disabling clock on downlink 3 08:47:28:elinks:INFO: Disabling clock on downlink 4 08:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:47:28:elinks:INFO: Disabling clock on downlink 0 08:47:28:elinks:INFO: Disabling clock on downlink 1 08:47:28:elinks:INFO: Disabling clock on downlink 2 08:47:28:elinks:INFO: Disabling clock on downlink 3 08:47:28:elinks:INFO: Disabling clock on downlink 4 08:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 08:47:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 08:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:47:28:elinks:INFO: Disabling clock on downlink 0 08:47:28:elinks:INFO: Disabling clock on downlink 1 08:47:28:elinks:INFO: Disabling clock on downlink 2 08:47:28:elinks:INFO: Disabling clock on downlink 3 08:47:28:elinks:INFO: Disabling clock on downlink 4 08:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:47:28:elinks:INFO: Disabling clock on downlink 0 08:47:28:elinks:INFO: Disabling clock on downlink 1 08:47:28:elinks:INFO: Disabling clock on downlink 2 08:47:28:elinks:INFO: Disabling clock on downlink 3 08:47:28:elinks:INFO: Disabling clock on downlink 4 08:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:47:28:setup_element:INFO: Scanning clock phase 08:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:47:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:47:29:setup_element:INFO: Clock phase scan results for group 0, downlink 2 08:47:29:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:47:29:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:47:29:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:47:29:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:47:29:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 08:47:29:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:47:29:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:47:29:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:47:29:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:47:29:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 08:47:29:setup_element:INFO: Scanning data phases 08:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:47:34:setup_element:INFO: Data phase scan results for group 0, downlink 2 08:47:34:setup_element:INFO: Eye window for uplink 16: XXX____________________________________X Data delay found: 20 08:47:34:setup_element:INFO: Eye window for uplink 17: X____________________________________XXX Data delay found: 18 08:47:34:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 08:47:34:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXX_ Data delay found: 17 08:47:34:setup_element:INFO: Eye window for uplink 20: ____________________________________XXX_ Data delay found: 17 08:47:34:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 08:47:34:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX Data delay found: 18 08:47:34:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX Data delay found: 18 08:47:34:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________ Data delay found: 31 08:47:34:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________ Data delay found: 33 08:47:34:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________ Data delay found: 31 08:47:34:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________ Data delay found: 34 08:47:34:setup_element:INFO: Eye window for uplink 28: ________________XXXXXX__________________ Data delay found: 38 08:47:34:setup_element:INFO: Eye window for uplink 29: ___________________XXXXX________________ Data delay found: 1 08:47:34:setup_element:INFO: Eye window for uplink 30: __________________XXXX__________________ Data delay found: 39 08:47:34:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________ Data delay found: 39 08:47:34:setup_element:INFO: Setting the data phase to 20 for uplink 16 08:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 17 08:47:34:setup_element:INFO: Setting the data phase to 19 for uplink 18 08:47:34:setup_element:INFO: Setting the data phase to 17 for uplink 19 08:47:34:setup_element:INFO: Setting the data phase to 17 for uplink 20 08:47:34:setup_element:INFO: Setting the data phase to 16 for uplink 21 08:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 22 08:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 23 08:47:34:setup_element:INFO: Setting the data phase to 31 for uplink 24 08:47:34:setup_element:INFO: Setting the data phase to 33 for uplink 25 08:47:34:setup_element:INFO: Setting the data phase to 31 for uplink 26 08:47:34:setup_element:INFO: Setting the data phase to 34 for uplink 27 08:47:34:setup_element:INFO: Setting the data phase to 38 for uplink 28 08:47:34:setup_element:INFO: Setting the data phase to 1 for uplink 29 08:47:34:setup_element:INFO: Setting the data phase to 39 for uplink 30 08:47:34:setup_element:INFO: Setting the data phase to 39 for uplink 31 08:47:34:setup_element:INFO: Beginning SMX ASICs map scan 08:47:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:47:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:47:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:47:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 08:47:35:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 08:47:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 08:47:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 08:47:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 08:47:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 08:47:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 08:47:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 08:47:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 08:47:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 08:47:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 08:47:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 08:47:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 08:47:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 08:47:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 08:47:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 08:47:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 08:47:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 08:47:37:setup_element:INFO: Performing Elink synchronization 08:47:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:47:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:47:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:47:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 08:47:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 08:47:37:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 08:47:37:ST3_emu_feb:DEBUG: Chip address: 0x0 08:47:37:ST3_emu_feb:DEBUG: Chip address: 0x1 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x2 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x3 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x4 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x5 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x6 08:47:38:ST3_emu_feb:DEBUG: Chip address: 0x7 08:47:38:febtest:INFO: Init all SMX (CSA): 30 08:47:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:47:53:febtest:INFO: 23-00 | XA-000-08-002-001-007-017-09 | 34.6 | 1153.7 08:47:53:febtest:INFO: 30-01 | XA-000-08-002-001-007-044-00 | 44.1 | 1106.2 08:47:53:febtest:INFO: 21-02 | XA-000-08-002-001-006-139-09 | 28.2 | 1183.3 08:47:53:febtest:INFO: 28-03 | XA-000-08-002-001-008-055-03 | 53.6 | 1094.2 08:47:54:febtest:INFO: 19-04 | XA-000-08-002-001-006-098-08 | 37.7 | 1153.7 08:47:54:febtest:INFO: 26-05 | XA-000-08-002-001-008-064-15 | 37.7 | 1141.9 08:47:54:febtest:INFO: 17-06 | XA-000-08-002-001-006-104-08 | 25.1 | 1201.0 08:47:54:febtest:INFO: 24-07 | XA-000-08-002-001-006-123-15 | 34.6 | 1147.8 08:47:55:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 08:47:57:ST3_smx:INFO: chip: 23-0 34.556970 C 1165.571835 mV 08:47:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:47:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:47:57:ST3_smx:INFO: Electrons 08:47:57:ST3_smx:INFO: # loops 0 08:47:59:ST3_smx:INFO: # loops 1 08:48:00:ST3_smx:INFO: # loops 2 08:48:02:ST3_smx:INFO: # loops 3 08:48:04:ST3_smx:INFO: # loops 4 08:48:05:ST3_smx:INFO: Total # of broken channels: 0 08:48:05:ST3_smx:INFO: List of broken channels: [] 08:48:05:ST3_smx:INFO: Total # of broken channels: 0 08:48:05:ST3_smx:INFO: List of broken channels: [] 08:48:07:ST3_smx:INFO: chip: 30-1 44.073563 C 1118.096875 mV 08:48:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:07:ST3_smx:INFO: Electrons 08:48:07:ST3_smx:INFO: # loops 0 08:48:09:ST3_smx:INFO: # loops 1 08:48:10:ST3_smx:INFO: # loops 2 08:48:12:ST3_smx:INFO: # loops 3 08:48:13:ST3_smx:INFO: # loops 4 08:48:15:ST3_smx:INFO: Total # of broken channels: 0 08:48:15:ST3_smx:INFO: List of broken channels: [] 08:48:15:ST3_smx:INFO: Total # of broken channels: 1 08:48:15:ST3_smx:INFO: List of broken channels: [94] 08:48:17:ST3_smx:INFO: chip: 21-2 28.225000 C 1189.190035 mV 08:48:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:17:ST3_smx:INFO: Electrons 08:48:17:ST3_smx:INFO: # loops 0 08:48:18:ST3_smx:INFO: # loops 1 08:48:20:ST3_smx:INFO: # loops 2 08:48:21:ST3_smx:INFO: # loops 3 08:48:23:ST3_smx:INFO: # loops 4 08:48:24:ST3_smx:INFO: Total # of broken channels: 0 08:48:24:ST3_smx:INFO: List of broken channels: [] 08:48:24:ST3_smx:INFO: Total # of broken channels: 0 08:48:24:ST3_smx:INFO: List of broken channels: [] 08:48:26:ST3_smx:INFO: chip: 28-3 53.612520 C 1100.211760 mV 08:48:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:26:ST3_smx:INFO: Electrons 08:48:26:ST3_smx:INFO: # loops 0 08:48:28:ST3_smx:INFO: # loops 1 08:48:29:ST3_smx:INFO: # loops 2 08:48:31:ST3_smx:INFO: # loops 3 08:48:32:ST3_smx:INFO: # loops 4 08:48:34:ST3_smx:INFO: Total # of broken channels: 0 08:48:34:ST3_smx:INFO: List of broken channels: [] 08:48:34:ST3_smx:INFO: Total # of broken channels: 0 08:48:34:ST3_smx:INFO: List of broken channels: [] 08:48:36:ST3_smx:INFO: chip: 19-4 37.726682 C 1165.571835 mV 08:48:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:36:ST3_smx:INFO: Electrons 08:48:36:ST3_smx:INFO: # loops 0 08:48:37:ST3_smx:INFO: # loops 1 08:48:39:ST3_smx:INFO: # loops 2 08:48:41:ST3_smx:INFO: # loops 3 08:48:42:ST3_smx:INFO: # loops 4 08:48:44:ST3_smx:INFO: Total # of broken channels: 0 08:48:44:ST3_smx:INFO: List of broken channels: [] 08:48:44:ST3_smx:INFO: Total # of broken channels: 1 08:48:44:ST3_smx:INFO: List of broken channels: [17] 08:48:46:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV 08:48:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:46:ST3_smx:INFO: Electrons 08:48:46:ST3_smx:INFO: # loops 0 08:48:47:ST3_smx:INFO: # loops 1 08:48:49:ST3_smx:INFO: # loops 2 08:48:50:ST3_smx:INFO: # loops 3 08:48:52:ST3_smx:INFO: # loops 4 08:48:54:ST3_smx:INFO: Total # of broken channels: 0 08:48:54:ST3_smx:INFO: List of broken channels: [] 08:48:54:ST3_smx:INFO: Total # of broken channels: 0 08:48:54:ST3_smx:INFO: List of broken channels: [] 08:48:55:ST3_smx:INFO: chip: 17-6 28.225000 C 1212.728715 mV 08:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:48:55:ST3_smx:INFO: Electrons 08:48:55:ST3_smx:INFO: # loops 0 08:48:57:ST3_smx:INFO: # loops 1 08:48:58:ST3_smx:INFO: # loops 2 08:49:00:ST3_smx:INFO: # loops 3 08:49:02:ST3_smx:INFO: # loops 4 08:49:03:ST3_smx:INFO: Total # of broken channels: 0 08:49:03:ST3_smx:INFO: List of broken channels: [] 08:49:03:ST3_smx:INFO: Total # of broken channels: 0 08:49:03:ST3_smx:INFO: List of broken channels: [] 08:49:05:ST3_smx:INFO: chip: 24-7 37.726682 C 1159.654860 mV 08:49:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:49:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:49:05:ST3_smx:INFO: Electrons 08:49:05:ST3_smx:INFO: # loops 0 08:49:06:ST3_smx:INFO: # loops 1 08:49:08:ST3_smx:INFO: # loops 2 08:49:10:ST3_smx:INFO: # loops 3 08:49:11:ST3_smx:INFO: # loops 4 08:49:13:ST3_smx:INFO: Total # of broken channels: 0 08:49:13:ST3_smx:INFO: List of broken channels: [] 08:49:13:ST3_smx:INFO: Total # of broken channels: 0 08:49:13:ST3_smx:INFO: List of broken channels: [] 08:49:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:49:13:febtest:INFO: 23-00 | XA-000-08-002-001-007-017-09 | 34.6 | 1183.3 08:49:14:febtest:INFO: 30-01 | XA-000-08-002-001-007-044-00 | 47.3 | 1141.9 08:49:14:febtest:INFO: 21-02 | XA-000-08-002-001-006-139-09 | 31.4 | 1212.7 08:49:14:febtest:INFO: 28-03 | XA-000-08-002-001-008-055-03 | 53.6 | 1124.0 08:49:14:febtest:INFO: 19-04 | XA-000-08-002-001-006-098-08 | 37.7 | 1189.2 08:49:14:febtest:INFO: 26-05 | XA-000-08-002-001-008-064-15 | 40.9 | 1171.5 08:49:15:febtest:INFO: 17-06 | XA-000-08-002-001-006-104-08 | 28.2 | 1236.2 08:49:15:febtest:INFO: 24-07 | XA-000-08-002-001-006-123-15 | 37.7 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_08_28-08_47_14 OPERATOR : Kerstin S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2218| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 29124 | SIZE: 62x124 | GRADE: C MODULE_NAME: M8UL2B4010224A2 LADDER_NAME: L8UL201022 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4520', '1.848', '2.5360'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0620', '1.850', '2.5280'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5224']