
FEB_2219 20.08.24 10:39:57
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10:39:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:39:57:ST3_Shared:INFO: FEB-Microcable 10:39:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:39:57:febtest:INFO: Testing FEB with SN 2219 10:39:59:smx_tester:INFO: Scanning setup 10:39:59:elinks:INFO: Disabling clock on downlink 0 10:39:59:elinks:INFO: Disabling clock on downlink 1 10:39:59:elinks:INFO: Disabling clock on downlink 2 10:39:59:elinks:INFO: Disabling clock on downlink 3 10:39:59:elinks:INFO: Disabling clock on downlink 4 10:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:39:59:elinks:INFO: Disabling clock on downlink 0 10:39:59:elinks:INFO: Disabling clock on downlink 1 10:39:59:elinks:INFO: Disabling clock on downlink 2 10:39:59:elinks:INFO: Disabling clock on downlink 3 10:39:59:elinks:INFO: Disabling clock on downlink 4 10:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:39:59:elinks:INFO: Disabling clock on downlink 0 10:39:59:elinks:INFO: Disabling clock on downlink 1 10:39:59:elinks:INFO: Disabling clock on downlink 2 10:39:59:elinks:INFO: Disabling clock on downlink 3 10:39:59:elinks:INFO: Disabling clock on downlink 4 10:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:39:59:elinks:INFO: Disabling clock on downlink 0 10:39:59:elinks:INFO: Disabling clock on downlink 1 10:39:59:elinks:INFO: Disabling clock on downlink 2 10:39:59:elinks:INFO: Disabling clock on downlink 3 10:39:59:elinks:INFO: Disabling clock on downlink 4 10:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:40:00:elinks:INFO: Disabling clock on downlink 0 10:40:00:elinks:INFO: Disabling clock on downlink 1 10:40:00:elinks:INFO: Disabling clock on downlink 2 10:40:00:elinks:INFO: Disabling clock on downlink 3 10:40:00:elinks:INFO: Disabling clock on downlink 4 10:40:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:40:00:setup_element:INFO: Scanning clock phase 10:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:40:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:40:00:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 10:40:00:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 10:40:00:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 10:40:00:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 10:40:00:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 10:40:00:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 10:40:00:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:40:00:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:40:00:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2 10:40:00:setup_element:INFO: Scanning data phases 10:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:40:05:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:40:05:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________ Data delay found: 31 10:40:05:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________ Data delay found: 33 10:40:05:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________ Data delay found: 32 10:40:05:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________ Data delay found: 36 10:40:05:setup_element:INFO: Eye window for uplink 28: ________________XXXX____________________ Data delay found: 37 10:40:05:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________ Data delay found: 0 10:40:05:setup_element:INFO: Eye window for uplink 30: _________________XXXXX__________________ Data delay found: 39 10:40:05:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________ Data delay found: 38 10:40:05:setup_element:INFO: Setting the data phase to 31 for uplink 24 10:40:05:setup_element:INFO: Setting the data phase to 33 for uplink 25 10:40:05:setup_element:INFO: Setting the data phase to 32 for uplink 26 10:40:05:setup_element:INFO: Setting the data phase to 36 for uplink 27 10:40:05:setup_element:INFO: Setting the data phase to 37 for uplink 28 10:40:05:setup_element:INFO: Setting the data phase to 0 for uplink 29 10:40:05:setup_element:INFO: Setting the data phase to 39 for uplink 30 10:40:05:setup_element:INFO: Setting the data phase to 38 for uplink 31 10:40:05:setup_element:INFO: Beginning SMX ASICs map scan 10:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:40:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:40:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:40:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:40:05:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 10:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:40:08:setup_element:INFO: Performing Elink synchronization 10:40:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:40:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:40:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:40:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:40:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:40:08:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:40:08:ST3_emu_feb:DEBUG: Chip address: 0x1 10:40:08:ST3_emu_feb:DEBUG: Chip address: 0x3 10:40:08:ST3_emu_feb:DEBUG: Chip address: 0x5 10:40:09:ST3_emu_feb:DEBUG: Chip address: 0x7 10:40:09:febtest:INFO: Init all SMX (CSA): 30 10:40:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:40:16:febtest:INFO: 30-01 | XA-000-08-002-001-007-019-09 | 34.6 | 1153.7 10:40:17:febtest:INFO: 28-03 | XA-000-08-002-001-006-112-15 | 15.6 | 1212.7 10:40:17:febtest:INFO: 26-05 | XA-000-08-002-001-006-117-15 | 34.6 | 1147.8 10:40:17:febtest:INFO: 24-07 | XA-000-08-002-001-007-038-00 | 37.7 | 1141.9 10:40:18:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:40:20:ST3_smx:INFO: chip: 30-1 34.556970 C 1165.571835 mV 10:40:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:20:ST3_smx:INFO: Electrons 10:40:20:ST3_smx:INFO: # loops 0 10:40:22:ST3_smx:INFO: # loops 1 10:40:23:ST3_smx:INFO: # loops 2 10:40:25:ST3_smx:INFO: Total # of broken channels: 0 10:40:25:ST3_smx:INFO: List of broken channels: [] 10:40:25:ST3_smx:INFO: Total # of broken channels: 0 10:40:25:ST3_smx:INFO: List of broken channels: [] 10:40:27:ST3_smx:INFO: chip: 28-3 15.590880 C 1224.468235 mV 10:40:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:27:ST3_smx:INFO: Electrons 10:40:27:ST3_smx:INFO: # loops 0 10:40:28:ST3_smx:INFO: # loops 1 10:40:30:ST3_smx:INFO: # loops 2 10:40:32:ST3_smx:INFO: Total # of broken channels: 0 10:40:32:ST3_smx:INFO: List of broken channels: [] 10:40:32:ST3_smx:INFO: Total # of broken channels: 0 10:40:32:ST3_smx:INFO: List of broken channels: [] 10:40:33:ST3_smx:INFO: chip: 26-5 34.556970 C 1153.732915 mV 10:40:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:33:ST3_smx:INFO: Electrons 10:40:33:ST3_smx:INFO: # loops 0 10:40:35:ST3_smx:INFO: # loops 1 10:40:37:ST3_smx:INFO: # loops 2 10:40:38:ST3_smx:INFO: Total # of broken channels: 0 10:40:38:ST3_smx:INFO: List of broken channels: [] 10:40:38:ST3_smx:INFO: Total # of broken channels: 0 10:40:38:ST3_smx:INFO: List of broken channels: [] 10:40:40:ST3_smx:INFO: chip: 24-7 37.726682 C 1147.806000 mV 10:40:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:40:40:ST3_smx:INFO: Electrons 10:40:40:ST3_smx:INFO: # loops 0 10:40:42:ST3_smx:INFO: # loops 1 10:40:43:ST3_smx:INFO: # loops 2 10:40:45:ST3_smx:INFO: Total # of broken channels: 0 10:40:45:ST3_smx:INFO: List of broken channels: [] 10:40:45:ST3_smx:INFO: Total # of broken channels: 0 10:40:45:ST3_smx:INFO: List of broken channels: [] 10:40:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:40:46:febtest:INFO: 30-01 | XA-000-08-002-001-007-019-09 | 34.6 | 1189.2 10:40:46:febtest:INFO: 28-03 | XA-000-08-002-001-006-112-15 | 15.6 | 1247.9 10:40:46:febtest:INFO: 26-05 | XA-000-08-002-001-006-117-15 | 34.6 | 1177.4 10:40:46:febtest:INFO: 24-07 | XA-000-08-002-001-007-038-00 | 37.7 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_08_20-10_39_57 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2219| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7263', '1.848', '1.2400'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0110', '1.850', '1.2950'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9870', '1.850', '0.2655']