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FEB_2220 21.08.24 07:44:40
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07:44:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:44:40:ST3_Shared:INFO: FEB-Sensor
07:44:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:45:12:ST3_ModuleSelector:INFO: M8UL2T3010223B2
07:45:12:ST3_ModuleSelector:INFO: 12044
07:45:12:febtest:INFO: Testing FEB with SN 2220
07:45:13:smx_tester:INFO: Scanning setup
07:45:13:elinks:INFO: Disabling clock on downlink 0
07:45:13:elinks:INFO: Disabling clock on downlink 1
07:45:13:elinks:INFO: Disabling clock on downlink 2
07:45:13:elinks:INFO: Disabling clock on downlink 3
07:45:13:elinks:INFO: Disabling clock on downlink 4
07:45:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:14:elinks:INFO: Disabling clock on downlink 0
07:45:14:elinks:INFO: Disabling clock on downlink 1
07:45:14:elinks:INFO: Disabling clock on downlink 2
07:45:14:elinks:INFO: Disabling clock on downlink 3
07:45:14:elinks:INFO: Disabling clock on downlink 4
07:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:14:elinks:INFO: Disabling clock on downlink 0
07:45:14:elinks:INFO: Disabling clock on downlink 1
07:45:14:elinks:INFO: Disabling clock on downlink 2
07:45:14:elinks:INFO: Disabling clock on downlink 3
07:45:14:elinks:INFO: Disabling clock on downlink 4
07:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:14:elinks:INFO: Disabling clock on downlink 0
07:45:14:elinks:INFO: Disabling clock on downlink 1
07:45:14:elinks:INFO: Disabling clock on downlink 2
07:45:14:elinks:INFO: Disabling clock on downlink 3
07:45:14:elinks:INFO: Disabling clock on downlink 4
07:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:14:elinks:INFO: Disabling clock on downlink 0
07:45:14:elinks:INFO: Disabling clock on downlink 1
07:45:14:elinks:INFO: Disabling clock on downlink 2
07:45:14:elinks:INFO: Disabling clock on downlink 3
07:45:14:elinks:INFO: Disabling clock on downlink 4
07:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:14:setup_element:INFO: Scanning clock phase
07:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:45:15:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:45:15:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:45:15:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
07:45:15:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
07:45:15:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:45:15:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:45:15:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:45:15:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:45:15:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:45:15:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:45:15:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:45:15:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:45:15:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:45:15:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
07:45:15:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:45:15:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:45:15:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
07:45:15:setup_element:INFO: Scanning data phases
07:45:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:45:20:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
07:45:20:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
07:45:20:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
07:45:20:setup_element:INFO: Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
07:45:20:setup_element:INFO: Eye window for uplink 20: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
07:45:20:setup_element:INFO: Eye window for uplink 21: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
07:45:20:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
07:45:20:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
07:45:20:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
07:45:20:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
07:45:20:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
07:45:20:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
07:45:20:setup_element:INFO: Eye window for uplink 28: _________XXXXXX____________________XXXXX
Data delay found: 24
07:45:20:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX__________________XXXXX
Data delay found: 25
07:45:20:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
07:45:20:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
07:45:20:setup_element:INFO: Setting the data phase to 21 for uplink 16
07:45:20:setup_element:INFO: Setting the data phase to 19 for uplink 17
07:45:20:setup_element:INFO: Setting the data phase to 20 for uplink 18
07:45:20:setup_element:INFO: Setting the data phase to 18 for uplink 19
07:45:20:setup_element:INFO: Setting the data phase to 4 for uplink 20
07:45:20:setup_element:INFO: Setting the data phase to 4 for uplink 21
07:45:20:setup_element:INFO: Setting the data phase to 20 for uplink 22
07:45:20:setup_element:INFO: Setting the data phase to 20 for uplink 23
07:45:20:setup_element:INFO: Setting the data phase to 29 for uplink 24
07:45:20:setup_element:INFO: Setting the data phase to 30 for uplink 25
07:45:20:setup_element:INFO: Setting the data phase to 30 for uplink 26
07:45:20:setup_element:INFO: Setting the data phase to 34 for uplink 27
07:45:20:setup_element:INFO: Setting the data phase to 24 for uplink 28
07:45:20:setup_element:INFO: Setting the data phase to 25 for uplink 29
07:45:20:setup_element:INFO: Setting the data phase to 37 for uplink 30
07:45:20:setup_element:INFO: Setting the data phase to 38 for uplink 31
07:45:20:setup_element:INFO: Beginning SMX ASICs map scan
07:45:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:45:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:45:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:45:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:45:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:45:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:45:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:45:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:45:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:45:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:45:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:45:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:45:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:45:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:45:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:45:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:45:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:45:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:45:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:45:23:setup_element:INFO: Performing Elink synchronization
07:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:45:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:45:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:45:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x0
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x1
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x2
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x3
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x4
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x5
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x6
07:45:24:ST3_emu_feb:DEBUG: Chip address: 0x7
07:45:24:febtest:INFO: Init all SMX (CSA): 30
07:45:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:45:38:febtest:INFO: 23-00 | XA-000-08-002-003-006-097-01 | 31.4 | 1159.7
07:45:38:febtest:INFO: 30-01 | XA-000-08-002-003-006-098-01 | 40.9 | 1124.0
07:45:39:febtest:INFO: 21-02 | XA-000-08-002-003-007-004-07 | 63.2 | 1076.3
07:45:39:febtest:INFO: 28-03 | XA-000-08-002-003-007-002-07 | 56.8 | 1088.3
07:45:39:febtest:INFO: 19-04 | XA-000-08-002-003-006-095-08 | 50.4 | 1106.2
07:45:39:febtest:INFO: 26-05 | XA-000-08-002-003-006-093-08 | 40.9 | 1124.0
07:45:40:febtest:INFO: 17-06 | XA-000-08-002-003-006-104-01 | 40.9 | 1124.0
07:45:40:febtest:INFO: 24-07 | XA-000-08-002-003-006-094-08 | 37.7 | 1147.8
07:45:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:45:43:ST3_smx:INFO: chip: 23-0 34.556970 C 1171.483840 mV
07:45:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:43:ST3_smx:INFO: Electrons
07:45:43:ST3_smx:INFO: # loops 0
07:45:44:ST3_smx:INFO: # loops 1
07:45:46:ST3_smx:INFO: # loops 2
07:45:48:ST3_smx:INFO: # loops 3
07:45:49:ST3_smx:INFO: # loops 4
07:45:51:ST3_smx:INFO: Total # of broken channels: 0
07:45:51:ST3_smx:INFO: List of broken channels: []
07:45:51:ST3_smx:INFO: Total # of broken channels: 0
07:45:51:ST3_smx:INFO: List of broken channels: []
07:45:53:ST3_smx:INFO: chip: 30-1 40.898880 C 1135.937260 mV
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_smx:INFO: Electrons
07:45:53:ST3_smx:INFO: # loops 0
07:45:54:ST3_smx:INFO: # loops 1
07:45:56:ST3_smx:INFO: # loops 2
07:45:57:ST3_smx:INFO: # loops 3
07:45:59:ST3_smx:INFO: # loops 4
07:46:01:ST3_smx:INFO: Total # of broken channels: 0
07:46:01:ST3_smx:INFO: List of broken channels: []
07:46:01:ST3_smx:INFO: Total # of broken channels: 0
07:46:01:ST3_smx:INFO: List of broken channels: []
07:46:03:ST3_smx:INFO: chip: 21-2 69.560482 C 1088.263500 mV
07:46:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:03:ST3_smx:INFO: Electrons
07:46:03:ST3_smx:INFO: # loops 0
07:46:04:ST3_smx:INFO: # loops 1
07:46:06:ST3_smx:INFO: # loops 2
07:46:07:ST3_smx:INFO: # loops 3
07:46:09:ST3_smx:INFO: # loops 4
07:46:11:ST3_smx:INFO: Total # of broken channels: 0
07:46:11:ST3_smx:INFO: List of broken channels: []
07:46:11:ST3_smx:INFO: Total # of broken channels: 4
07:46:11:ST3_smx:INFO: List of broken channels: [103, 111, 125, 127]
07:46:13:ST3_smx:INFO: chip: 28-3 56.797143 C 1100.211760 mV
07:46:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:13:ST3_smx:INFO: Electrons
07:46:13:ST3_smx:INFO: # loops 0
07:46:14:ST3_smx:INFO: # loops 1
07:46:16:ST3_smx:INFO: # loops 2
07:46:17:ST3_smx:INFO: # loops 3
07:46:19:ST3_smx:INFO: # loops 4
07:46:21:ST3_smx:INFO: Total # of broken channels: 0
07:46:21:ST3_smx:INFO: List of broken channels: []
07:46:21:ST3_smx:INFO: Total # of broken channels: 0
07:46:21:ST3_smx:INFO: List of broken channels: []
07:46:22:ST3_smx:INFO: chip: 19-4 56.797143 C 1118.096875 mV
07:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:22:ST3_smx:INFO: Electrons
07:46:22:ST3_smx:INFO: # loops 0
07:46:24:ST3_smx:INFO: # loops 1
07:46:26:ST3_smx:INFO: # loops 2
07:46:27:ST3_smx:INFO: # loops 3
07:46:29:ST3_smx:INFO: # loops 4
07:46:30:ST3_smx:INFO: Total # of broken channels: 0
07:46:30:ST3_smx:INFO: List of broken channels: []
07:46:30:ST3_smx:INFO: Total # of broken channels: 1
07:46:30:ST3_smx:INFO: List of broken channels: [127]
07:46:32:ST3_smx:INFO: chip: 26-5 40.898880 C 1141.874115 mV
07:46:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:32:ST3_smx:INFO: Electrons
07:46:32:ST3_smx:INFO: # loops 0
07:46:34:ST3_smx:INFO: # loops 1
07:46:35:ST3_smx:INFO: # loops 2
07:46:37:ST3_smx:INFO: # loops 3
07:46:39:ST3_smx:INFO: # loops 4
07:46:40:ST3_smx:INFO: Total # of broken channels: 0
07:46:40:ST3_smx:INFO: List of broken channels: []
07:46:40:ST3_smx:INFO: Total # of broken channels: 0
07:46:40:ST3_smx:INFO: List of broken channels: []
07:46:42:ST3_smx:INFO: chip: 17-6 47.250730 C 1135.937260 mV
07:46:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:42:ST3_smx:INFO: Electrons
07:46:42:ST3_smx:INFO: # loops 0
07:46:44:ST3_smx:INFO: # loops 1
07:46:45:ST3_smx:INFO: # loops 2
07:46:47:ST3_smx:INFO: # loops 3
07:46:48:ST3_smx:INFO: # loops 4
07:46:50:ST3_smx:INFO: Total # of broken channels: 0
07:46:50:ST3_smx:INFO: List of broken channels: []
07:46:50:ST3_smx:INFO: Total # of broken channels: 0
07:46:50:ST3_smx:INFO: List of broken channels: []
07:46:52:ST3_smx:INFO: chip: 24-7 40.898880 C 1153.732915 mV
07:46:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:52:ST3_smx:INFO: Electrons
07:46:52:ST3_smx:INFO: # loops 0
07:46:53:ST3_smx:INFO: # loops 1
07:46:55:ST3_smx:INFO: # loops 2
07:46:57:ST3_smx:INFO: # loops 3
07:46:58:ST3_smx:INFO: # loops 4
07:47:00:ST3_smx:INFO: Total # of broken channels: 0
07:47:00:ST3_smx:INFO: List of broken channels: []
07:47:00:ST3_smx:INFO: Total # of broken channels: 0
07:47:00:ST3_smx:INFO: List of broken channels: []
07:47:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:47:00:febtest:INFO: 23-00 | XA-000-08-002-003-006-097-01 | 37.7 | 1189.2
07:47:00:febtest:INFO: 30-01 | XA-000-08-002-003-006-098-01 | 44.1 | 1159.7
07:47:01:febtest:INFO: 21-02 | XA-000-08-002-003-007-004-07 | 69.6 | 1106.2
07:47:01:febtest:INFO: 28-03 | XA-000-08-002-003-007-002-07 | 60.0 | 1118.1
07:47:01:febtest:INFO: 19-04 | XA-000-08-002-003-006-095-08 | 56.8 | 1135.9
07:47:01:febtest:INFO: 26-05 | XA-000-08-002-003-006-093-08 | 44.1 | 1159.7
07:47:02:febtest:INFO: 17-06 | XA-000-08-002-003-006-104-01 | 50.4 | 1147.8
07:47:02:febtest:INFO: 24-07 | XA-000-08-002-003-006-094-08 | 44.1 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_21-07_44_40
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2220| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 12044 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL2T3010223B2
LADDER_NAME: L8UL201022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5940', '1.848', '2.5660']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0900', '1.850', '2.7760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '0.7829']