13:55:24:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:24:ST3_Shared:INFO:	                       FEB-Microcable                       
13:55:24:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:24:febtest:INFO:	Testing FEB with SN 2221
13:55:25:smx_tester:INFO:	Scanning setup
13:55:25:elinks:INFO:	Disabling clock on downlink 0
13:55:25:elinks:INFO:	Disabling clock on downlink 1
13:55:25:elinks:INFO:	Disabling clock on downlink 2
13:55:25:elinks:INFO:	Disabling clock on downlink 3
13:55:25:elinks:INFO:	Disabling clock on downlink 4
13:55:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:55:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:25:elinks:INFO:	Disabling clock on downlink 0
13:55:25:elinks:INFO:	Disabling clock on downlink 1
13:55:25:elinks:INFO:	Disabling clock on downlink 2
13:55:25:elinks:INFO:	Disabling clock on downlink 3
13:55:25:elinks:INFO:	Disabling clock on downlink 4
13:55:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO:	Disabling clock on downlink 0
13:55:26:elinks:INFO:	Disabling clock on downlink 1
13:55:26:elinks:INFO:	Disabling clock on downlink 2
13:55:26:elinks:INFO:	Disabling clock on downlink 3
13:55:26:elinks:INFO:	Disabling clock on downlink 4
13:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:55:26:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO:	Disabling clock on downlink 0
13:55:26:elinks:INFO:	Disabling clock on downlink 1
13:55:26:elinks:INFO:	Disabling clock on downlink 2
13:55:26:elinks:INFO:	Disabling clock on downlink 3
13:55:26:elinks:INFO:	Disabling clock on downlink 4
13:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO:	Disabling clock on downlink 0
13:55:26:elinks:INFO:	Disabling clock on downlink 1
13:55:26:elinks:INFO:	Disabling clock on downlink 2
13:55:26:elinks:INFO:	Disabling clock on downlink 3
13:55:26:elinks:INFO:	Disabling clock on downlink 4
13:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:55:26:setup_element:INFO:	Scanning clock phase
13:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:26:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:55:26:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 18: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 19: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 20: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 21: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 22: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 23: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
13:55:26:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:55:26:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
13:55:26:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
13:55:26:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:55:26:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:55:26:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
13:55:26:setup_element:INFO:	Scanning data phases
13:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:32:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:55:32:setup_element:INFO:	Eye window for uplink 16: _________________________________XXXX___
Data delay found: 14
13:55:32:setup_element:INFO:	Eye window for uplink 17: ______________________________XXXXX_____
Data delay found: 12
13:55:32:setup_element:INFO:	Eye window for uplink 18: ________________________________XXXXXX__
Data delay found: 14
13:55:32:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXX____
Data delay found: 13
13:55:32:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
13:55:32:setup_element:INFO:	Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
13:55:32:setup_element:INFO:	Eye window for uplink 22: __________________________________XXXXX_
Data delay found: 16
13:55:32:setup_element:INFO:	Eye window for uplink 23: XXXX___________________________XXXXXXXXX
Data delay found: 17
13:55:32:setup_element:INFO:	Eye window for uplink 24: __XXXXXX________________________________
Data delay found: 24
13:55:32:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
13:55:32:setup_element:INFO:	Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
13:55:32:setup_element:INFO:	Eye window for uplink 27: _______XXXXXX___________________________
Data delay found: 29
13:55:32:setup_element:INFO:	Eye window for uplink 28: _______XXXXX____________________________
Data delay found: 29
13:55:32:setup_element:INFO:	Eye window for uplink 29: _________XXXXXX_________________________
Data delay found: 31
13:55:32:setup_element:INFO:	Eye window for uplink 30: _________XXXXXX_________________________
Data delay found: 31
13:55:32:setup_element:INFO:	Eye window for uplink 31: ________XXXXXXX_________________________
Data delay found: 31
13:55:32:setup_element:INFO:	Setting the data phase to 14 for uplink 16
13:55:32:setup_element:INFO:	Setting the data phase to 12 for uplink 17
13:55:32:setup_element:INFO:	Setting the data phase to 14 for uplink 18
13:55:32:setup_element:INFO:	Setting the data phase to 13 for uplink 19
13:55:32:setup_element:INFO:	Setting the data phase to 15 for uplink 20
13:55:32:setup_element:INFO:	Setting the data phase to 14 for uplink 21
13:55:32:setup_element:INFO:	Setting the data phase to 16 for uplink 22
13:55:32:setup_element:INFO:	Setting the data phase to 17 for uplink 23
13:55:32:setup_element:INFO:	Setting the data phase to 24 for uplink 24
13:55:32:setup_element:INFO:	Setting the data phase to 26 for uplink 25
13:55:32:setup_element:INFO:	Setting the data phase to 26 for uplink 26
13:55:32:setup_element:INFO:	Setting the data phase to 29 for uplink 27
13:55:32:setup_element:INFO:	Setting the data phase to 29 for uplink 28
13:55:32:setup_element:INFO:	Setting the data phase to 31 for uplink 29
13:55:32:setup_element:INFO:	Setting the data phase to 31 for uplink 30
13:55:32:setup_element:INFO:	Setting the data phase to 31 for uplink 31
13:55:32:setup_element:INFO:	Beginning SMX ASICs map scan
13:55:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:55:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:32:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:55:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:55:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:55:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:55:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:55:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:55:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:55:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:55:33:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:55:33:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:55:33:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:55:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:55:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:55:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:55:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:55:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:55:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:55:35:setup_element:INFO:	Performing Elink synchronization
13:55:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:55:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:35:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:55:35:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:35:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:55:35:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:55:35:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:55:36:febtest:INFO:	Init all SMX (CSA): 30
13:55:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:50:febtest:INFO:	23-00 | XA-012-08-002-003-007-021-09 |  53.6 | 1118.1
13:55:50:febtest:INFO:	30-01 | XA-017-08-002-003-007-021-14 |  56.8 | 1100.2
13:55:50:febtest:INFO:	21-02 | XA-011-08-002-003-007-021-10 |  63.2 | 1082.3
13:55:51:febtest:INFO:	28-03 | XA-016-08-002-003-007-021-05 |  53.6 | 1112.1
13:55:51:febtest:INFO:	19-04 | XA-010-08-002-003-007-021-01 |  31.4 | 1183.3
13:55:51:febtest:INFO:	26-05 | XA-015-08-002-003-007-021-13 |  69.6 | 1052.3
13:55:51:febtest:INFO:	17-06 | XA-009-08-002-003-007-021-05 |  60.0 | 1106.2
13:55:52:febtest:INFO:	24-07 | XA-014-08-002-003-007-021-06 |  44.1 | 1135.9
13:55:53:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:55:55:ST3_smx:INFO:	chip: 23-0 	 53.612520 C 	 1129.995435 mV
13:55:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:55:55:ST3_smx:INFO:		Electrons
13:55:55:ST3_smx:INFO:	# loops 0
13:55:56:ST3_smx:INFO:	# loops 1
13:55:58:ST3_smx:INFO:	# loops 2
13:55:59:ST3_smx:INFO:	Total # of broken channels: 0
13:55:59:ST3_smx:INFO:	List of broken channels: []
13:55:59:ST3_smx:INFO:	Total # of broken channels: 0
13:55:59:ST3_smx:INFO:	List of broken channels: []
13:56:01:ST3_smx:INFO:	chip: 30-1 	 56.797143 C 	 1112.140140 mV
13:56:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:01:ST3_smx:INFO:		Electrons
13:56:01:ST3_smx:INFO:	# loops 0
13:56:03:ST3_smx:INFO:	# loops 1
13:56:04:ST3_smx:INFO:	# loops 2
13:56:06:ST3_smx:INFO:	Total # of broken channels: 0
13:56:06:ST3_smx:INFO:	List of broken channels: []
13:56:06:ST3_smx:INFO:	Total # of broken channels: 0
13:56:06:ST3_smx:INFO:	List of broken channels: []
13:56:08:ST3_smx:INFO:	chip: 21-2 	 66.365920 C 	 1094.240115 mV
13:56:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:08:ST3_smx:INFO:		Electrons
13:56:08:ST3_smx:INFO:	# loops 0
13:56:09:ST3_smx:INFO:	# loops 1
13:56:11:ST3_smx:INFO:	# loops 2
13:56:13:ST3_smx:INFO:	Total # of broken channels: 4
13:56:13:ST3_smx:INFO:	List of broken channels: [115, 117, 123, 127]
13:56:13:ST3_smx:INFO:	Total # of broken channels: 42
13:56:13:ST3_smx:INFO:	List of broken channels: [12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 34, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 84, 86, 90, 94, 96, 98, 104, 115, 117, 123, 127]
13:56:14:ST3_smx:INFO:	chip: 28-3 	 56.797143 C 	 1129.995435 mV
13:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:14:ST3_smx:INFO:		Electrons
13:56:14:ST3_smx:INFO:	# loops 0
13:56:16:ST3_smx:INFO:	# loops 1
13:56:18:ST3_smx:INFO:	# loops 2
13:56:20:ST3_smx:INFO:	Total # of broken channels: 0
13:56:20:ST3_smx:INFO:	List of broken channels: []
13:56:20:ST3_smx:INFO:	Total # of broken channels: 0
13:56:20:ST3_smx:INFO:	List of broken channels: []
13:56:22:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1195.082160 mV
13:56:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:22:ST3_smx:INFO:		Electrons
13:56:22:ST3_smx:INFO:	# loops 0
13:56:24:ST3_smx:INFO:	# loops 1
13:56:26:ST3_smx:INFO:	# loops 2
13:56:28:ST3_smx:INFO:	Total # of broken channels: 0
13:56:28:ST3_smx:INFO:	List of broken channels: []
13:56:28:ST3_smx:INFO:	Total # of broken channels: 0
13:56:28:ST3_smx:INFO:	List of broken channels: []
13:56:30:ST3_smx:INFO:	chip: 26-5 	 69.560482 C 	 1064.307340 mV
13:56:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:30:ST3_smx:INFO:		Electrons
13:56:30:ST3_smx:INFO:	# loops 0
13:56:32:ST3_smx:INFO:	# loops 1
13:56:33:ST3_smx:INFO:	# loops 2
13:56:35:ST3_smx:INFO:	Total # of broken channels: 0
13:56:35:ST3_smx:INFO:	List of broken channels: []
13:56:35:ST3_smx:INFO:	Total # of broken channels: 19
13:56:35:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37]
13:56:37:ST3_smx:INFO:	chip: 17-6 	 59.984250 C 	 1118.096875 mV
13:56:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:37:ST3_smx:INFO:		Electrons
13:56:37:ST3_smx:INFO:	# loops 0
13:56:38:ST3_smx:INFO:	# loops 1
13:56:40:ST3_smx:INFO:	# loops 2
13:56:42:ST3_smx:INFO:	Total # of broken channels: 0
13:56:42:ST3_smx:INFO:	List of broken channels: []
13:56:42:ST3_smx:INFO:	Total # of broken channels: 2
13:56:42:ST3_smx:INFO:	List of broken channels: [125, 127]
13:56:44:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1147.806000 mV
13:56:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:56:44:ST3_smx:INFO:		Electrons
13:56:44:ST3_smx:INFO:	# loops 0
13:56:45:ST3_smx:INFO:	# loops 1
13:56:47:ST3_smx:INFO:	# loops 2
13:56:48:ST3_smx:INFO:	Total # of broken channels: 0
13:56:48:ST3_smx:INFO:	List of broken channels: []
13:56:48:ST3_smx:INFO:	Total # of broken channels: 0
13:56:48:ST3_smx:INFO:	List of broken channels: []
13:56:49:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:56:49:febtest:INFO:	23-00 | XA-012-08-002-003-007-021-09 |  56.8 | 1153.7
13:56:49:febtest:INFO:	30-01 | XA-017-08-002-003-007-021-14 |  60.0 | 1135.9
13:56:49:febtest:INFO:	21-02 | XA-011-08-002-003-007-021-10 |  66.4 | 1112.1
13:56:50:febtest:INFO:	28-03 | XA-016-08-002-003-007-021-05 |  56.8 | 1147.8
13:56:50:febtest:INFO:	19-04 | XA-010-08-002-003-007-021-01 |  34.6 | 1218.6
13:56:50:febtest:INFO:	26-05 | XA-015-08-002-003-007-021-13 |  72.8 | 1088.3
13:56:50:febtest:INFO:	17-06 | XA-009-08-002-003-007-021-05 |  63.2 | 1135.9
13:56:51:febtest:INFO:	24-07 | XA-014-08-002-003-007-021-06 |  47.3 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_19-13_55_24
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2221| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4080', '1.848', '2.6760']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0260', '1.850', '2.6980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '0.5300']