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FEB_2222 21.08.24 11:24:44
Info
11:24:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:44:ST3_Shared:INFO: FEB-Microcable
11:24:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:24:44:febtest:INFO: Testing FEB with SN 2222
11:24:46:smx_tester:INFO: Scanning setup
11:24:46:elinks:INFO: Disabling clock on downlink 0
11:24:46:elinks:INFO: Disabling clock on downlink 1
11:24:46:elinks:INFO: Disabling clock on downlink 2
11:24:46:elinks:INFO: Disabling clock on downlink 3
11:24:46:elinks:INFO: Disabling clock on downlink 4
11:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:24:46:elinks:INFO: Disabling clock on downlink 0
11:24:46:elinks:INFO: Disabling clock on downlink 1
11:24:46:elinks:INFO: Disabling clock on downlink 2
11:24:46:elinks:INFO: Disabling clock on downlink 3
11:24:46:elinks:INFO: Disabling clock on downlink 4
11:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:24:46:elinks:INFO: Disabling clock on downlink 0
11:24:46:elinks:INFO: Disabling clock on downlink 1
11:24:46:elinks:INFO: Disabling clock on downlink 2
11:24:46:elinks:INFO: Disabling clock on downlink 3
11:24:46:elinks:INFO: Disabling clock on downlink 4
11:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:24:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:24:46:elinks:INFO: Disabling clock on downlink 0
11:24:46:elinks:INFO: Disabling clock on downlink 1
11:24:46:elinks:INFO: Disabling clock on downlink 2
11:24:46:elinks:INFO: Disabling clock on downlink 3
11:24:46:elinks:INFO: Disabling clock on downlink 4
11:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:24:46:elinks:INFO: Disabling clock on downlink 0
11:24:46:elinks:INFO: Disabling clock on downlink 1
11:24:46:elinks:INFO: Disabling clock on downlink 2
11:24:46:elinks:INFO: Disabling clock on downlink 3
11:24:46:elinks:INFO: Disabling clock on downlink 4
11:24:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:24:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:24:46:setup_element:INFO: Scanning clock phase
11:24:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:24:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:24:47:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:24:47:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:24:47:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:24:47:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:24:47:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:24:47:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:24:47:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:24:47:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:24:47:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:24:47:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:24:47:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
11:24:47:setup_element:INFO: Scanning data phases
11:24:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:24:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:24:52:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:24:52:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
11:24:52:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
11:24:52:setup_element:INFO: Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
11:24:52:setup_element:INFO: Eye window for uplink 19: ___________________________________XXXXX
Data delay found: 17
11:24:52:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
11:24:52:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
11:24:52:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
11:24:52:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
11:24:52:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
11:24:52:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
11:24:52:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:24:52:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
11:24:52:setup_element:INFO: Eye window for uplink 30: ________XXXXXXXXXXXXXXX_________________
Data delay found: 35
11:24:52:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXXXXXXXX_________________
Data delay found: 35
11:24:52:setup_element:INFO: Setting the data phase to 18 for uplink 16
11:24:52:setup_element:INFO: Setting the data phase to 16 for uplink 17
11:24:52:setup_element:INFO: Setting the data phase to 19 for uplink 18
11:24:52:setup_element:INFO: Setting the data phase to 17 for uplink 19
11:24:52:setup_element:INFO: Setting the data phase to 18 for uplink 20
11:24:52:setup_element:INFO: Setting the data phase to 16 for uplink 21
11:24:52:setup_element:INFO: Setting the data phase to 28 for uplink 24
11:24:52:setup_element:INFO: Setting the data phase to 30 for uplink 25
11:24:52:setup_element:INFO: Setting the data phase to 29 for uplink 26
11:24:52:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:24:52:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:24:52:setup_element:INFO: Setting the data phase to 35 for uplink 29
11:24:52:setup_element:INFO: Setting the data phase to 35 for uplink 30
11:24:52:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:24:52:setup_element:INFO: Beginning SMX ASICs map scan
11:24:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:24:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:24:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:24:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:24:52:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
11:24:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:24:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:24:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:24:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:24:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:24:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:24:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:24:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:24:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:24:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:24:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:24:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:24:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:24:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:24:55:setup_element:INFO: Performing Elink synchronization
11:24:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:24:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:24:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:24:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:24:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:24:55:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x1
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x2
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x3
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x4
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x5
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x6
11:24:56:ST3_emu_feb:DEBUG: Chip address: 0x7
11:24:56:febtest:INFO: Init all SMX (CSA): 30
11:25:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:25:09:febtest:INFO: 30-01 | XA-000-08-002-002-007-209-07 | 34.6 | 1153.7
11:25:09:febtest:INFO: 21-02 | XA-000-08-002-002-007-201-00 | 37.7 | 1147.8
11:25:09:febtest:INFO: 28-03 | XA-000-08-002-002-007-206-00 | 37.7 | 1141.9
11:25:09:febtest:INFO: 19-04 | XA-000-08-002-002-007-202-00 | 28.2 | 1183.3
11:25:10:febtest:INFO: 26-05 | XA-000-08-002-002-007-205-00 | 18.7 | 1218.6
11:25:10:febtest:INFO: 17-06 | XA-000-08-002-002-007-203-00 | 18.7 | 1218.6
11:25:10:febtest:INFO: 24-07 | XA-000-08-002-002-007-204-00 | 25.1 | 1183.3
11:25:11:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:25:12:febtest:ERROR: HW addres 1 != 0
11:25:16:ST3_smx:INFO: chip: 30-1 31.389742 C 1165.571835 mV
11:25:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:16:ST3_smx:INFO: Electrons
11:25:16:ST3_smx:INFO: # loops 0
11:25:18:ST3_smx:INFO: # loops 1
11:25:20:ST3_smx:INFO: # loops 2
11:25:21:ST3_smx:INFO: Total # of broken channels: 3
11:25:21:ST3_smx:INFO: List of broken channels: [105, 107, 113]
11:25:21:ST3_smx:INFO: Total # of broken channels: 64
11:25:21:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:25:23:ST3_smx:INFO: chip: 21-2 37.726682 C 1153.732915 mV
11:25:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:23:ST3_smx:INFO: Electrons
11:25:23:ST3_smx:INFO: # loops 0
11:25:25:ST3_smx:INFO: # loops 1
11:25:26:ST3_smx:INFO: # loops 2
11:25:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:28:ST3_smx:INFO: Total # of broken channels: 169
11:25:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 27, 35, 39, 67, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
11:25:28:ST3_smx:INFO: Total # of broken channels: 192
11:25:28:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:25:29:ST3_smx:INFO: chip: 28-3 37.726682 C 1153.732915 mV
11:25:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:29:ST3_smx:INFO: Electrons
11:25:29:ST3_smx:INFO: # loops 0
11:25:31:ST3_smx:INFO: # loops 1
11:25:33:ST3_smx:INFO: # loops 2
11:25:34:ST3_smx:INFO: Total # of broken channels: 5
11:25:34:ST3_smx:INFO: List of broken channels: [119, 121, 123, 125, 127]
11:25:34:ST3_smx:INFO: Total # of broken channels: 47
11:25:34:ST3_smx:INFO: List of broken channels: [29, 31, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:25:36:ST3_smx:INFO: chip: 19-4 28.225000 C 1189.190035 mV
11:25:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:36:ST3_smx:INFO: Electrons
11:25:36:ST3_smx:INFO: # loops 0
11:25:38:ST3_smx:INFO: # loops 1
11:25:39:ST3_smx:INFO: # loops 2
11:25:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:41:ST3_smx:INFO: Total # of broken channels: 199
11:25:41:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 3, 5, 6, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124]
11:25:41:ST3_smx:INFO: Total # of broken channels: 244
11:25:41:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 69, 70, 71, 73, 74, 75, 77, 79, 80, 81, 82, 83, 84, 85, 86, 87, 89, 90, 91, 93, 94, 95, 97, 98, 99, 101, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126]
11:25:43:ST3_smx:INFO: chip: 26-5 18.745682 C 1230.330540 mV
11:25:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:43:ST3_smx:INFO: Electrons
11:25:43:ST3_smx:INFO: # loops 0
11:25:44:ST3_smx:INFO: # loops 1
11:25:46:ST3_smx:INFO: # loops 2
11:25:48:ST3_smx:INFO: Total # of broken channels: 1
11:25:48:ST3_smx:INFO: List of broken channels: [9]
11:25:48:ST3_smx:INFO: Total # of broken channels: 58
11:25:48:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 117, 119]
11:25:49:ST3_smx:INFO: chip: 17-6 18.745682 C 1224.468235 mV
11:25:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:49:ST3_smx:INFO: Electrons
11:25:49:ST3_smx:INFO: # loops 0
11:25:51:ST3_smx:INFO: # loops 1
11:25:53:ST3_smx:INFO: # loops 2
11:25:54:ST3_smx:INFO: Total # of broken channels: 1
11:25:54:ST3_smx:INFO: List of broken channels: [13]
11:25:54:ST3_smx:INFO: Total # of broken channels: 64
11:25:54:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:25:56:ST3_smx:INFO: chip: 24-7 25.062742 C 1195.082160 mV
11:25:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:25:56:ST3_smx:INFO: Electrons
11:25:56:ST3_smx:INFO: # loops 0
11:25:57:ST3_smx:INFO: # loops 1
11:25:59:ST3_smx:INFO: # loops 2
11:26:01:ST3_smx:INFO: Total # of broken channels: 7
11:26:01:ST3_smx:INFO: List of broken channels: [107, 111, 113, 115, 117, 119, 121]
11:26:01:ST3_smx:INFO: Total # of broken channels: 63
11:26:01:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:26:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:26:01:febtest:INFO: 30-01 | XA-000-08-002-002-007-209-07 | 34.6 | 1189.2
11:26:01:febtest:INFO: 21-02 | XA-000-08-002-002-007-201-00 | 37.7 | 1177.4
11:26:02:febtest:INFO: 28-03 | XA-000-08-002-002-007-206-00 | 37.7 | 1171.5
11:26:02:febtest:INFO: 19-04 | XA-000-08-002-002-007-202-00 | 28.2 | 1212.7
11:26:02:febtest:INFO: 26-05 | XA-000-08-002-002-007-205-00 | 18.7 | 1247.9
11:26:02:febtest:INFO: 17-06 | XA-000-08-002-002-007-203-00 | 21.9 | 1247.9
11:26:02:febtest:INFO: 24-07 | XA-000-08-002-002-007-204-00 | 28.2 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_21-11_24_44
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2222| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5530', '1.848', '2.4630']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9500', '1.850', '2.4460']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8970', '1.850', '0.6950']