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FEB_2222 22.08.24 10:06:01
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10:06:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:06:01:ST3_Shared:INFO: FEB-Microcable
10:06:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:06:01:febtest:INFO: Testing FEB with SN 2222
10:06:02:smx_tester:INFO: Scanning setup
10:06:02:elinks:INFO: Disabling clock on downlink 0
10:06:02:elinks:INFO: Disabling clock on downlink 1
10:06:02:elinks:INFO: Disabling clock on downlink 2
10:06:02:elinks:INFO: Disabling clock on downlink 3
10:06:02:elinks:INFO: Disabling clock on downlink 4
10:06:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:06:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:06:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:06:03:elinks:INFO: Disabling clock on downlink 0
10:06:03:elinks:INFO: Disabling clock on downlink 1
10:06:03:elinks:INFO: Disabling clock on downlink 2
10:06:03:elinks:INFO: Disabling clock on downlink 3
10:06:03:elinks:INFO: Disabling clock on downlink 4
10:06:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:06:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:06:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:06:03:elinks:INFO: Disabling clock on downlink 0
10:06:03:elinks:INFO: Disabling clock on downlink 1
10:06:03:elinks:INFO: Disabling clock on downlink 2
10:06:03:elinks:INFO: Disabling clock on downlink 3
10:06:03:elinks:INFO: Disabling clock on downlink 4
10:06:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:06:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:06:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:06:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:06:03:elinks:INFO: Disabling clock on downlink 0
10:06:03:elinks:INFO: Disabling clock on downlink 1
10:06:03:elinks:INFO: Disabling clock on downlink 2
10:06:03:elinks:INFO: Disabling clock on downlink 3
10:06:03:elinks:INFO: Disabling clock on downlink 4
10:06:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:06:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:06:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:06:03:elinks:INFO: Disabling clock on downlink 0
10:06:03:elinks:INFO: Disabling clock on downlink 1
10:06:03:elinks:INFO: Disabling clock on downlink 2
10:06:03:elinks:INFO: Disabling clock on downlink 3
10:06:03:elinks:INFO: Disabling clock on downlink 4
10:06:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:06:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:06:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:06:03:setup_element:INFO: Scanning clock phase
10:06:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:06:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:06:04:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:06:04:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:06:04:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:06:04:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:06:04:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
10:06:04:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
10:06:04:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:06:04:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:06:04:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:06:04:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:06:04:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:06:04:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
10:06:04:setup_element:INFO: Scanning data phases
10:06:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:06:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:06:09:setup_element:INFO: Eye window for uplink 16: X_____________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
10:06:09:setup_element:INFO: Eye window for uplink 17: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
10:06:09:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
10:06:09:setup_element:INFO: Eye window for uplink 19: XX_________________________________XXXX_
Data delay found: 18
10:06:09:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
10:06:09:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
10:06:09:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
10:06:09:setup_element:INFO: Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
10:06:09:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
10:06:09:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
10:06:09:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
10:06:09:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
10:06:10:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
10:06:10:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
10:06:10:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
10:06:10:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
10:06:10:setup_element:INFO: Setting the data phase to 7 for uplink 16
10:06:10:setup_element:INFO: Setting the data phase to 6 for uplink 17
10:06:10:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:06:10:setup_element:INFO: Setting the data phase to 18 for uplink 19
10:06:10:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:06:10:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:06:10:setup_element:INFO: Setting the data phase to 17 for uplink 22
10:06:10:setup_element:INFO: Setting the data phase to 18 for uplink 23
10:06:10:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:06:10:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:06:10:setup_element:INFO: Setting the data phase to 30 for uplink 26
10:06:10:setup_element:INFO: Setting the data phase to 33 for uplink 27
10:06:10:setup_element:INFO: Setting the data phase to 33 for uplink 28
10:06:10:setup_element:INFO: Setting the data phase to 36 for uplink 29
10:06:10:setup_element:INFO: Setting the data phase to 39 for uplink 30
10:06:10:setup_element:INFO: Setting the data phase to 0 for uplink 31
10:06:10:setup_element:INFO: Beginning SMX ASICs map scan
10:06:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:06:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:06:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:06:10:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:06:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:06:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:06:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:06:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:06:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:06:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:06:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:06:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:06:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:06:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:06:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:06:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:06:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:06:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:06:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:06:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:06:12:setup_element:INFO: Performing Elink synchronization
10:06:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:06:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:06:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:06:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:06:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:06:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x0
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x1
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x2
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x3
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x4
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x5
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x6
10:06:13:ST3_emu_feb:DEBUG: Chip address: 0x7
10:06:13:febtest:INFO: Init all SMX (CSA): 30
10:06:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:06:28:febtest:INFO: 23-00 | XA-000-08-002-003-007-037-09 | 34.6 | 1147.8
10:06:28:febtest:INFO: 30-01 | XA-000-08-002-002-007-209-07 | 25.1 | 1153.7
10:06:28:febtest:INFO: 21-02 | XA-000-08-002-002-007-201-00 | 28.2 | 1147.8
10:06:28:febtest:INFO: 28-03 | XA-000-08-002-002-007-206-00 | 31.4 | 1141.9
10:06:28:febtest:INFO: 19-04 | XA-000-08-002-002-007-202-00 | 21.9 | 1183.3
10:06:29:febtest:INFO: 26-05 | XA-000-08-002-002-007-205-00 | 9.3 | 1218.6
10:06:29:febtest:INFO: 17-06 | XA-000-08-002-002-007-203-00 | 9.3 | 1224.5
10:06:29:febtest:INFO: 24-07 | XA-000-08-002-002-007-204-00 | 15.6 | 1183.3
10:06:30:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:06:32:ST3_smx:INFO: chip: 23-0 31.389742 C 1159.654860 mV
10:06:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:32:ST3_smx:INFO: Electrons
10:06:32:ST3_smx:INFO: # loops 0
10:06:34:ST3_smx:INFO: # loops 1
10:06:35:ST3_smx:INFO: # loops 2
10:06:37:ST3_smx:INFO: Total # of broken channels: 0
10:06:37:ST3_smx:INFO: List of broken channels: []
10:06:37:ST3_smx:INFO: Total # of broken channels: 20
10:06:37:ST3_smx:INFO: List of broken channels: [80, 84, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124]
10:06:39:ST3_smx:INFO: chip: 30-1 25.062742 C 1165.571835 mV
10:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:39:ST3_smx:INFO: Electrons
10:06:39:ST3_smx:INFO: # loops 0
10:06:40:ST3_smx:INFO: # loops 1
10:06:42:ST3_smx:INFO: # loops 2
10:06:44:ST3_smx:INFO: Total # of broken channels: 0
10:06:44:ST3_smx:INFO: List of broken channels: []
10:06:44:ST3_smx:INFO: Total # of broken channels: 0
10:06:44:ST3_smx:INFO: List of broken channels: []
10:06:45:ST3_smx:INFO: chip: 21-2 28.225000 C 1159.654860 mV
10:06:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:45:ST3_smx:INFO: Electrons
10:06:45:ST3_smx:INFO: # loops 0
10:06:47:ST3_smx:INFO: # loops 1
10:06:49:ST3_smx:INFO: # loops 2
10:06:50:ST3_smx:INFO: Total # of broken channels: 0
10:06:50:ST3_smx:INFO: List of broken channels: []
10:06:50:ST3_smx:INFO: Total # of broken channels: 61
10:06:50:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124]
10:06:52:ST3_smx:INFO: chip: 28-3 31.389742 C 1153.732915 mV
10:06:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:52:ST3_smx:INFO: Electrons
10:06:52:ST3_smx:INFO: # loops 0
10:06:54:ST3_smx:INFO: # loops 1
10:06:55:ST3_smx:INFO: # loops 2
10:06:57:ST3_smx:INFO: Total # of broken channels: 5
10:06:57:ST3_smx:INFO: List of broken channels: [119, 121, 123, 125, 127]
10:06:57:ST3_smx:INFO: Total # of broken channels: 34
10:06:57:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 49, 51, 53, 55, 57, 65, 119, 121, 123, 125, 127]
10:06:58:ST3_smx:INFO: chip: 19-4 18.745682 C 1195.082160 mV
10:06:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:59:ST3_smx:INFO: Electrons
10:06:59:ST3_smx:INFO: # loops 0
10:07:00:ST3_smx:INFO: # loops 1
10:07:02:ST3_smx:INFO: # loops 2
10:07:03:ST3_smx:INFO: Total # of broken channels: 0
10:07:03:ST3_smx:INFO: List of broken channels: []
10:07:03:ST3_smx:INFO: Total # of broken channels: 8
10:07:03:ST3_smx:INFO: List of broken channels: [4, 6, 10, 12, 20, 22, 28, 36]
10:07:05:ST3_smx:INFO: chip: 26-5 9.288730 C 1230.330540 mV
10:07:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:05:ST3_smx:INFO: Electrons
10:07:05:ST3_smx:INFO: # loops 0
10:07:07:ST3_smx:INFO: # loops 1
10:07:08:ST3_smx:INFO: # loops 2
10:07:10:ST3_smx:INFO: Total # of broken channels: 0
10:07:10:ST3_smx:INFO: List of broken channels: []
10:07:10:ST3_smx:INFO: Total # of broken channels: 0
10:07:10:ST3_smx:INFO: List of broken channels: []
10:07:12:ST3_smx:INFO: chip: 17-6 9.288730 C 1230.330540 mV
10:07:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:12:ST3_smx:INFO: Electrons
10:07:12:ST3_smx:INFO: # loops 0
10:07:13:ST3_smx:INFO: # loops 1
10:07:15:ST3_smx:INFO: # loops 2
10:07:17:ST3_smx:INFO: Total # of broken channels: 0
10:07:17:ST3_smx:INFO: List of broken channels: []
10:07:17:ST3_smx:INFO: Total # of broken channels: 50
10:07:17:ST3_smx:INFO: List of broken channels: [8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 90, 92, 94, 100, 102, 104, 106, 108, 110, 118]
10:07:18:ST3_smx:INFO: chip: 24-7 18.745682 C 1195.082160 mV
10:07:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:07:18:ST3_smx:INFO: Electrons
10:07:18:ST3_smx:INFO: # loops 0
10:07:20:ST3_smx:INFO: # loops 1
10:07:22:ST3_smx:INFO: # loops 2
10:07:23:ST3_smx:INFO: Total # of broken channels: 0
10:07:23:ST3_smx:INFO: List of broken channels: []
10:07:23:ST3_smx:INFO: Total # of broken channels: 38
10:07:23:ST3_smx:INFO: List of broken channels: [7, 9, 11, 13, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83]
10:07:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:07:24:febtest:INFO: 23-00 | XA-000-08-002-003-007-037-09 | 34.6 | 1177.4
10:07:24:febtest:INFO: 30-01 | XA-000-08-002-002-007-209-07 | 25.1 | 1189.2
10:07:24:febtest:INFO: 21-02 | XA-000-08-002-002-007-201-00 | 31.4 | 1183.3
10:07:24:febtest:INFO: 28-03 | XA-000-08-002-002-007-206-00 | 31.4 | 1171.5
10:07:25:febtest:INFO: 19-04 | XA-000-08-002-002-007-202-00 | 21.9 | 1212.7
10:07:25:febtest:INFO: 26-05 | XA-000-08-002-002-007-205-00 | 12.4 | 1247.9
10:07:25:febtest:INFO: 17-06 | XA-000-08-002-002-007-203-00 | 12.4 | 1253.7
10:07:25:febtest:INFO: 24-07 | XA-000-08-002-002-007-204-00 | 18.7 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_22-10_06_01
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2222| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9660', '1.848', '2.5840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '2.5390']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9400', '1.850', '0.5167']