09:22:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:22:52:ST3_Shared:INFO:	                         FEB-Sensor                         
09:22:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:23:26:ST3_ModuleSelector:INFO:	M8UL4T4010224B2
09:23:26:ST3_ModuleSelector:INFO:	04254
09:23:26:febtest:INFO:	Testing FEB with SN 2226
09:23:27:smx_tester:INFO:	Scanning setup
09:23:27:elinks:INFO:	Disabling clock on downlink 0
09:23:27:elinks:INFO:	Disabling clock on downlink 1
09:23:27:elinks:INFO:	Disabling clock on downlink 2
09:23:27:elinks:INFO:	Disabling clock on downlink 3
09:23:27:elinks:INFO:	Disabling clock on downlink 4
09:23:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:23:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:23:27:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:23:27:elinks:INFO:	Disabling clock on downlink 0
09:23:27:elinks:INFO:	Disabling clock on downlink 1
09:23:27:elinks:INFO:	Disabling clock on downlink 2
09:23:27:elinks:INFO:	Disabling clock on downlink 3
09:23:27:elinks:INFO:	Disabling clock on downlink 4
09:23:27:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:23:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:23:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:23:28:elinks:INFO:	Disabling clock on downlink 0
09:23:28:elinks:INFO:	Disabling clock on downlink 1
09:23:28:elinks:INFO:	Disabling clock on downlink 2
09:23:28:elinks:INFO:	Disabling clock on downlink 3
09:23:28:elinks:INFO:	Disabling clock on downlink 4
09:23:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:23:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:23:28:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:23:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:23:28:elinks:INFO:	Disabling clock on downlink 0
09:23:28:elinks:INFO:	Disabling clock on downlink 1
09:23:28:elinks:INFO:	Disabling clock on downlink 2
09:23:28:elinks:INFO:	Disabling clock on downlink 3
09:23:28:elinks:INFO:	Disabling clock on downlink 4
09:23:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:23:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:23:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:23:28:elinks:INFO:	Disabling clock on downlink 0
09:23:28:elinks:INFO:	Disabling clock on downlink 1
09:23:28:elinks:INFO:	Disabling clock on downlink 2
09:23:28:elinks:INFO:	Disabling clock on downlink 3
09:23:28:elinks:INFO:	Disabling clock on downlink 4
09:23:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:23:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:23:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:23:28:setup_element:INFO:	Scanning clock phase
09:23:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:23:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:23:29:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:23:29:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:23:29:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:23:29:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
09:23:29:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
09:23:29:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:23:29:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
09:23:29:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
09:23:29:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
09:23:29:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
09:23:29:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:23:29:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:23:29:setup_element:INFO:	Setting the clock phase to 28 for group 0, downlink 2
09:23:29:setup_element:INFO:	Scanning data phases
09:23:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:23:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:23:34:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:23:34:setup_element:INFO:	Eye window for uplink 16: __________________________________XXX___
Data delay found: 15
09:23:34:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
09:23:34:setup_element:INFO:	Eye window for uplink 18: __________________________________XXXX__
Data delay found: 15
09:23:34:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXX____
Data delay found: 13
09:23:34:setup_element:INFO:	Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
09:23:34:setup_element:INFO:	Eye window for uplink 21: ___________________________________XXXXX
Data delay found: 17
09:23:34:setup_element:INFO:	Eye window for uplink 22: _________________________________XXXX___
Data delay found: 14
09:23:34:setup_element:INFO:	Eye window for uplink 23: XXX___________________________XXXXXXXXXX
Data delay found: 16
09:23:34:setup_element:INFO:	Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
09:23:34:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
09:23:34:setup_element:INFO:	Eye window for uplink 26: ___XXXXXX_______XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 12
09:23:34:setup_element:INFO:	Eye window for uplink 27: ______XXXXXX____XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
09:23:34:setup_element:INFO:	Eye window for uplink 28: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
09:23:34:setup_element:INFO:	Eye window for uplink 29: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
09:23:34:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
09:23:34:setup_element:INFO:	Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
09:23:34:setup_element:INFO:	Setting the data phase to 15 for uplink 16
09:23:34:setup_element:INFO:	Setting the data phase to 13 for uplink 17
09:23:34:setup_element:INFO:	Setting the data phase to 15 for uplink 18
09:23:34:setup_element:INFO:	Setting the data phase to 13 for uplink 19
09:23:34:setup_element:INFO:	Setting the data phase to 17 for uplink 20
09:23:34:setup_element:INFO:	Setting the data phase to 17 for uplink 21
09:23:34:setup_element:INFO:	Setting the data phase to 14 for uplink 22
09:23:34:setup_element:INFO:	Setting the data phase to 16 for uplink 23
09:23:34:setup_element:INFO:	Setting the data phase to 27 for uplink 24
09:23:34:setup_element:INFO:	Setting the data phase to 29 for uplink 25
09:23:34:setup_element:INFO:	Setting the data phase to 12 for uplink 26
09:23:34:setup_element:INFO:	Setting the data phase to 2 for uplink 27
09:23:34:setup_element:INFO:	Setting the data phase to 20 for uplink 28
09:23:34:setup_element:INFO:	Setting the data phase to 20 for uplink 29
09:23:34:setup_element:INFO:	Setting the data phase to 36 for uplink 30
09:23:34:setup_element:INFO:	Setting the data phase to 37 for uplink 31
09:23:34:setup_element:INFO:	Beginning SMX ASICs map scan
09:23:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:23:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:23:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:23:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:23:34:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:23:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:23:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:23:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:23:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:23:35:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:23:35:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:23:35:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:23:35:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:23:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:23:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:23:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:23:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:23:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:23:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:23:36:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:23:36:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:23:37:setup_element:INFO:	Performing Elink synchronization
09:23:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:23:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:23:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:23:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:23:37:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:23:37:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:23:37:ST3_emu_feb:DEBUG:	Chip address:  	0x0
09:23:37:ST3_emu_feb:DEBUG:	Chip address:  	0x1
09:23:37:ST3_emu_feb:DEBUG:	Chip address:  	0x2
09:23:38:ST3_emu_feb:DEBUG:	Chip address:  	0x3
09:23:38:ST3_emu_feb:DEBUG:	Chip address:  	0x4
09:23:38:ST3_emu_feb:DEBUG:	Chip address:  	0x5
09:23:38:ST3_emu_feb:DEBUG:	Chip address:  	0x6
09:23:38:ST3_emu_feb:DEBUG:	Chip address:  	0x7
09:23:38:febtest:INFO:	Init all SMX (CSA): 30
09:23:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:23:52:febtest:INFO:	23-00 | XA-105-08-002-003-007-021-02 |  56.8 | 1106.2
09:23:52:febtest:INFO:	30-01 | XA-000-08-002-003-007-060-14 |  60.0 | 1106.2
09:23:52:febtest:INFO:	21-02 | XA-000-08-002-003-007-058-14 |  56.8 | 1112.1
09:23:53:febtest:INFO:	28-03 | XA-106-08-002-003-007-021-06 |  66.4 | 1094.2
09:23:53:febtest:INFO:	19-04 | XA-104-08-002-003-007-021-09 |  72.8 | 1046.3
09:23:53:febtest:INFO:	26-05 | XA-000-08-002-003-007-055-14 |  60.0 | 1106.2
09:23:53:febtest:INFO:	17-06 | XA-103-08-002-003-007-021-04 |  60.0 | 1094.2
09:23:54:febtest:INFO:	24-07 | XA-000-08-002-003-007-059-14 |  60.0 | 1088.3
09:23:55:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:23:57:ST3_smx:INFO:	chip: 23-0 	 59.984250 C 	 1118.096875 mV
09:23:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:23:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:23:57:ST3_smx:INFO:		Electrons
09:23:57:ST3_smx:INFO:	# loops 0
09:23:58:ST3_smx:INFO:	# loops 1
09:24:00:ST3_smx:INFO:	# loops 2
09:24:01:ST3_smx:INFO:	# loops 3
09:24:03:ST3_smx:INFO:	# loops 4
09:24:05:ST3_smx:INFO:	Total # of broken channels: 0
09:24:05:ST3_smx:INFO:	List of broken channels: []
09:24:05:ST3_smx:INFO:	Total # of broken channels: 0
09:24:05:ST3_smx:INFO:	List of broken channels: []
09:24:06:ST3_smx:INFO:	chip: 30-1 	 63.173842 C 	 1112.140140 mV
09:24:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:07:ST3_smx:INFO:		Electrons
09:24:07:ST3_smx:INFO:	# loops 0
09:24:08:ST3_smx:INFO:	# loops 1
09:24:10:ST3_smx:INFO:	# loops 2
09:24:11:ST3_smx:INFO:	# loops 3
09:24:13:ST3_smx:INFO:	# loops 4
09:24:14:ST3_smx:INFO:	Total # of broken channels: 0
09:24:14:ST3_smx:INFO:	List of broken channels: []
09:24:15:ST3_smx:INFO:	Total # of broken channels: 1
09:24:15:ST3_smx:INFO:	List of broken channels: [110]
09:24:16:ST3_smx:INFO:	chip: 21-2 	 59.984250 C 	 1118.096875 mV
09:24:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:16:ST3_smx:INFO:		Electrons
09:24:16:ST3_smx:INFO:	# loops 0
09:24:18:ST3_smx:INFO:	# loops 1
09:24:20:ST3_smx:INFO:	# loops 2
09:24:21:ST3_smx:INFO:	# loops 3
09:24:23:ST3_smx:INFO:	# loops 4
09:24:24:ST3_smx:INFO:	Total # of broken channels: 0
09:24:24:ST3_smx:INFO:	List of broken channels: []
09:24:24:ST3_smx:INFO:	Total # of broken channels: 0
09:24:24:ST3_smx:INFO:	List of broken channels: []
09:24:26:ST3_smx:INFO:	chip: 28-3 	 69.560482 C 	 1100.211760 mV
09:24:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:26:ST3_smx:INFO:		Electrons
09:24:26:ST3_smx:INFO:	# loops 0
09:24:28:ST3_smx:INFO:	# loops 1
09:24:29:ST3_smx:INFO:	# loops 2
09:24:31:ST3_smx:INFO:	# loops 3
09:24:32:ST3_smx:INFO:	# loops 4
09:24:34:ST3_smx:INFO:	Total # of broken channels: 0
09:24:34:ST3_smx:INFO:	List of broken channels: []
09:24:34:ST3_smx:INFO:	Total # of broken channels: 0
09:24:34:ST3_smx:INFO:	List of broken channels: []
09:24:36:ST3_smx:INFO:	chip: 19-4 	 75.957063 C 	 1052.299440 mV
09:24:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:36:ST3_smx:INFO:		Electrons
09:24:36:ST3_smx:INFO:	# loops 0
09:24:38:ST3_smx:INFO:	# loops 1
09:24:39:ST3_smx:INFO:	# loops 2
09:24:41:ST3_smx:INFO:	# loops 3
09:24:43:ST3_smx:INFO:	# loops 4
09:24:44:ST3_smx:INFO:	Total # of broken channels: 0
09:24:44:ST3_smx:INFO:	List of broken channels: []
09:24:44:ST3_smx:INFO:	Total # of broken channels: 0
09:24:44:ST3_smx:INFO:	List of broken channels: []
09:24:46:ST3_smx:INFO:	chip: 26-5 	 63.173842 C 	 1112.140140 mV
09:24:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:46:ST3_smx:INFO:		Electrons
09:24:46:ST3_smx:INFO:	# loops 0
09:24:48:ST3_smx:INFO:	# loops 1
09:24:50:ST3_smx:INFO:	# loops 2
09:24:51:ST3_smx:INFO:	# loops 3
09:24:53:ST3_smx:INFO:	# loops 4
09:24:55:ST3_smx:INFO:	Total # of broken channels: 0
09:24:55:ST3_smx:INFO:	List of broken channels: []
09:24:55:ST3_smx:INFO:	Total # of broken channels: 0
09:24:55:ST3_smx:INFO:	List of broken channels: []
09:24:56:ST3_smx:INFO:	chip: 17-6 	 59.984250 C 	 1100.211760 mV
09:24:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:24:56:ST3_smx:INFO:		Electrons
09:24:56:ST3_smx:INFO:	# loops 0
09:24:58:ST3_smx:INFO:	# loops 1
09:25:00:ST3_smx:INFO:	# loops 2
09:25:01:ST3_smx:INFO:	# loops 3
09:25:03:ST3_smx:INFO:	# loops 4
09:25:05:ST3_smx:INFO:	Total # of broken channels: 0
09:25:05:ST3_smx:INFO:	List of broken channels: []
09:25:05:ST3_smx:INFO:	Total # of broken channels: 1
09:25:05:ST3_smx:INFO:	List of broken channels: [19]
09:25:07:ST3_smx:INFO:	chip: 24-7 	 63.173842 C 	 1094.240115 mV
09:25:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:07:ST3_smx:INFO:		Electrons
09:25:07:ST3_smx:INFO:	# loops 0
09:25:08:ST3_smx:INFO:	# loops 1
09:25:10:ST3_smx:INFO:	# loops 2
09:25:11:ST3_smx:INFO:	# loops 3
09:25:13:ST3_smx:INFO:	# loops 4
09:25:15:ST3_smx:INFO:	Total # of broken channels: 0
09:25:15:ST3_smx:INFO:	List of broken channels: []
09:25:15:ST3_smx:INFO:	Total # of broken channels: 0
09:25:15:ST3_smx:INFO:	List of broken channels: []
09:25:15:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:25:15:febtest:INFO:	23-00 | XA-105-08-002-003-007-021-02 |  63.2 | 1135.9
09:25:15:febtest:INFO:	30-01 | XA-000-08-002-003-007-060-14 |  66.4 | 1130.0
09:25:16:febtest:INFO:	21-02 | XA-000-08-002-003-007-058-14 |  63.2 | 1135.9
09:25:16:febtest:INFO:	28-03 | XA-106-08-002-003-007-021-06 |  69.6 | 1118.1
09:25:16:febtest:INFO:	19-04 | XA-104-08-002-003-007-021-09 |  79.2 | 1070.3
09:25:16:febtest:INFO:	26-05 | XA-000-08-002-003-007-055-14 |  63.2 | 1130.0
09:25:17:febtest:INFO:	17-06 | XA-103-08-002-003-007-021-04 |  63.2 | 1118.1
09:25:17:febtest:INFO:	24-07 | XA-000-08-002-003-007-059-14 |  66.4 | 1112.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_02-09_22_52
OPERATOR  : Carmen S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2226| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 04254 | SIZE: 62x124 | GRADE: D
MODULE_NAME: M8UL4T4010224B2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9130', '1.848', '1.8850']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0940', '1.850', '2.5840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0140', '1.850', '0.5313']