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FEB_2227 31.10.24 13:34:09
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13:34:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:09:ST3_Shared:INFO: FEB-Sensor
13:34:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:14:ST3_ModuleSelector:INFO: New Sensor ID: 05073
13:34:20:ST3_ModuleSelector:INFO:
13:34:20:ST3_ModuleSelector:INFO: 05073
13:34:20:febtest:INFO: Testing FEB with SN 2227
13:34:22:smx_tester:INFO: Scanning setup
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:34:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:34:23:setup_element:INFO: Scanning clock phase
13:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:34:23:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:34:23:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:34:23:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:34:23:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
13:34:23:setup_element:INFO: Scanning data phases
13:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:34:28:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
13:34:28:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
13:34:28:setup_element:INFO: Eye window for uplink 18: X_________________________________XXXXXX
Data delay found: 17
13:34:28:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__
Data delay found: 14
13:34:28:setup_element:INFO: Eye window for uplink 20: XX____________________________________XX
Data delay found: 19
13:34:28:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
13:34:28:setup_element:INFO: Eye window for uplink 22: XX___________________________________XXX
Data delay found: 19
13:34:28:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
13:34:28:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
13:34:28:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
13:34:28:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
13:34:28:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
13:34:28:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
13:34:28:setup_element:INFO: Eye window for uplink 29: _________________XXXXX__________________
Data delay found: 39
13:34:28:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
13:34:28:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
13:34:28:setup_element:INFO: Setting the data phase to 18 for uplink 16
13:34:28:setup_element:INFO: Setting the data phase to 15 for uplink 17
13:34:28:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:34:28:setup_element:INFO: Setting the data phase to 14 for uplink 19
13:34:28:setup_element:INFO: Setting the data phase to 19 for uplink 20
13:34:28:setup_element:INFO: Setting the data phase to 18 for uplink 21
13:34:28:setup_element:INFO: Setting the data phase to 19 for uplink 22
13:34:28:setup_element:INFO: Setting the data phase to 19 for uplink 23
13:34:28:setup_element:INFO: Setting the data phase to 30 for uplink 24
13:34:28:setup_element:INFO: Setting the data phase to 32 for uplink 25
13:34:28:setup_element:INFO: Setting the data phase to 32 for uplink 26
13:34:28:setup_element:INFO: Setting the data phase to 35 for uplink 27
13:34:28:setup_element:INFO: Setting the data phase to 37 for uplink 28
13:34:28:setup_element:INFO: Setting the data phase to 39 for uplink 29
13:34:28:setup_element:INFO: Setting the data phase to 39 for uplink 30
13:34:28:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
13:34:28:setup_element:INFO: Beginning SMX ASICs map scan
13:34:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:34:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:34:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:34:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:34:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:34:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:34:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:34:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:34:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:34:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:34:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:34:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:34:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:34:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:34:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:34:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:34:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:34:31:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ____________________________________________________________________XXXXXXXXX___
Uplink 23: ____________________________________________________________________XXXXXXXXX___
Uplink 24: _____________________________________________________________________XXXXXXX____
Uplink 25: _____________________________________________________________________XXXXXXX____
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXX____
Uplink 29: _____________________________________________________________________XXXXXXX____
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 20:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 21:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 22:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 23:
Optimal Phase: 19
Window Length: 29
Eye Window: XXXXX_____________________________XXXXXX
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 29:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
==============================================OOO==============================================
13:34:31:setup_element:INFO: Performing Elink synchronization
13:34:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:34:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:34:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:34:32:febtest:INFO: Init all SMX (CSA): 30
13:34:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:46:febtest:INFO: 23-00 | XA-000-09-004-004-014-016-01 | 25.1 | 1201.0
13:34:47:febtest:INFO: 30-01 | XA-000-09-004-004-014-014-06 | 37.7 | 1159.7
13:34:47:febtest:INFO: 21-02 | XA-000-09-004-004-015-016-12 | 40.9 | 1141.9
13:34:47:febtest:INFO: 28-03 | XA-000-09-004-004-014-013-06 | 40.9 | 1141.9
13:34:47:febtest:INFO: 19-04 | XA-000-09-004-004-014-015-06 | 28.2 | 1189.2
13:34:47:febtest:INFO: 26-05 | XA-000-09-004-004-015-013-11 | 34.6 | 1165.6
13:34:48:febtest:INFO: 17-06 | XA-000-09-004-004-015-015-11 | 28.2 | 1189.2
13:34:48:febtest:INFO: 24-07 | XA-000-09-004-004-013-014-08 | 37.7 | 1147.8
13:34:49:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:34:51:ST3_smx:INFO: chip: 23-0 28.225000 C 1212.728715 mV
13:34:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:51:ST3_smx:INFO: Electrons
13:34:51:ST3_smx:INFO: # loops 0
13:34:53:ST3_smx:INFO: # loops 1
13:34:54:ST3_smx:INFO: # loops 2
13:34:56:ST3_smx:INFO: # loops 3
13:34:58:ST3_smx:INFO: # loops 4
13:34:59:ST3_smx:INFO: Total # of broken channels: 0
13:34:59:ST3_smx:INFO: List of broken channels: []
13:34:59:ST3_smx:INFO: Total # of broken channels: 0
13:34:59:ST3_smx:INFO: List of broken channels: []
13:35:01:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV
13:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:01:ST3_smx:INFO: Electrons
13:35:01:ST3_smx:INFO: # loops 0
13:35:03:ST3_smx:INFO: # loops 1
13:35:04:ST3_smx:INFO: # loops 2
13:35:06:ST3_smx:INFO: # loops 3
13:35:07:ST3_smx:INFO: # loops 4
13:35:09:ST3_smx:INFO: Total # of broken channels: 0
13:35:09:ST3_smx:INFO: List of broken channels: []
13:35:09:ST3_smx:INFO: Total # of broken channels: 1
13:35:09:ST3_smx:INFO: List of broken channels: [0]
13:35:11:ST3_smx:INFO: chip: 21-2 44.073563 C 1153.732915 mV
13:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:11:ST3_smx:INFO: Electrons
13:35:11:ST3_smx:INFO: # loops 0
13:35:12:ST3_smx:INFO: # loops 1
13:35:14:ST3_smx:INFO: # loops 2
13:35:16:ST3_smx:INFO: # loops 3
13:35:17:ST3_smx:INFO: # loops 4
13:35:19:ST3_smx:INFO: Total # of broken channels: 0
13:35:19:ST3_smx:INFO: List of broken channels: []
13:35:19:ST3_smx:INFO: Total # of broken channels: 0
13:35:19:ST3_smx:INFO: List of broken channels: []
13:35:20:ST3_smx:INFO: chip: 28-3 44.073563 C 1153.732915 mV
13:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:21:ST3_smx:INFO: Electrons
13:35:21:ST3_smx:INFO: # loops 0
13:35:22:ST3_smx:INFO: # loops 1
13:35:24:ST3_smx:INFO: # loops 2
13:35:25:ST3_smx:INFO: # loops 3
13:35:27:ST3_smx:INFO: # loops 4
13:35:29:ST3_smx:INFO: Total # of broken channels: 0
13:35:29:ST3_smx:INFO: List of broken channels: []
13:35:29:ST3_smx:INFO: Total # of broken channels: 0
13:35:29:ST3_smx:INFO: List of broken channels: []
13:35:30:ST3_smx:INFO: chip: 19-4 28.225000 C 1200.969315 mV
13:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:30:ST3_smx:INFO: Electrons
13:35:30:ST3_smx:INFO: # loops 0
13:35:32:ST3_smx:INFO: # loops 1
13:35:33:ST3_smx:INFO: # loops 2
13:35:35:ST3_smx:INFO: # loops 3
13:35:37:ST3_smx:INFO: # loops 4
13:35:39:ST3_smx:INFO: Total # of broken channels: 2
13:35:39:ST3_smx:INFO: List of broken channels: [52, 126]
13:35:39:ST3_smx:INFO: Total # of broken channels: 2
13:35:39:ST3_smx:INFO: List of broken channels: [52, 126]
13:35:40:ST3_smx:INFO: chip: 26-5 34.556970 C 1177.390875 mV
13:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:40:ST3_smx:INFO: Electrons
13:35:40:ST3_smx:INFO: # loops 0
13:35:42:ST3_smx:INFO: # loops 1
13:35:44:ST3_smx:INFO: # loops 2
13:35:45:ST3_smx:INFO: # loops 3
13:35:47:ST3_smx:INFO: # loops 4
13:35:48:ST3_smx:INFO: Total # of broken channels: 0
13:35:48:ST3_smx:INFO: List of broken channels: []
13:35:48:ST3_smx:INFO: Total # of broken channels: 0
13:35:48:ST3_smx:INFO: List of broken channels: []
13:35:50:ST3_smx:INFO: chip: 17-6 31.389742 C 1195.082160 mV
13:35:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:50:ST3_smx:INFO: Electrons
13:35:50:ST3_smx:INFO: # loops 0
13:35:52:ST3_smx:INFO: # loops 1
13:35:53:ST3_smx:INFO: # loops 2
13:35:55:ST3_smx:INFO: # loops 3
13:35:56:ST3_smx:INFO: # loops 4
13:35:58:ST3_smx:INFO: Total # of broken channels: 0
13:35:58:ST3_smx:INFO: List of broken channels: []
13:35:58:ST3_smx:INFO: Total # of broken channels: 0
13:35:58:ST3_smx:INFO: List of broken channels: []
13:36:00:ST3_smx:INFO: chip: 24-7 37.726682 C 1159.654860 mV
13:36:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:36:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:36:00:ST3_smx:INFO: Electrons
13:36:00:ST3_smx:INFO: # loops 0
13:36:01:ST3_smx:INFO: # loops 1
13:36:03:ST3_smx:INFO: # loops 2
13:36:05:ST3_smx:INFO: # loops 3
13:36:06:ST3_smx:INFO: # loops 4
13:36:08:ST3_smx:INFO: Total # of broken channels: 0
13:36:08:ST3_smx:INFO: List of broken channels: []
13:36:08:ST3_smx:INFO: Total # of broken channels: 0
13:36:08:ST3_smx:INFO: List of broken channels: []
13:36:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:36:09:febtest:INFO: 23-00 | XA-000-09-004-004-014-016-01 | 31.4 | 1230.3
13:36:09:febtest:INFO: 30-01 | XA-000-09-004-004-014-014-06 | 40.9 | 1195.1
13:36:09:febtest:INFO: 21-02 | XA-000-09-004-004-015-016-12 | 44.1 | 1171.5
13:36:09:febtest:INFO: 28-03 | XA-000-09-004-004-014-013-06 | 44.1 | 1177.4
13:36:09:febtest:INFO: 19-04 | XA-000-09-004-004-014-015-06 | 31.4 | 1218.6
13:36:10:febtest:INFO: 26-05 | XA-000-09-004-004-015-013-11 | 37.7 | 1201.0
13:36:10:febtest:INFO: 17-06 | XA-000-09-004-004-015-015-11 | 31.4 | 1218.6
13:36:10:febtest:INFO: 24-07 | XA-000-09-004-004-013-014-08 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_31-13_34_09
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2227| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 05073 | SIZE: 62x62 | GRADE: U
MODULE_NAME:
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4130', '1.848', '2.4940']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '2.5690']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '0.5307']
Comment.txt
M3DR 2B3000123A