FEB_2229    04.09.24 08:12:32

TextEdit.txt
            08:12:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:12:32:ST3_Shared:INFO:	                         FEB-Sensor                         
08:12:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:12:41:ST3_ModuleSelector:INFO:	M8UL6T0010240B2
08:12:41:ST3_ModuleSelector:INFO:	27072
08:12:41:febtest:INFO:	Testing FEB with SN 2229
08:12:42:smx_tester:INFO:	Scanning setup
08:12:42:elinks:INFO:	Disabling clock on downlink 0
08:12:42:elinks:INFO:	Disabling clock on downlink 1
08:12:42:elinks:INFO:	Disabling clock on downlink 2
08:12:42:elinks:INFO:	Disabling clock on downlink 3
08:12:42:elinks:INFO:	Disabling clock on downlink 4
08:12:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:12:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:12:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:12:43:elinks:INFO:	Disabling clock on downlink 0
08:12:43:elinks:INFO:	Disabling clock on downlink 1
08:12:43:elinks:INFO:	Disabling clock on downlink 2
08:12:43:elinks:INFO:	Disabling clock on downlink 3
08:12:43:elinks:INFO:	Disabling clock on downlink 4
08:12:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:12:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:12:43:elinks:INFO:	Disabling clock on downlink 0
08:12:43:elinks:INFO:	Disabling clock on downlink 1
08:12:43:elinks:INFO:	Disabling clock on downlink 2
08:12:43:elinks:INFO:	Disabling clock on downlink 3
08:12:43:elinks:INFO:	Disabling clock on downlink 4
08:12:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:12:43:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:12:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:12:43:elinks:INFO:	Disabling clock on downlink 0
08:12:43:elinks:INFO:	Disabling clock on downlink 1
08:12:43:elinks:INFO:	Disabling clock on downlink 2
08:12:43:elinks:INFO:	Disabling clock on downlink 3
08:12:43:elinks:INFO:	Disabling clock on downlink 4
08:12:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:12:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:12:43:elinks:INFO:	Disabling clock on downlink 0
08:12:43:elinks:INFO:	Disabling clock on downlink 1
08:12:43:elinks:INFO:	Disabling clock on downlink 2
08:12:43:elinks:INFO:	Disabling clock on downlink 3
08:12:43:elinks:INFO:	Disabling clock on downlink 4
08:12:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:12:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:12:43:setup_element:INFO:	Scanning clock phase
08:12:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:12:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:12:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:12:43:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
08:12:43:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
08:12:44:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:12:44:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:12:44:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:12:44:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:12:44:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:12:44:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:12:44:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:12:44:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:12:44:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
08:12:44:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
08:12:44:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
08:12:44:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
08:12:44:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:12:44:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
08:12:44:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
08:12:44:setup_element:INFO:	Scanning data phases
08:12:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:12:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:12:49:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:12:49:setup_element:INFO:	Eye window for uplink 16: ____________________________XXXXX_______
Data delay found: 10
08:12:49:setup_element:INFO:	Eye window for uplink 17: __________________________XXXXX_________
Data delay found: 8
08:12:49:setup_element:INFO:	Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
08:12:49:setup_element:INFO:	Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
08:12:49:setup_element:INFO:	Eye window for uplink 20: _____________________________________XXX
Data delay found: 18
08:12:49:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
08:12:49:setup_element:INFO:	Eye window for uplink 22: X_________________________________XXXXX_
Data delay found: 17
08:12:49:setup_element:INFO:	Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
08:12:49:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_________________XXXXXXXXXXXX
Data delay found: 19
08:12:49:setup_element:INFO:	Eye window for uplink 25: ________XXXX________________XXXXXXXXXXXX
Data delay found: 19
08:12:49:setup_element:INFO:	Eye window for uplink 26: ___XXXXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
08:12:49:setup_element:INFO:	Eye window for uplink 27: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
08:12:49:setup_element:INFO:	Eye window for uplink 28: _______XXXXX____________________________
Data delay found: 29
08:12:49:setup_element:INFO:	Eye window for uplink 29: _________XXXXXX_________________________
Data delay found: 31
08:12:49:setup_element:INFO:	Eye window for uplink 30: ___________XXXXXX_______________________
Data delay found: 33
08:12:49:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
08:12:49:setup_element:INFO:	Setting the data phase to 10 for uplink 16
08:12:49:setup_element:INFO:	Setting the data phase to 8 for uplink 17
08:12:49:setup_element:INFO:	Setting the data phase to 21 for uplink 18
08:12:49:setup_element:INFO:	Setting the data phase to 18 for uplink 19
08:12:49:setup_element:INFO:	Setting the data phase to 18 for uplink 20
08:12:49:setup_element:INFO:	Setting the data phase to 16 for uplink 21
08:12:49:setup_element:INFO:	Setting the data phase to 17 for uplink 22
08:12:49:setup_element:INFO:	Setting the data phase to 18 for uplink 23
08:12:49:setup_element:INFO:	Setting the data phase to 19 for uplink 24
08:12:49:setup_element:INFO:	Setting the data phase to 19 for uplink 25
08:12:49:setup_element:INFO:	Setting the data phase to 1 for uplink 26
08:12:49:setup_element:INFO:	Setting the data phase to 2 for uplink 27
08:12:49:setup_element:INFO:	Setting the data phase to 29 for uplink 28
08:12:49:setup_element:INFO:	Setting the data phase to 31 for uplink 29
08:12:49:setup_element:INFO:	Setting the data phase to 33 for uplink 30
08:12:49:setup_element:INFO:	Setting the data phase to 33 for uplink 31
08:12:49:setup_element:INFO:	Beginning SMX ASICs map scan
08:12:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:12:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:12:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:12:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:12:49:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:12:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:12:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:12:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:12:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:12:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:12:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:12:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:12:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:12:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:12:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:12:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:12:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:12:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:12:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:12:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:12:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:12:51:setup_element:INFO:	Performing Elink synchronization
08:12:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:12:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:12:51:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:12:51:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:12:51:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:12:51:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x0
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x1
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x2
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x3
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x4
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x5
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x6
08:12:52:ST3_emu_feb:DEBUG:	Chip address:  	0x7
08:12:52:febtest:INFO:	Init all SMX (CSA): 30
08:13:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:13:07:febtest:INFO:	23-00 | XA-000-08-002-003-007-051-14 |  40.9 | 1141.9
08:13:07:febtest:INFO:	30-01 | XA-055-08-002-003-007-021-12 |  53.6 | 1106.2
08:13:07:febtest:INFO:	21-02 | XA-000-08-002-003-007-053-14 |  47.3 | 1118.1
08:13:07:febtest:INFO:	28-03 | XA-000-08-002-003-007-066-02 |  50.4 | 1112.1
08:13:07:febtest:INFO:	19-04 | XA-000-08-002-003-007-050-14 |  44.1 | 1130.0
08:13:08:febtest:INFO:	26-05 | XA-056-08-002-003-007-021-01 |  69.6 | 1064.3
08:13:08:febtest:INFO:	17-06 | XA-000-08-002-003-007-062-14 |  56.8 | 1112.1
08:13:08:febtest:INFO:	24-07 | XA-000-08-002-003-007-052-14 |  34.6 | 1153.7
08:13:09:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:13:11:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1153.732915 mV
08:13:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:11:ST3_smx:INFO:		Electrons
08:13:11:ST3_smx:INFO:	# loops 0
08:13:13:ST3_smx:INFO:	# loops 1
08:13:14:ST3_smx:INFO:	# loops 2
08:13:16:ST3_smx:INFO:	# loops 3
08:13:18:ST3_smx:INFO:	# loops 4
08:13:19:ST3_smx:INFO:	Total # of broken channels: 0
08:13:19:ST3_smx:INFO:	List of broken channels: []
08:13:19:ST3_smx:INFO:	Total # of broken channels: 29
08:13:19:ST3_smx:INFO:	List of broken channels: [17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 55, 57, 59, 61, 63, 65, 67, 73, 79, 81, 85]
08:13:21:ST3_smx:INFO:	chip: 30-1 	 53.612520 C 	 1118.096875 mV
08:13:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:21:ST3_smx:INFO:		Electrons
08:13:21:ST3_smx:INFO:	# loops 0
08:13:23:ST3_smx:INFO:	# loops 1
08:13:24:ST3_smx:INFO:	# loops 2
08:13:26:ST3_smx:INFO:	# loops 3
08:13:28:ST3_smx:INFO:	# loops 4
08:13:29:ST3_smx:INFO:	Total # of broken channels: 0
08:13:29:ST3_smx:INFO:	List of broken channels: []
08:13:29:ST3_smx:INFO:	Total # of broken channels: 13
08:13:29:ST3_smx:INFO:	List of broken channels: [15, 18, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 113]
08:13:31:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1129.995435 mV
08:13:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:31:ST3_smx:INFO:		Electrons
08:13:31:ST3_smx:INFO:	# loops 0
08:13:33:ST3_smx:INFO:	# loops 1
08:13:34:ST3_smx:INFO:	# loops 2
08:13:36:ST3_smx:INFO:	# loops 3
08:13:37:ST3_smx:INFO:	# loops 4
08:13:39:ST3_smx:INFO:	Total # of broken channels: 1
08:13:39:ST3_smx:INFO:	List of broken channels: [126]
08:13:39:ST3_smx:INFO:	Total # of broken channels: 46
08:13:39:ST3_smx:INFO:	List of broken channels: [13, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 103, 107, 109, 126]
08:13:41:ST3_smx:INFO:	chip: 28-3 	 50.430383 C 	 1124.048640 mV
08:13:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:41:ST3_smx:INFO:		Electrons
08:13:41:ST3_smx:INFO:	# loops 0
08:13:42:ST3_smx:INFO:	# loops 1
08:13:44:ST3_smx:INFO:	# loops 2
08:13:46:ST3_smx:INFO:	# loops 3
08:13:47:ST3_smx:INFO:	# loops 4
08:13:49:ST3_smx:INFO:	Total # of broken channels: 0
08:13:49:ST3_smx:INFO:	List of broken channels: []
08:13:49:ST3_smx:INFO:	Total # of broken channels: 21
08:13:49:ST3_smx:INFO:	List of broken channels: [13, 17, 19, 23, 27, 29, 31, 35, 37, 39, 41, 43, 45, 47, 53, 55, 59, 61, 65, 75, 77]
08:13:51:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1141.874115 mV
08:13:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:13:51:ST3_smx:INFO:		Electrons
08:13:51:ST3_smx:INFO:	# loops 0
08:13:52:ST3_smx:INFO:	# loops 1
08:13:54:ST3_smx:INFO:	# loops 2
08:13:55:ST3_smx:INFO:	# loops 3
08:13:57:ST3_smx:INFO:	# loops 4
08:13:59:ST3_smx:INFO:	Total # of broken channels: 0
08:13:59:ST3_smx:INFO:	List of broken channels: []
08:13:59:ST3_smx:INFO:	Total # of broken channels: 48
08:13:59:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 93, 97, 101]
08:14:00:ST3_smx:INFO:	chip: 26-5 	 69.560482 C 	 1076.295360 mV
08:14:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:00:ST3_smx:INFO:		Electrons
08:14:00:ST3_smx:INFO:	# loops 0
08:14:02:ST3_smx:INFO:	# loops 1
08:14:04:ST3_smx:INFO:	# loops 2
08:14:05:ST3_smx:INFO:	# loops 3
08:14:07:ST3_smx:INFO:	# loops 4
08:14:08:ST3_smx:INFO:	Total # of broken channels: 1
08:14:08:ST3_smx:INFO:	List of broken channels: [122]
08:14:08:ST3_smx:INFO:	Total # of broken channels: 41
08:14:08:ST3_smx:INFO:	List of broken channels: [9, 13, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 87, 89, 91, 93, 97, 122]
08:14:10:ST3_smx:INFO:	chip: 17-6 	 56.797143 C 	 1124.048640 mV
08:14:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:10:ST3_smx:INFO:		Electrons
08:14:10:ST3_smx:INFO:	# loops 0
08:14:12:ST3_smx:INFO:	# loops 1
08:14:13:ST3_smx:INFO:	# loops 2
08:14:15:ST3_smx:INFO:	# loops 3
08:14:16:ST3_smx:INFO:	# loops 4
08:14:18:ST3_smx:INFO:	Total # of broken channels: 0
08:14:18:ST3_smx:INFO:	List of broken channels: []
08:14:18:ST3_smx:INFO:	Total # of broken channels: 32
08:14:18:ST3_smx:INFO:	List of broken channels: [11, 17, 19, 25, 27, 29, 31, 33, 35, 37, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83]
08:14:20:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1159.654860 mV
08:14:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:14:20:ST3_smx:INFO:		Electrons
08:14:20:ST3_smx:INFO:	# loops 0
08:14:22:ST3_smx:INFO:	# loops 1
08:14:23:ST3_smx:INFO:	# loops 2
08:14:25:ST3_smx:INFO:	# loops 3
08:14:26:ST3_smx:INFO:	# loops 4
08:14:28:ST3_smx:INFO:	Total # of broken channels: 0
08:14:28:ST3_smx:INFO:	List of broken channels: []
08:14:28:ST3_smx:INFO:	Total # of broken channels: 39
08:14:28:ST3_smx:INFO:	List of broken channels: [3, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 91, 93, 95, 105]
08:14:28:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:14:28:febtest:INFO:	23-00 | XA-000-08-002-003-007-051-14 |  44.1 | 1177.4
08:14:29:febtest:INFO:	30-01 | XA-055-08-002-003-007-021-12 |  53.6 | 1135.9
08:14:29:febtest:INFO:	21-02 | XA-000-08-002-003-007-053-14 |  47.3 | 1153.7
08:14:29:febtest:INFO:	28-03 | XA-000-08-002-003-007-066-02 |  53.6 | 1141.9
08:14:29:febtest:INFO:	19-04 | XA-000-08-002-003-007-050-14 |  47.3 | 1159.7
08:14:30:febtest:INFO:	26-05 | XA-056-08-002-003-007-021-01 |  72.8 | 1094.2
08:14:30:febtest:INFO:	17-06 | XA-000-08-002-003-007-062-14 |  60.0 | 1141.9
08:14:30:febtest:INFO:	24-07 | XA-000-08-002-003-007-052-14 |  37.7 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_04-08_12_32
OPERATOR  : Olga B.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2229| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 27072 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL6T0010240B2
LADDER_NAME: L8UL601024
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4770', '1.847', '2.6900']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0460', '1.849', '2.6050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9960', '1.850', '0.5301']