13:33:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:39:ST3_Shared:INFO:	                       FEB-Microcable                       
13:33:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:39:febtest:INFO:	Testing FEB with SN 2230
13:33:41:smx_tester:INFO:	Scanning setup
13:33:41:elinks:INFO:	Disabling clock on downlink 0
13:33:41:elinks:INFO:	Disabling clock on downlink 1
13:33:41:elinks:INFO:	Disabling clock on downlink 2
13:33:41:elinks:INFO:	Disabling clock on downlink 3
13:33:41:elinks:INFO:	Disabling clock on downlink 4
13:33:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:33:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:41:elinks:INFO:	Disabling clock on downlink 0
13:33:41:elinks:INFO:	Disabling clock on downlink 1
13:33:41:elinks:INFO:	Disabling clock on downlink 2
13:33:41:elinks:INFO:	Disabling clock on downlink 3
13:33:41:elinks:INFO:	Disabling clock on downlink 4
13:33:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:41:elinks:INFO:	Disabling clock on downlink 0
13:33:41:elinks:INFO:	Disabling clock on downlink 1
13:33:41:elinks:INFO:	Disabling clock on downlink 2
13:33:41:elinks:INFO:	Disabling clock on downlink 3
13:33:41:elinks:INFO:	Disabling clock on downlink 4
13:33:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:33:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:33:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:41:elinks:INFO:	Disabling clock on downlink 0
13:33:41:elinks:INFO:	Disabling clock on downlink 1
13:33:41:elinks:INFO:	Disabling clock on downlink 2
13:33:41:elinks:INFO:	Disabling clock on downlink 3
13:33:41:elinks:INFO:	Disabling clock on downlink 4
13:33:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:33:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:41:elinks:INFO:	Disabling clock on downlink 0
13:33:41:elinks:INFO:	Disabling clock on downlink 1
13:33:42:elinks:INFO:	Disabling clock on downlink 2
13:33:42:elinks:INFO:	Disabling clock on downlink 3
13:33:42:elinks:INFO:	Disabling clock on downlink 4
13:33:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:33:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:42:setup_element:INFO:	Scanning clock phase
13:33:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:33:42:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:42:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:42:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:42:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:33:42:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
13:33:42:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:33:42:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:33:42:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
13:33:42:setup_element:INFO:	Scanning data phases
13:33:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:33:47:setup_element:INFO:	Eye window for uplink 16: XXXXX_________________________________XX
Data delay found: 21
13:33:47:setup_element:INFO:	Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
13:33:47:setup_element:INFO:	Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
13:33:47:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
13:33:47:setup_element:INFO:	Eye window for uplink 20: XXXX___________________________________X
Data delay found: 21
13:33:47:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
13:33:47:setup_element:INFO:	Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
13:33:47:setup_element:INFO:	Eye window for uplink 23: XXXX_____________________________XXXXXXX
Data delay found: 18
13:33:47:setup_element:INFO:	Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
13:33:47:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
13:33:47:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
13:33:47:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:33:47:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
13:33:47:setup_element:INFO:	Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
13:33:47:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
13:33:47:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
13:33:47:setup_element:INFO:	Setting the data phase to 21 for uplink 16
13:33:47:setup_element:INFO:	Setting the data phase to 18 for uplink 17
13:33:47:setup_element:INFO:	Setting the data phase to 18 for uplink 18
13:33:47:setup_element:INFO:	Setting the data phase to 15 for uplink 19
13:33:47:setup_element:INFO:	Setting the data phase to 21 for uplink 20
13:33:47:setup_element:INFO:	Setting the data phase to 19 for uplink 21
13:33:47:setup_element:INFO:	Setting the data phase to 18 for uplink 22
13:33:47:setup_element:INFO:	Setting the data phase to 18 for uplink 23
13:33:47:setup_element:INFO:	Setting the data phase to 30 for uplink 24
13:33:47:setup_element:INFO:	Setting the data phase to 32 for uplink 25
13:33:47:setup_element:INFO:	Setting the data phase to 30 for uplink 26
13:33:47:setup_element:INFO:	Setting the data phase to 33 for uplink 27
13:33:47:setup_element:INFO:	Setting the data phase to 34 for uplink 28
13:33:47:setup_element:INFO:	Setting the data phase to 36 for uplink 29
13:33:47:setup_element:INFO:	Setting the data phase to 39 for uplink 30
13:33:47:setup_element:INFO:	Setting the data phase to 0 for uplink 31
13:33:47:setup_element:INFO:	Beginning SMX ASICs map scan
13:33:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:33:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:33:48:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:33:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:33:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:33:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:33:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:33:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:33:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:33:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:33:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:33:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:33:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:33:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:33:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:33:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:33:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:33:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:33:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:33:50:setup_element:INFO:	Performing Elink synchronization
13:33:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:33:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:33:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:33:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:33:50:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x0
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x1
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x2
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x3
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x4
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x5
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x6
13:33:51:ST3_emu_feb:DEBUG:	Chip address:  	0x7
13:33:51:febtest:INFO:	Init all SMX (CSA): 30
13:34:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:05:febtest:INFO:	23-00 | XA-000-09-004-003-015-009-01 |  34.6 | 1165.6
13:34:05:febtest:INFO:	30-01 | XA-000-09-004-003-012-008-15 |  37.7 | 1147.8
13:34:05:febtest:INFO:	21-02 | XA-000-09-004-003-010-026-13 |  31.4 | 1171.5
13:34:06:febtest:INFO:	28-03 | XA-000-09-004-003-012-009-15 |  25.1 | 1189.2
13:34:06:febtest:INFO:	19-04 | XA-000-09-004-003-009-018-03 |  21.9 | 1218.6
13:34:06:febtest:INFO:	26-05 | XA-000-09-004-003-014-009-12 |  34.6 | 1147.8
13:34:06:febtest:INFO:	17-06 | XA-000-09-004-003-009-016-03 |  37.7 | 1147.8
13:34:07:febtest:INFO:	24-07 | XA-000-09-004-003-016-009-09 |  25.1 | 1201.0
13:34:08:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:34:10:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1177.390875 mV
13:34:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:10:ST3_smx:INFO:		Electrons
13:34:10:ST3_smx:INFO:	# loops 0
13:34:11:ST3_smx:INFO:	# loops 1
13:34:13:ST3_smx:INFO:	# loops 2
13:34:14:ST3_smx:INFO:	Total # of broken channels: 0
13:34:14:ST3_smx:INFO:	List of broken channels: []
13:34:14:ST3_smx:INFO:	Total # of broken channels: 28
13:34:14:ST3_smx:INFO:	List of broken channels: [66, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124]
13:34:16:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1159.654860 mV
13:34:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:16:ST3_smx:INFO:		Electrons
13:34:16:ST3_smx:INFO:	# loops 0
13:34:18:ST3_smx:INFO:	# loops 1
13:34:19:ST3_smx:INFO:	# loops 2
13:34:21:ST3_smx:INFO:	Total # of broken channels: 0
13:34:21:ST3_smx:INFO:	List of broken channels: []
13:34:21:ST3_smx:INFO:	Total # of broken channels: 0
13:34:21:ST3_smx:INFO:	List of broken channels: []
13:34:22:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1183.292940 mV
13:34:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:22:ST3_smx:INFO:		Electrons
13:34:22:ST3_smx:INFO:	# loops 0
13:34:24:ST3_smx:INFO:	# loops 1
13:34:25:ST3_smx:INFO:	# loops 2
13:34:27:ST3_smx:INFO:	Total # of broken channels: 0
13:34:27:ST3_smx:INFO:	List of broken channels: []
13:34:27:ST3_smx:INFO:	Total # of broken channels: 24
13:34:27:ST3_smx:INFO:	List of broken channels: [24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 54, 58, 60, 84, 88, 114, 116, 118, 120, 122]
13:34:29:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1200.969315 mV
13:34:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:29:ST3_smx:INFO:		Electrons
13:34:29:ST3_smx:INFO:	# loops 0
13:34:30:ST3_smx:INFO:	# loops 1
13:34:32:ST3_smx:INFO:	# loops 2
13:34:33:ST3_smx:INFO:	Total # of broken channels: 0
13:34:33:ST3_smx:INFO:	List of broken channels: []
13:34:33:ST3_smx:INFO:	Total # of broken channels: 17
13:34:33:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33]
13:34:35:ST3_smx:INFO:	chip: 19-4 	 21.902970 C 	 1224.468235 mV
13:34:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:35:ST3_smx:INFO:		Electrons
13:34:35:ST3_smx:INFO:	# loops 0
13:34:37:ST3_smx:INFO:	# loops 1
13:34:38:ST3_smx:INFO:	# loops 2
13:34:40:ST3_smx:INFO:	Total # of broken channels: 0
13:34:40:ST3_smx:INFO:	List of broken channels: []
13:34:40:ST3_smx:INFO:	Total # of broken channels: 1
13:34:40:ST3_smx:INFO:	List of broken channels: [8]
13:34:42:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1159.654860 mV
13:34:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:42:ST3_smx:INFO:		Electrons
13:34:42:ST3_smx:INFO:	# loops 0
13:34:43:ST3_smx:INFO:	# loops 1
13:34:45:ST3_smx:INFO:	# loops 2
13:34:46:ST3_smx:INFO:	Total # of broken channels: 0
13:34:46:ST3_smx:INFO:	List of broken channels: []
13:34:46:ST3_smx:INFO:	Total # of broken channels: 0
13:34:46:ST3_smx:INFO:	List of broken channels: []
13:34:48:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1159.654860 mV
13:34:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:48:ST3_smx:INFO:		Electrons
13:34:48:ST3_smx:INFO:	# loops 0
13:34:50:ST3_smx:INFO:	# loops 1
13:34:52:ST3_smx:INFO:	# loops 2
13:34:53:ST3_smx:INFO:	Total # of broken channels: 0
13:34:53:ST3_smx:INFO:	List of broken channels: []
13:34:53:ST3_smx:INFO:	Total # of broken channels: 0
13:34:53:ST3_smx:INFO:	List of broken channels: []
13:34:55:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1212.728715 mV
13:34:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:55:ST3_smx:INFO:		Electrons
13:34:55:ST3_smx:INFO:	# loops 0
13:34:57:ST3_smx:INFO:	# loops 1
13:34:58:ST3_smx:INFO:	# loops 2
13:35:00:ST3_smx:INFO:	Total # of broken channels: 0
13:35:00:ST3_smx:INFO:	List of broken channels: []
13:35:00:ST3_smx:INFO:	Total # of broken channels: 0
13:35:00:ST3_smx:INFO:	List of broken channels: []
13:35:00:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:00:febtest:INFO:	23-00 | XA-000-09-004-003-015-009-01 |  31.4 | 1201.0
13:35:01:febtest:INFO:	30-01 | XA-000-09-004-003-012-008-15 |  37.7 | 1183.3
13:35:01:febtest:INFO:	21-02 | XA-000-09-004-003-010-026-13 |  31.4 | 1206.9
13:35:01:febtest:INFO:	28-03 | XA-000-09-004-003-012-009-15 |  25.1 | 1224.5
13:35:01:febtest:INFO:	19-04 | XA-000-09-004-003-009-018-03 |  25.1 | 1247.9
13:35:02:febtest:INFO:	26-05 | XA-000-09-004-003-014-009-12 |  37.7 | 1183.3
13:35:02:febtest:INFO:	17-06 | XA-000-09-004-003-009-016-03 |  40.9 | 1177.4
13:35:02:febtest:INFO:	24-07 | XA-000-09-004-003-016-009-09 |  25.1 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_23-13_33_39
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2230| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6000', '1.848', '2.3890']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '2.5570']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9580', '1.850', '0.5206']