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FEB_2235 03.09.24 15:35:14
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15:35:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:35:14:ST3_Shared:INFO: FEB-Microcable
15:35:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:35:14:febtest:INFO: Testing FEB with SN 2235
15:35:15:smx_tester:INFO: Scanning setup
15:35:15:elinks:INFO: Disabling clock on downlink 0
15:35:15:elinks:INFO: Disabling clock on downlink 1
15:35:15:elinks:INFO: Disabling clock on downlink 2
15:35:15:elinks:INFO: Disabling clock on downlink 3
15:35:15:elinks:INFO: Disabling clock on downlink 4
15:35:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:35:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:35:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:35:16:elinks:INFO: Disabling clock on downlink 0
15:35:16:elinks:INFO: Disabling clock on downlink 1
15:35:16:elinks:INFO: Disabling clock on downlink 2
15:35:16:elinks:INFO: Disabling clock on downlink 3
15:35:16:elinks:INFO: Disabling clock on downlink 4
15:35:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:35:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:35:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:35:16:elinks:INFO: Disabling clock on downlink 0
15:35:16:elinks:INFO: Disabling clock on downlink 1
15:35:16:elinks:INFO: Disabling clock on downlink 2
15:35:16:elinks:INFO: Disabling clock on downlink 3
15:35:16:elinks:INFO: Disabling clock on downlink 4
15:35:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:35:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:35:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:35:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:35:16:elinks:INFO: Disabling clock on downlink 0
15:35:16:elinks:INFO: Disabling clock on downlink 1
15:35:16:elinks:INFO: Disabling clock on downlink 2
15:35:16:elinks:INFO: Disabling clock on downlink 3
15:35:16:elinks:INFO: Disabling clock on downlink 4
15:35:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:35:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:35:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:35:16:elinks:INFO: Disabling clock on downlink 0
15:35:16:elinks:INFO: Disabling clock on downlink 1
15:35:16:elinks:INFO: Disabling clock on downlink 2
15:35:16:elinks:INFO: Disabling clock on downlink 3
15:35:16:elinks:INFO: Disabling clock on downlink 4
15:35:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:35:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:35:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:35:16:setup_element:INFO: Scanning clock phase
15:35:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:35:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:35:16:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:35:16:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:35:16:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:35:16:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:35:16:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:35:16:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
15:35:16:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
15:35:16:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:35:16:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
15:35:16:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:35:16:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:35:16:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
15:35:17:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
15:35:17:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
15:35:17:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
15:35:17:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:35:17:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:35:17:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
15:35:17:setup_element:INFO: Scanning data phases
15:35:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:35:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:35:22:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:35:22:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
15:35:22:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
15:35:22:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
15:35:22:setup_element:INFO: Eye window for uplink 19: XXX_________________________________XXXX
Data delay found: 19
15:35:22:setup_element:INFO: Eye window for uplink 20: X_____________________________XXXXXXXXXX
Data delay found: 15
15:35:22:setup_element:INFO: Eye window for uplink 21: X_____________________________XXXXXXXXXX
Data delay found: 15
15:35:22:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
15:35:22:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
15:35:22:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
15:35:22:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________
Data delay found: 30
15:35:22:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
15:35:22:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
15:35:22:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
15:35:22:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
15:35:22:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
15:35:22:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
15:35:22:setup_element:INFO: Setting the data phase to 21 for uplink 16
15:35:22:setup_element:INFO: Setting the data phase to 19 for uplink 17
15:35:22:setup_element:INFO: Setting the data phase to 21 for uplink 18
15:35:22:setup_element:INFO: Setting the data phase to 19 for uplink 19
15:35:22:setup_element:INFO: Setting the data phase to 15 for uplink 20
15:35:22:setup_element:INFO: Setting the data phase to 15 for uplink 21
15:35:22:setup_element:INFO: Setting the data phase to 18 for uplink 22
15:35:22:setup_element:INFO: Setting the data phase to 19 for uplink 23
15:35:22:setup_element:INFO: Setting the data phase to 28 for uplink 24
15:35:22:setup_element:INFO: Setting the data phase to 30 for uplink 25
15:35:22:setup_element:INFO: Setting the data phase to 32 for uplink 26
15:35:22:setup_element:INFO: Setting the data phase to 35 for uplink 27
15:35:22:setup_element:INFO: Setting the data phase to 34 for uplink 28
15:35:22:setup_element:INFO: Setting the data phase to 36 for uplink 29
15:35:22:setup_element:INFO: Setting the data phase to 39 for uplink 30
15:35:22:setup_element:INFO: Setting the data phase to 0 for uplink 31
15:35:22:setup_element:INFO: Beginning SMX ASICs map scan
15:35:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:35:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:35:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:35:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:35:22:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:35:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:35:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:35:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:35:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:35:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:35:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:35:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:35:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:35:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:35:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:35:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:35:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:35:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:35:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:35:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:35:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:35:25:setup_element:INFO: Performing Elink synchronization
15:35:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:35:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:35:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:35:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:35:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:35:25:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:35:25:ST3_emu_feb:DEBUG: Chip address: 0x0
15:35:25:ST3_emu_feb:DEBUG: Chip address: 0x1
15:35:25:ST3_emu_feb:DEBUG: Chip address: 0x2
15:35:25:ST3_emu_feb:DEBUG: Chip address: 0x3
15:35:26:ST3_emu_feb:DEBUG: Chip address: 0x4
15:35:26:ST3_emu_feb:DEBUG: Chip address: 0x5
15:35:26:ST3_emu_feb:DEBUG: Chip address: 0x6
15:35:26:ST3_emu_feb:DEBUG: Chip address: 0x7
15:35:26:febtest:INFO: Init all SMX (CSA): 30
15:35:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:35:40:febtest:INFO: 23-00 | XA-000-08-003-000-005-243-09 | 28.2 | 1183.3
15:35:40:febtest:INFO: 30-01 | XA-000-08-003-000-005-245-09 | -432.3 | 1578.5
15:35:41:febtest:INFO: 21-02 | XA-000-08-002-003-007-124-11 | 18.7 | 1271.2
15:35:41:febtest:INFO: 28-03 | XA-000-08-003-000-005-246-09 | 40.9 | 1130.0
15:35:41:febtest:INFO: 19-04 | XA-000-08-003-000-005-188-12 | 21.9 | 1212.7
15:35:41:febtest:INFO: 26-05 | XA-000-08-003-000-005-241-09 | 34.6 | 1171.5
15:35:41:febtest:INFO: 17-06 | XA-000-08-003-000-005-190-12 | 34.6 | 1171.5
15:35:42:febtest:INFO: 24-07 | XA-000-08-003-000-005-247-09 | 25.1 | 1189.2
15:35:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:35:45:ST3_smx:INFO: chip: 23-0 28.225000 C 1195.082160 mV
15:35:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:45:ST3_smx:INFO: Electrons
15:35:45:ST3_smx:INFO: # loops 0
15:35:46:ST3_smx:INFO: # loops 1
15:35:48:ST3_smx:INFO: # loops 2
15:35:49:ST3_smx:INFO: Total # of broken channels: 1
15:35:49:ST3_smx:INFO: List of broken channels: [1]
15:35:49:ST3_smx:INFO: Total # of broken channels: 1
15:35:49:ST3_smx:INFO: List of broken channels: [1]
15:35:51:ST3_smx:INFO: chip: 30-1 -432.266438 C 1578.532875 mV
15:35:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:51:ST3_smx:INFO: Electrons
15:35:51:ST3_smx:INFO: # loops 0
15:35:53:ST3_smx:INFO: # loops 1
15:35:54:ST3_smx:INFO: # loops 2
15:35:56:ST3_smx:INFO: Total # of broken channels: 0
15:35:56:ST3_smx:INFO: List of broken channels: []
15:35:56:ST3_smx:INFO: Total # of broken channels: 7
15:35:56:ST3_smx:INFO: List of broken channels: [98, 113, 115, 117, 119, 121, 123]
15:35:58:ST3_smx:INFO: chip: 21-2 15.590880 C 1317.668715 mV
15:35:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:58:ST3_smx:INFO: Electrons
15:35:58:ST3_smx:INFO: # loops 0
15:35:59:ST3_smx:INFO: # loops 1
15:36:01:ST3_smx:INFO: # loops 2
15:36:02:ST3_smx:INFO: Total # of broken channels: 0
15:36:02:ST3_smx:INFO: List of broken channels: []
15:36:02:ST3_smx:INFO: Total # of broken channels: 1
15:36:02:ST3_smx:INFO: List of broken channels: [1]
15:36:04:ST3_smx:INFO: chip: 28-3 40.898880 C 1147.806000 mV
15:36:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:04:ST3_smx:INFO: Electrons
15:36:04:ST3_smx:INFO: # loops 0
15:36:06:ST3_smx:INFO: # loops 1
15:36:07:ST3_smx:INFO: # loops 2
15:36:09:ST3_smx:INFO: Total # of broken channels: 0
15:36:09:ST3_smx:INFO: List of broken channels: []
15:36:09:ST3_smx:INFO: Total # of broken channels: 0
15:36:09:ST3_smx:INFO: List of broken channels: []
15:36:11:ST3_smx:INFO: chip: 19-4 21.902970 C 1224.468235 mV
15:36:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:11:ST3_smx:INFO: Electrons
15:36:11:ST3_smx:INFO: # loops 0
15:36:12:ST3_smx:INFO: # loops 1
15:36:14:ST3_smx:INFO: # loops 2
15:36:15:ST3_smx:INFO: Total # of broken channels: 0
15:36:15:ST3_smx:INFO: List of broken channels: []
15:36:15:ST3_smx:INFO: Total # of broken channels: 27
15:36:15:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 35, 36, 38, 39, 40, 42, 45, 46, 103]
15:36:17:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
15:36:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:17:ST3_smx:INFO: Electrons
15:36:17:ST3_smx:INFO: # loops 0
15:36:19:ST3_smx:INFO: # loops 1
15:36:20:ST3_smx:INFO: # loops 2
15:36:22:ST3_smx:INFO: Total # of broken channels: 0
15:36:22:ST3_smx:INFO: List of broken channels: []
15:36:22:ST3_smx:INFO: Total # of broken channels: 58
15:36:22:ST3_smx:INFO: List of broken channels: [7, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125]
15:36:24:ST3_smx:INFO: chip: 17-6 34.556970 C 1183.292940 mV
15:36:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:24:ST3_smx:INFO: Electrons
15:36:24:ST3_smx:INFO: # loops 0
15:36:25:ST3_smx:INFO: # loops 1
15:36:27:ST3_smx:INFO: # loops 2
15:36:28:ST3_smx:INFO: Total # of broken channels: 0
15:36:28:ST3_smx:INFO: List of broken channels: []
15:36:28:ST3_smx:INFO: Total # of broken channels: 0
15:36:28:ST3_smx:INFO: List of broken channels: []
15:36:30:ST3_smx:INFO: chip: 24-7 25.062742 C 1206.851500 mV
15:36:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:30:ST3_smx:INFO: Electrons
15:36:30:ST3_smx:INFO: # loops 0
15:36:32:ST3_smx:INFO: # loops 1
15:36:33:ST3_smx:INFO: # loops 2
15:36:35:ST3_smx:INFO: Total # of broken channels: 0
15:36:35:ST3_smx:INFO: List of broken channels: []
15:36:35:ST3_smx:INFO: Total # of broken channels: 1
15:36:35:ST3_smx:INFO: List of broken channels: [7]
15:36:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:36:35:febtest:INFO: 23-00 | XA-000-08-003-000-005-243-09 | 28.2 | 1224.5
15:36:36:febtest:INFO: 30-01 | XA-000-08-003-000-005-245-09 | -432.3 | 1578.5
15:36:36:febtest:INFO: 21-02 | XA-000-08-002-003-007-124-11 | 12.4 | 1578.5
15:36:36:febtest:INFO: 28-03 | XA-000-08-003-000-005-246-09 | 40.9 | 1171.5
15:36:36:febtest:INFO: 19-04 | XA-000-08-003-000-005-188-12 | 25.1 | 1247.9
15:36:36:febtest:INFO: 26-05 | XA-000-08-003-000-005-241-09 | 34.6 | 1206.9
15:36:37:febtest:INFO: 17-06 | XA-000-08-003-000-005-190-12 | 34.6 | 1206.9
15:36:37:febtest:INFO: 24-07 | XA-000-08-003-000-005-247-09 | 25.1 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_03-15_35_14
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2235| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4690', '1.848', '2.6740']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0600', '1.850', '2.6280']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0260', '1.850', '0.5257']