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FEB_2236 13.09.24 08:31:24
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08:31:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:31:24:ST3_Shared:INFO: FEB-Sensor
08:31:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:31:41:ST3_ModuleSelector:INFO: M8UL0B1010601A2
08:31:41:ST3_ModuleSelector:INFO: 16124
08:31:41:febtest:INFO: Testing FEB with SN 2236
08:31:42:smx_tester:INFO: Scanning setup
08:31:42:elinks:INFO: Disabling clock on downlink 0
08:31:42:elinks:INFO: Disabling clock on downlink 1
08:31:42:elinks:INFO: Disabling clock on downlink 2
08:31:42:elinks:INFO: Disabling clock on downlink 3
08:31:42:elinks:INFO: Disabling clock on downlink 4
08:31:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:31:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:42:elinks:INFO: Disabling clock on downlink 0
08:31:42:elinks:INFO: Disabling clock on downlink 1
08:31:42:elinks:INFO: Disabling clock on downlink 2
08:31:42:elinks:INFO: Disabling clock on downlink 3
08:31:42:elinks:INFO: Disabling clock on downlink 4
08:31:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:31:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:43:elinks:INFO: Disabling clock on downlink 0
08:31:43:elinks:INFO: Disabling clock on downlink 1
08:31:43:elinks:INFO: Disabling clock on downlink 2
08:31:43:elinks:INFO: Disabling clock on downlink 3
08:31:43:elinks:INFO: Disabling clock on downlink 4
08:31:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:31:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:31:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:43:elinks:INFO: Disabling clock on downlink 0
08:31:43:elinks:INFO: Disabling clock on downlink 1
08:31:43:elinks:INFO: Disabling clock on downlink 2
08:31:43:elinks:INFO: Disabling clock on downlink 3
08:31:43:elinks:INFO: Disabling clock on downlink 4
08:31:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:31:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:43:elinks:INFO: Disabling clock on downlink 0
08:31:43:elinks:INFO: Disabling clock on downlink 1
08:31:43:elinks:INFO: Disabling clock on downlink 2
08:31:43:elinks:INFO: Disabling clock on downlink 3
08:31:43:elinks:INFO: Disabling clock on downlink 4
08:31:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:31:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:31:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:31:43:setup_element:INFO: Scanning clock phase
08:31:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:31:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:31:44:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
08:31:44:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
08:31:44:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:31:44:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:31:44:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:31:44:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:31:44:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:31:44:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:31:44:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:31:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
08:31:44:setup_element:INFO: Scanning data phases
08:31:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:31:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:31:49:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
08:31:49:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
08:31:49:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
08:31:49:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
08:31:49:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
08:31:49:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
08:31:49:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
08:31:49:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
08:31:49:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
08:31:49:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
08:31:49:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
08:31:49:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
08:31:49:setup_element:INFO: Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
08:31:49:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
08:31:49:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXXX______________
Data delay found: 2
08:31:49:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
08:31:49:setup_element:INFO: Setting the data phase to 21 for uplink 16
08:31:49:setup_element:INFO: Setting the data phase to 19 for uplink 17
08:31:49:setup_element:INFO: Setting the data phase to 18 for uplink 18
08:31:49:setup_element:INFO: Setting the data phase to 15 for uplink 19
08:31:49:setup_element:INFO: Setting the data phase to 16 for uplink 20
08:31:49:setup_element:INFO: Setting the data phase to 15 for uplink 21
08:31:49:setup_element:INFO: Setting the data phase to 17 for uplink 22
08:31:49:setup_element:INFO: Setting the data phase to 19 for uplink 23
08:31:49:setup_element:INFO: Setting the data phase to 29 for uplink 24
08:31:49:setup_element:INFO: Setting the data phase to 31 for uplink 25
08:31:49:setup_element:INFO: Setting the data phase to 31 for uplink 26
08:31:49:setup_element:INFO: Setting the data phase to 35 for uplink 27
08:31:49:setup_element:INFO: Setting the data phase to 38 for uplink 28
08:31:49:setup_element:INFO: Setting the data phase to 1 for uplink 29
08:31:49:setup_element:INFO: Setting the data phase to 2 for uplink 30
08:31:49:setup_element:INFO: Setting the data phase to 2 for uplink 31
08:31:49:setup_element:INFO: Beginning SMX ASICs map scan
08:31:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:31:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:31:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:31:49:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:31:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:31:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:31:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:31:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:31:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:31:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:31:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:31:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:31:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:31:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:31:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:31:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:31:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:31:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:31:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:31:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:31:52:setup_element:INFO: Performing Elink synchronization
08:31:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:31:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:31:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:31:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:31:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:31:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x0
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x1
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x2
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x3
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x4
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x5
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x6
08:31:53:ST3_emu_feb:DEBUG: Chip address: 0x7
08:31:53:febtest:INFO: Init all SMX (CSA): 30
08:32:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:32:07:febtest:INFO: 23-00 | XA-000-08-003-000-005-200-00 | 31.4 | 1159.7
08:32:07:febtest:INFO: 30-01 | XA-000-08-003-000-005-225-14 | 3.0 | 1265.4
08:32:07:febtest:INFO: 21-02 | XA-000-08-003-000-005-227-14 | 28.2 | 1171.5
08:32:08:febtest:INFO: 28-03 | XA-000-08-003-000-005-237-14 | 21.9 | 1177.4
08:32:08:febtest:INFO: 19-04 | XA-000-08-002-003-007-106-12 | 31.4 | 1171.5
08:32:08:febtest:INFO: 26-05 | XA-000-08-003-000-005-236-14 | 25.1 | 1177.4
08:32:08:febtest:INFO: 17-06 | XA-000-08-003-000-005-206-00 | -432.3 | 1578.5
08:32:09:febtest:INFO: 24-07 | XA-000-08-002-003-007-120-11 | 31.4 | 1159.7
08:32:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:32:12:ST3_smx:INFO: chip: 23-0 31.389742 C 1171.483840 mV
08:32:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:12:ST3_smx:INFO: Electrons
08:32:12:ST3_smx:INFO: # loops 0
08:32:13:ST3_smx:INFO: # loops 1
08:32:15:ST3_smx:INFO: # loops 2
08:32:16:ST3_smx:INFO: # loops 3
08:32:18:ST3_smx:INFO: # loops 4
08:32:19:ST3_smx:INFO: Total # of broken channels: 0
08:32:19:ST3_smx:INFO: List of broken channels: []
08:32:19:ST3_smx:INFO: Total # of broken channels: 0
08:32:19:ST3_smx:INFO: List of broken channels: []
08:32:21:ST3_smx:INFO: chip: 30-1 2.996520 C 1288.680240 mV
08:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:21:ST3_smx:INFO: Electrons
08:32:21:ST3_smx:INFO: # loops 0
08:32:23:ST3_smx:INFO: # loops 1
08:32:25:ST3_smx:INFO: # loops 2
08:32:26:ST3_smx:INFO: # loops 3
08:32:28:ST3_smx:INFO: # loops 4
08:32:30:ST3_smx:INFO: Total # of broken channels: 0
08:32:30:ST3_smx:INFO: List of broken channels: []
08:32:30:ST3_smx:INFO: Total # of broken channels: 0
08:32:30:ST3_smx:INFO: List of broken channels: []
08:32:32:ST3_smx:INFO: chip: 21-2 28.225000 C 1183.292940 mV
08:32:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:32:ST3_smx:INFO: Electrons
08:32:32:ST3_smx:INFO: # loops 0
08:32:33:ST3_smx:INFO: # loops 1
08:32:35:ST3_smx:INFO: # loops 2
08:32:37:ST3_smx:INFO: # loops 3
08:32:38:ST3_smx:INFO: # loops 4
08:32:40:ST3_smx:INFO: Total # of broken channels: 0
08:32:40:ST3_smx:INFO: List of broken channels: []
08:32:40:ST3_smx:INFO: Total # of broken channels: 0
08:32:40:ST3_smx:INFO: List of broken channels: []
08:32:42:ST3_smx:INFO: chip: 28-3 21.902970 C 1189.190035 mV
08:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:42:ST3_smx:INFO: Electrons
08:32:42:ST3_smx:INFO: # loops 0
08:32:44:ST3_smx:INFO: # loops 1
08:32:45:ST3_smx:INFO: # loops 2
08:32:47:ST3_smx:INFO: # loops 3
08:32:49:ST3_smx:INFO: # loops 4
08:32:51:ST3_smx:INFO: Total # of broken channels: 0
08:32:51:ST3_smx:INFO: List of broken channels: []
08:32:51:ST3_smx:INFO: Total # of broken channels: 0
08:32:51:ST3_smx:INFO: List of broken channels: []
08:32:52:ST3_smx:INFO: chip: 19-4 31.389742 C 1183.292940 mV
08:32:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:52:ST3_smx:INFO: Electrons
08:32:52:ST3_smx:INFO: # loops 0
08:32:54:ST3_smx:INFO: # loops 1
08:32:56:ST3_smx:INFO: # loops 2
08:32:57:ST3_smx:INFO: # loops 3
08:32:59:ST3_smx:INFO: # loops 4
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:00:ST3_smx:INFO: Total # of broken channels: 1
08:33:00:ST3_smx:INFO: List of broken channels: [0]
08:33:02:ST3_smx:INFO: chip: 26-5 28.225000 C 1189.190035 mV
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_smx:INFO: Electrons
08:33:02:ST3_smx:INFO: # loops 0
08:33:04:ST3_smx:INFO: # loops 1
08:33:05:ST3_smx:INFO: # loops 2
08:33:07:ST3_smx:INFO: # loops 3
08:33:09:ST3_smx:INFO: # loops 4
08:33:10:ST3_smx:INFO: Total # of broken channels: 0
08:33:10:ST3_smx:INFO: List of broken channels: []
08:33:10:ST3_smx:INFO: Total # of broken channels: 0
08:33:10:ST3_smx:INFO: List of broken channels: []
08:33:12:ST3_smx:INFO: chip: 17-6 -432.266438 C 1578.532875 mV
08:33:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:12:ST3_smx:INFO: Electrons
08:33:12:ST3_smx:INFO: # loops 0
08:33:14:ST3_smx:INFO: # loops 1
08:33:15:ST3_smx:INFO: # loops 2
08:33:17:ST3_smx:INFO: # loops 3
08:33:19:ST3_smx:INFO: # loops 4
08:33:20:ST3_smx:INFO: Total # of broken channels: 0
08:33:20:ST3_smx:INFO: List of broken channels: []
08:33:20:ST3_smx:INFO: Total # of broken channels: 0
08:33:20:ST3_smx:INFO: List of broken channels: []
08:33:22:ST3_smx:INFO: chip: 24-7 31.389742 C 1171.483840 mV
08:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:22:ST3_smx:INFO: Electrons
08:33:22:ST3_smx:INFO: # loops 0
08:33:24:ST3_smx:INFO: # loops 1
08:33:25:ST3_smx:INFO: # loops 2
08:33:27:ST3_smx:INFO: # loops 3
08:33:28:ST3_smx:INFO: # loops 4
08:33:30:ST3_smx:INFO: Total # of broken channels: 0
08:33:30:ST3_smx:INFO: List of broken channels: []
08:33:30:ST3_smx:INFO: Total # of broken channels: 0
08:33:30:ST3_smx:INFO: List of broken channels: []
08:33:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:31:febtest:INFO: 23-00 | XA-000-08-003-000-005-200-00 | 34.6 | 1189.2
08:33:31:febtest:INFO: 30-01 | XA-000-08-003-000-005-225-14 | 3.0 | 1392.5
08:33:31:febtest:INFO: 21-02 | XA-000-08-003-000-005-227-14 | 28.2 | 1206.9
08:33:31:febtest:INFO: 28-03 | XA-000-08-003-000-005-237-14 | 25.1 | 1212.7
08:33:32:febtest:INFO: 19-04 | XA-000-08-002-003-007-106-12 | 34.6 | 1206.9
08:33:32:febtest:INFO: 26-05 | XA-000-08-003-000-005-236-14 | 28.2 | 1212.7
08:33:32:febtest:INFO: 17-06 | XA-000-08-003-000-005-206-00 | -432.3 | 1578.5
08:33:32:febtest:INFO: 24-07 | XA-000-08-002-003-007-120-11 | 34.6 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_13-08_31_24
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2236| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 16124 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL0B1010601A2
LADDER_NAME: L8UL001060
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4970', '1.848', '2.7210']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0990', '1.850', '2.6460']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0240', '1.850', '0.5307']