Go Back
FEB_2236 03.09.24 11:08:20
TextEdit.txt
11:08:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:20:ST3_Shared:INFO: FEB-Microcable
11:08:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:20:febtest:INFO: Testing FEB with SN 2236
11:08:22:smx_tester:INFO: Scanning setup
11:08:22:elinks:INFO: Disabling clock on downlink 0
11:08:22:elinks:INFO: Disabling clock on downlink 1
11:08:22:elinks:INFO: Disabling clock on downlink 2
11:08:22:elinks:INFO: Disabling clock on downlink 3
11:08:22:elinks:INFO: Disabling clock on downlink 4
11:08:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:22:elinks:INFO: Disabling clock on downlink 0
11:08:22:elinks:INFO: Disabling clock on downlink 1
11:08:22:elinks:INFO: Disabling clock on downlink 2
11:08:22:elinks:INFO: Disabling clock on downlink 3
11:08:22:elinks:INFO: Disabling clock on downlink 4
11:08:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:08:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:22:elinks:INFO: Disabling clock on downlink 0
11:08:22:elinks:INFO: Disabling clock on downlink 1
11:08:22:elinks:INFO: Disabling clock on downlink 2
11:08:22:elinks:INFO: Disabling clock on downlink 3
11:08:22:elinks:INFO: Disabling clock on downlink 4
11:08:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:08:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:08:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:22:elinks:INFO: Disabling clock on downlink 0
11:08:22:elinks:INFO: Disabling clock on downlink 1
11:08:22:elinks:INFO: Disabling clock on downlink 2
11:08:22:elinks:INFO: Disabling clock on downlink 3
11:08:22:elinks:INFO: Disabling clock on downlink 4
11:08:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:23:elinks:INFO: Disabling clock on downlink 0
11:08:23:elinks:INFO: Disabling clock on downlink 1
11:08:23:elinks:INFO: Disabling clock on downlink 2
11:08:23:elinks:INFO: Disabling clock on downlink 3
11:08:23:elinks:INFO: Disabling clock on downlink 4
11:08:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:23:setup_element:INFO: Scanning clock phase
11:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:08:23:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:08:23:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:08:23:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:23:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:23:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:08:23:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:08:23:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:08:23:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:08:23:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
11:08:23:setup_element:INFO: Scanning data phases
11:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:08:28:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
11:08:28:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
11:08:28:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
11:08:28:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
11:08:28:setup_element:INFO: Eye window for uplink 28: _________________XXXXX__________________
Data delay found: 39
11:08:28:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
11:08:28:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
11:08:28:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
11:08:28:setup_element:INFO: Setting the data phase to 30 for uplink 24
11:08:28:setup_element:INFO: Setting the data phase to 32 for uplink 25
11:08:28:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:08:28:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:08:28:setup_element:INFO: Setting the data phase to 39 for uplink 28
11:08:28:setup_element:INFO: Setting the data phase to 1 for uplink 29
11:08:28:setup_element:INFO: Setting the data phase to 1 for uplink 30
11:08:28:setup_element:INFO: Setting the data phase to 1 for uplink 31
11:08:28:setup_element:INFO: Beginning SMX ASICs map scan
11:08:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:08:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:08:28:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:08:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:08:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:08:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:08:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:08:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:08:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:08:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:08:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:08:31:setup_element:INFO: Performing Elink synchronization
11:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:08:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:08:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:08:31:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:08:31:ST3_emu_feb:DEBUG: Chip address: 0x1
11:08:31:ST3_emu_feb:DEBUG: Chip address: 0x3
11:08:31:ST3_emu_feb:DEBUG: Chip address: 0x5
11:08:32:ST3_emu_feb:DEBUG: Chip address: 0x7
11:08:32:febtest:INFO: Init all SMX (CSA): 30
11:08:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:08:39:febtest:INFO: 30-01 | XA-000-08-003-000-005-225-14 | 12.4 | 1224.5
11:08:40:febtest:INFO: 28-03 | XA-000-08-003-000-005-237-14 | 25.1 | 1177.4
11:08:40:febtest:INFO: 26-05 | XA-000-08-003-000-005-236-14 | 28.2 | 1177.4
11:08:40:febtest:INFO: 24-07 | XA-000-08-002-003-007-120-11 | 31.4 | 1159.7
11:08:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:08:43:ST3_smx:INFO: chip: 30-1 12.438562 C 1236.187875 mV
11:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:43:ST3_smx:INFO: Electrons
11:08:43:ST3_smx:INFO: # loops 0
11:08:45:ST3_smx:INFO: # loops 1
11:08:46:ST3_smx:INFO: # loops 2
11:08:48:ST3_smx:INFO: Total # of broken channels: 0
11:08:48:ST3_smx:INFO: List of broken channels: []
11:08:48:ST3_smx:INFO: Total # of broken channels: 0
11:08:48:ST3_smx:INFO: List of broken channels: []
11:08:50:ST3_smx:INFO: chip: 28-3 25.062742 C 1189.190035 mV
11:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:50:ST3_smx:INFO: Electrons
11:08:50:ST3_smx:INFO: # loops 0
11:08:51:ST3_smx:INFO: # loops 1
11:08:53:ST3_smx:INFO: # loops 2
11:08:55:ST3_smx:INFO: Total # of broken channels: 0
11:08:55:ST3_smx:INFO: List of broken channels: []
11:08:55:ST3_smx:INFO: Total # of broken channels: 0
11:08:55:ST3_smx:INFO: List of broken channels: []
11:08:56:ST3_smx:INFO: chip: 26-5 28.225000 C 1189.190035 mV
11:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:56:ST3_smx:INFO: Electrons
11:08:56:ST3_smx:INFO: # loops 0
11:08:58:ST3_smx:INFO: # loops 1
11:09:00:ST3_smx:INFO: # loops 2
11:09:01:ST3_smx:INFO: Total # of broken channels: 0
11:09:01:ST3_smx:INFO: List of broken channels: []
11:09:01:ST3_smx:INFO: Total # of broken channels: 0
11:09:01:ST3_smx:INFO: List of broken channels: []
11:09:03:ST3_smx:INFO: chip: 24-7 31.389742 C 1165.571835 mV
11:09:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:03:ST3_smx:INFO: Electrons
11:09:03:ST3_smx:INFO: # loops 0
11:09:05:ST3_smx:INFO: # loops 1
11:09:06:ST3_smx:INFO: # loops 2
11:09:08:ST3_smx:INFO: Total # of broken channels: 1
11:09:08:ST3_smx:INFO: List of broken channels: [9]
11:09:08:ST3_smx:INFO: Total # of broken channels: 0
11:09:08:ST3_smx:INFO: List of broken channels: []
11:09:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:09:08:febtest:INFO: 30-01 | XA-000-08-003-000-005-225-14 | 12.4 | 1259.6
11:09:09:febtest:INFO: 28-03 | XA-000-08-003-000-005-237-14 | 25.1 | 1212.7
11:09:09:febtest:INFO: 26-05 | XA-000-08-003-000-005-236-14 | 28.2 | 1212.7
11:09:09:febtest:INFO: 24-07 | XA-000-08-002-003-007-120-11 | 34.6 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_03-11_08_20
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2236| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7900', '1.848', '1.5720']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0350', '1.850', '1.2850']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '0.2694']