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FEB_2237 17.09.24 15:43:21
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15:43:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:43:21:ST3_Shared:INFO: FEB-Microcable
15:43:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:43:21:febtest:INFO: Testing FEB with SN 2237
15:43:23:smx_tester:INFO: Scanning setup
15:43:23:elinks:INFO: Disabling clock on downlink 0
15:43:23:elinks:INFO: Disabling clock on downlink 1
15:43:23:elinks:INFO: Disabling clock on downlink 2
15:43:23:elinks:INFO: Disabling clock on downlink 3
15:43:23:elinks:INFO: Disabling clock on downlink 4
15:43:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:43:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:23:elinks:INFO: Disabling clock on downlink 0
15:43:23:elinks:INFO: Disabling clock on downlink 1
15:43:23:elinks:INFO: Disabling clock on downlink 2
15:43:23:elinks:INFO: Disabling clock on downlink 3
15:43:23:elinks:INFO: Disabling clock on downlink 4
15:43:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:43:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:23:elinks:INFO: Disabling clock on downlink 0
15:43:23:elinks:INFO: Disabling clock on downlink 1
15:43:23:elinks:INFO: Disabling clock on downlink 2
15:43:23:elinks:INFO: Disabling clock on downlink 3
15:43:23:elinks:INFO: Disabling clock on downlink 4
15:43:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:43:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:43:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:23:elinks:INFO: Disabling clock on downlink 0
15:43:23:elinks:INFO: Disabling clock on downlink 1
15:43:23:elinks:INFO: Disabling clock on downlink 2
15:43:23:elinks:INFO: Disabling clock on downlink 3
15:43:23:elinks:INFO: Disabling clock on downlink 4
15:43:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:43:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:23:elinks:INFO: Disabling clock on downlink 0
15:43:23:elinks:INFO: Disabling clock on downlink 1
15:43:23:elinks:INFO: Disabling clock on downlink 2
15:43:23:elinks:INFO: Disabling clock on downlink 3
15:43:23:elinks:INFO: Disabling clock on downlink 4
15:43:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:43:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:43:24:setup_element:INFO: Scanning clock phase
15:43:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:43:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:43:24:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
15:43:24:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
15:43:24:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
15:43:24:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
15:43:24:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
15:43:24:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
15:43:24:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:43:24:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:43:24:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2
15:43:24:setup_element:INFO: Scanning data phases
15:43:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:43:29:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:43:29:setup_element:INFO: Eye window for uplink 24: __XXXXXX________________________________
Data delay found: 24
15:43:29:setup_element:INFO: Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
15:43:29:setup_element:INFO: Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
15:43:29:setup_element:INFO: Eye window for uplink 27: _______________XXXXX____________________
Data delay found: 37
15:43:29:setup_element:INFO: Eye window for uplink 28: _____XXXXX______________________________
Data delay found: 27
15:43:29:setup_element:INFO: Eye window for uplink 29: _______XXXXXX___________________________
Data delay found: 29
15:43:29:setup_element:INFO: Eye window for uplink 30: _________XXXXXX_________________________
Data delay found: 31
15:43:29:setup_element:INFO: Eye window for uplink 31: _________XXXXXX_________________________
Data delay found: 31
15:43:29:setup_element:INFO: Setting the data phase to 24 for uplink 24
15:43:29:setup_element:INFO: Setting the data phase to 26 for uplink 25
15:43:29:setup_element:INFO: Setting the data phase to 33 for uplink 26
15:43:29:setup_element:INFO: Setting the data phase to 37 for uplink 27
15:43:29:setup_element:INFO: Setting the data phase to 27 for uplink 28
15:43:29:setup_element:INFO: Setting the data phase to 29 for uplink 29
15:43:29:setup_element:INFO: Setting the data phase to 31 for uplink 30
15:43:29:setup_element:INFO: Setting the data phase to 31 for uplink 31
15:43:29:setup_element:INFO: Beginning SMX ASICs map scan
15:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:43:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:43:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:43:29:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:43:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:43:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:43:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:43:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:43:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:43:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:43:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:43:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:43:32:setup_element:INFO: Performing Elink synchronization
15:43:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:43:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:43:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:43:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:43:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:43:32:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:43:32:ST3_emu_feb:DEBUG: Chip address: 0x1
15:43:32:ST3_emu_feb:DEBUG: Chip address: 0x3
15:43:32:ST3_emu_feb:DEBUG: Chip address: 0x5
15:43:32:ST3_emu_feb:DEBUG: Chip address: 0x7
15:43:32:febtest:INFO: Init all SMX (CSA): 30
15:43:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:43:40:febtest:INFO: 30-01 | XA-000-08-002-003-007-021-00 | 63.2 | 1088.3
15:43:40:febtest:INFO: 28-03 | XA-000-08-002-003-007-021-00 | 60.0 | 1094.2
15:43:41:febtest:INFO: 26-05 | XA-000-09-004-003-012-007-15 | 34.6 | 1153.7
15:43:41:febtest:INFO: 24-07 | XA-000-08-002-003-007-021-00 | 56.8 | 1112.1
15:43:42:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:43:44:ST3_smx:INFO: chip: 30-1 63.173842 C 1094.240115 mV
15:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:44:ST3_smx:INFO: Electrons
15:43:44:ST3_smx:INFO: # loops 0
15:43:45:ST3_smx:INFO: # loops 1
15:43:47:ST3_smx:INFO: # loops 2
15:43:49:ST3_smx:INFO: Total # of broken channels: 0
15:43:49:ST3_smx:INFO: List of broken channels: []
15:43:49:ST3_smx:INFO: Total # of broken channels: 0
15:43:49:ST3_smx:INFO: List of broken channels: []
15:43:50:ST3_smx:INFO: chip: 28-3 59.984250 C 1100.211760 mV
15:43:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:50:ST3_smx:INFO: Electrons
15:43:50:ST3_smx:INFO: # loops 0
15:43:52:ST3_smx:INFO: # loops 1
15:43:54:ST3_smx:INFO: # loops 2
15:43:55:ST3_smx:INFO: Total # of broken channels: 0
15:43:55:ST3_smx:INFO: List of broken channels: []
15:43:55:ST3_smx:INFO: Total # of broken channels: 0
15:43:55:ST3_smx:INFO: List of broken channels: []
15:43:57:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV
15:43:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:43:57:ST3_smx:INFO: Electrons
15:43:57:ST3_smx:INFO: # loops 0
15:43:59:ST3_smx:INFO: # loops 1
15:44:00:ST3_smx:INFO: # loops 2
15:44:02:ST3_smx:INFO: Total # of broken channels: 1
15:44:02:ST3_smx:INFO: List of broken channels: [103]
15:44:02:ST3_smx:INFO: Total # of broken channels: 2
15:44:02:ST3_smx:INFO: List of broken channels: [92, 122]
15:44:04:ST3_smx:INFO: chip: 24-7 56.797143 C 1124.048640 mV
15:44:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:44:04:ST3_smx:INFO: Electrons
15:44:04:ST3_smx:INFO: # loops 0
15:44:05:ST3_smx:INFO: # loops 1
15:44:07:ST3_smx:INFO: # loops 2
15:44:09:ST3_smx:INFO: Total # of broken channels: 0
15:44:09:ST3_smx:INFO: List of broken channels: []
15:44:09:ST3_smx:INFO: Total # of broken channels: 0
15:44:09:ST3_smx:INFO: List of broken channels: []
15:44:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:44:09:febtest:INFO: 30-01 | XA-000-08-002-003-007-021-00 | 63.2 | 1118.1
15:44:09:febtest:INFO: 28-03 | XA-000-08-002-003-007-021-00 | 60.0 | 1124.0
15:44:10:febtest:INFO: 26-05 | XA-000-09-004-003-012-007-15 | 34.6 | 1183.3
15:44:10:febtest:INFO: 24-07 | XA-000-08-002-003-007-021-00 | 56.8 | 1141.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_17-15_43_21
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2237| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7980', '1.849', '0.8761']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0450', '1.850', '1.3000']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '0.2663']