FEB_2239    17.09.24 11:17:26

TextEdit.txt
            11:17:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:17:27:ST3_Shared:INFO:	                       FEB-Microcable                       
11:17:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:17:27:febtest:INFO:	Testing FEB with SN 2239
11:17:28:smx_tester:INFO:	Scanning setup
11:17:28:elinks:INFO:	Disabling clock on downlink 0
11:17:28:elinks:INFO:	Disabling clock on downlink 1
11:17:28:elinks:INFO:	Disabling clock on downlink 2
11:17:28:elinks:INFO:	Disabling clock on downlink 3
11:17:28:elinks:INFO:	Disabling clock on downlink 4
11:17:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:17:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:28:elinks:INFO:	Disabling clock on downlink 0
11:17:28:elinks:INFO:	Disabling clock on downlink 1
11:17:28:elinks:INFO:	Disabling clock on downlink 2
11:17:28:elinks:INFO:	Disabling clock on downlink 3
11:17:28:elinks:INFO:	Disabling clock on downlink 4
11:17:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:17:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:28:elinks:INFO:	Disabling clock on downlink 0
11:17:28:elinks:INFO:	Disabling clock on downlink 1
11:17:28:elinks:INFO:	Disabling clock on downlink 2
11:17:28:elinks:INFO:	Disabling clock on downlink 3
11:17:28:elinks:INFO:	Disabling clock on downlink 4
11:17:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:17:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:17:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:29:elinks:INFO:	Disabling clock on downlink 0
11:17:29:elinks:INFO:	Disabling clock on downlink 1
11:17:29:elinks:INFO:	Disabling clock on downlink 2
11:17:29:elinks:INFO:	Disabling clock on downlink 3
11:17:29:elinks:INFO:	Disabling clock on downlink 4
11:17:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:17:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:29:elinks:INFO:	Disabling clock on downlink 0
11:17:29:elinks:INFO:	Disabling clock on downlink 1
11:17:29:elinks:INFO:	Disabling clock on downlink 2
11:17:29:elinks:INFO:	Disabling clock on downlink 3
11:17:29:elinks:INFO:	Disabling clock on downlink 4
11:17:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:17:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:17:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:17:29:setup_element:INFO:	Scanning clock phase
11:17:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:17:29:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:17:29:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:17:29:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:17:29:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
11:17:29:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
11:17:29:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:17:29:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:17:29:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:17:29:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:17:29:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
11:17:29:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
11:17:29:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
11:17:29:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
11:17:30:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:17:30:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:17:30:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:17:30:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:17:30:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 2
11:17:30:setup_element:INFO:	Scanning data phases
11:17:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:17:35:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:17:35:setup_element:INFO:	Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
11:17:35:setup_element:INFO:	Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
11:17:35:setup_element:INFO:	Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
11:17:35:setup_element:INFO:	Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
11:17:35:setup_element:INFO:	Eye window for uplink 20: XXXXX___________________________________
Data delay found: 22
11:17:35:setup_element:INFO:	Eye window for uplink 21: XXXXX_________________________________XX
Data delay found: 21
11:17:35:setup_element:INFO:	Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
11:17:35:setup_element:INFO:	Eye window for uplink 23: XXXXXX______________________________XXXX
Data delay found: 20
11:17:35:setup_element:INFO:	Eye window for uplink 24: __XXXXXX________________________________
Data delay found: 24
11:17:35:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
11:17:35:setup_element:INFO:	Eye window for uplink 26: __XXXXXX________________________________
Data delay found: 24
11:17:35:setup_element:INFO:	Eye window for uplink 27: ______XXXXX_____________________________
Data delay found: 28
11:17:35:setup_element:INFO:	Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
11:17:35:setup_element:INFO:	Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
11:17:35:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
11:17:35:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
11:17:35:setup_element:INFO:	Setting the data phase to 21 for uplink 16
11:17:35:setup_element:INFO:	Setting the data phase to 19 for uplink 17
11:17:35:setup_element:INFO:	Setting the data phase to 20 for uplink 18
11:17:35:setup_element:INFO:	Setting the data phase to 18 for uplink 19
11:17:35:setup_element:INFO:	Setting the data phase to 22 for uplink 20
11:17:35:setup_element:INFO:	Setting the data phase to 21 for uplink 21
11:17:35:setup_element:INFO:	Setting the data phase to 20 for uplink 22
11:17:35:setup_element:INFO:	Setting the data phase to 20 for uplink 23
11:17:35:setup_element:INFO:	Setting the data phase to 24 for uplink 24
11:17:35:setup_element:INFO:	Setting the data phase to 26 for uplink 25
11:17:35:setup_element:INFO:	Setting the data phase to 24 for uplink 26
11:17:35:setup_element:INFO:	Setting the data phase to 28 for uplink 27
11:17:35:setup_element:INFO:	Setting the data phase to 32 for uplink 28
11:17:35:setup_element:INFO:	Setting the data phase to 34 for uplink 29
11:17:35:setup_element:INFO:	Setting the data phase to 38 for uplink 30
11:17:35:setup_element:INFO:	Setting the data phase to 38 for uplink 31
11:17:35:setup_element:INFO:	Beginning SMX ASICs map scan
11:17:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:17:35:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:17:35:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:17:35:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:17:35:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:17:35:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:17:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:17:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:17:36:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:17:36:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:17:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:17:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:17:36:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:17:36:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:17:36:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:17:36:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:17:37:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:17:37:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:17:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:17:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:17:38:setup_element:INFO:	Performing Elink synchronization
11:17:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:17:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:17:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:17:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:17:38:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:17:38:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x0
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x1
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x2
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x3
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x4
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x5
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x6
11:17:39:ST3_emu_feb:DEBUG:	Chip address:  	0x7
11:17:39:febtest:INFO:	Init all SMX (CSA): 30
11:17:54:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:17:54:febtest:INFO:	23-00 | XA-000-09-004-003-009-011-04 |  28.2 | 1141.9
11:17:55:febtest:INFO:	30-01 | XA-000-08-002-003-006-182-09 |  25.1 | 1159.7
11:17:55:febtest:INFO:	21-02 | XA-000-09-004-003-007-026-10 |  40.9 | 1106.2
11:17:55:febtest:INFO:	28-03 | XA-000-08-002-003-007-090-05 |  31.4 | 1135.9
11:17:55:febtest:INFO:	19-04 | XA-000-09-004-003-003-009-11 |  34.6 | 1124.0
11:17:55:febtest:INFO:	26-05 | XA-000-08-002-003-007-021-00 |  56.8 | 1076.3
11:17:56:febtest:INFO:	17-06 | XA-000-09-004-003-004-021-04 |  25.1 | 1159.7
11:17:56:febtest:INFO:	24-07 | XA-000-08-002-003-007-056-14 |  56.8 | 1070.3
11:17:57:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:17:59:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1153.732915 mV
11:17:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:17:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:17:59:ST3_smx:INFO:		Electrons
11:17:59:ST3_smx:INFO:	# loops 0
11:18:01:ST3_smx:INFO:	# loops 1
11:18:02:ST3_smx:INFO:	# loops 2
11:18:04:ST3_smx:INFO:	Total # of broken channels: 1
11:18:04:ST3_smx:INFO:	List of broken channels: [7]
11:18:04:ST3_smx:INFO:	Total # of broken channels: 1
11:18:04:ST3_smx:INFO:	List of broken channels: [7]
11:18:06:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1171.483840 mV
11:18:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:06:ST3_smx:INFO:		Electrons
11:18:06:ST3_smx:INFO:	# loops 0
11:18:08:ST3_smx:INFO:	# loops 1
11:18:09:ST3_smx:INFO:	# loops 2
11:18:11:ST3_smx:INFO:	Total # of broken channels: 0
11:18:11:ST3_smx:INFO:	List of broken channels: []
11:18:11:ST3_smx:INFO:	Total # of broken channels: 0
11:18:11:ST3_smx:INFO:	List of broken channels: []
11:18:13:ST3_smx:INFO:	chip: 21-2 	 40.898880 C 	 1112.140140 mV
11:18:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:13:ST3_smx:INFO:		Electrons
11:18:13:ST3_smx:INFO:	# loops 0
11:18:14:ST3_smx:INFO:	# loops 1
11:18:16:ST3_smx:INFO:	# loops 2
11:18:17:ST3_smx:INFO:	Total # of broken channels: 1
11:18:17:ST3_smx:INFO:	List of broken channels: [2]
11:18:17:ST3_smx:INFO:	Total # of broken channels: 43
11:18:17:ST3_smx:INFO:	List of broken channels: [4, 6, 8, 10, 12, 14, 18, 20, 24, 26, 28, 30, 32, 34, 36, 38, 44, 46, 48, 50, 56, 60, 62, 68, 70, 76, 86, 90, 92, 97, 99, 102, 104, 105, 106, 108, 110, 112, 114, 116, 118, 120, 122]
11:18:19:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1147.806000 mV
11:18:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:19:ST3_smx:INFO:		Electrons
11:18:19:ST3_smx:INFO:	# loops 0
11:18:21:ST3_smx:INFO:	# loops 1
11:18:23:ST3_smx:INFO:	# loops 2
11:18:24:ST3_smx:INFO:	Total # of broken channels: 0
11:18:24:ST3_smx:INFO:	List of broken channels: []
11:18:24:ST3_smx:INFO:	Total # of broken channels: 2
11:18:24:ST3_smx:INFO:	List of broken channels: [6, 8]
11:18:26:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1141.874115 mV
11:18:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:26:ST3_smx:INFO:		Electrons
11:18:26:ST3_smx:INFO:	# loops 0
11:18:28:ST3_smx:INFO:	# loops 1
11:18:29:ST3_smx:INFO:	# loops 2
11:18:31:ST3_smx:INFO:	Total # of broken channels: 1
11:18:31:ST3_smx:INFO:	List of broken channels: [0]
11:18:31:ST3_smx:INFO:	Total # of broken channels: 4
11:18:31:ST3_smx:INFO:	List of broken channels: [0, 14, 44, 93]
11:18:33:ST3_smx:INFO:	chip: 26-5 	 56.797143 C 	 1088.263500 mV
11:18:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:33:ST3_smx:INFO:		Electrons
11:18:33:ST3_smx:INFO:	# loops 0
11:18:34:ST3_smx:INFO:	# loops 1
11:18:36:ST3_smx:INFO:	# loops 2
11:18:37:ST3_smx:INFO:	Total # of broken channels: 0
11:18:37:ST3_smx:INFO:	List of broken channels: []
11:18:37:ST3_smx:INFO:	Total # of broken channels: 1
11:18:37:ST3_smx:INFO:	List of broken channels: [1]
11:18:39:ST3_smx:INFO:	chip: 17-6 	 28.225000 C 	 1171.483840 mV
11:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:39:ST3_smx:INFO:		Electrons
11:18:39:ST3_smx:INFO:	# loops 0
11:18:41:ST3_smx:INFO:	# loops 1
11:18:43:ST3_smx:INFO:	# loops 2
11:18:44:ST3_smx:INFO:	Total # of broken channels: 0
11:18:44:ST3_smx:INFO:	List of broken channels: []
11:18:44:ST3_smx:INFO:	Total # of broken channels: 1
11:18:44:ST3_smx:INFO:	List of broken channels: [8]
11:18:46:ST3_smx:INFO:	chip: 24-7 	 56.797143 C 	 1082.281915 mV
11:18:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:18:46:ST3_smx:INFO:		Electrons
11:18:46:ST3_smx:INFO:	# loops 0
11:18:48:ST3_smx:INFO:	# loops 1
11:18:49:ST3_smx:INFO:	# loops 2
11:18:51:ST3_smx:INFO:	Total # of broken channels: 0
11:18:51:ST3_smx:INFO:	List of broken channels: []
11:18:51:ST3_smx:INFO:	Total # of broken channels: 0
11:18:51:ST3_smx:INFO:	List of broken channels: []
11:18:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:18:51:febtest:INFO:	23-00 | XA-000-09-004-003-009-011-04 |  31.4 | 1177.4
11:18:52:febtest:INFO:	30-01 | XA-000-08-002-003-006-182-09 |  25.1 | 1195.1
11:18:52:febtest:INFO:	21-02 | XA-000-09-004-003-007-026-10 |  40.9 | 1135.9
11:18:52:febtest:INFO:	28-03 | XA-000-08-002-003-007-090-05 |  31.4 | 1171.5
11:18:52:febtest:INFO:	19-04 | XA-000-09-004-003-003-009-11 |  37.7 | 1159.7
11:18:53:febtest:INFO:	26-05 | XA-000-08-002-003-007-021-00 |  60.0 | 1106.2
11:18:53:febtest:INFO:	17-06 | XA-000-09-004-003-004-021-04 |  28.2 | 1189.2
11:18:53:febtest:INFO:	24-07 | XA-000-08-002-003-007-056-14 |  60.0 | 1100.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_17-11_17_26
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2239| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9450', '1.848', '2.3400']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0230', '1.850', '2.5220']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '0.5279']