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FEB_2240 25.09.24 09:04:54
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09:04:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:04:54:ST3_Shared:INFO: FEB-Sensor
09:04:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:04:56:ST3_ModuleSelector:INFO: M8UL4B2010222A2
09:04:56:ST3_ModuleSelector:INFO: 12184
09:04:56:febtest:INFO: Testing FEB with SN 2240
09:04:57:smx_tester:INFO: Scanning setup
09:04:57:elinks:INFO: Disabling clock on downlink 0
09:04:57:elinks:INFO: Disabling clock on downlink 1
09:04:57:elinks:INFO: Disabling clock on downlink 2
09:04:57:elinks:INFO: Disabling clock on downlink 3
09:04:57:elinks:INFO: Disabling clock on downlink 4
09:04:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:04:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:58:elinks:INFO: Disabling clock on downlink 0
09:04:58:elinks:INFO: Disabling clock on downlink 1
09:04:58:elinks:INFO: Disabling clock on downlink 2
09:04:58:elinks:INFO: Disabling clock on downlink 3
09:04:58:elinks:INFO: Disabling clock on downlink 4
09:04:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:04:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:58:elinks:INFO: Disabling clock on downlink 0
09:04:58:elinks:INFO: Disabling clock on downlink 1
09:04:58:elinks:INFO: Disabling clock on downlink 2
09:04:58:elinks:INFO: Disabling clock on downlink 3
09:04:58:elinks:INFO: Disabling clock on downlink 4
09:04:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:04:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:04:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:58:elinks:INFO: Disabling clock on downlink 0
09:04:58:elinks:INFO: Disabling clock on downlink 1
09:04:58:elinks:INFO: Disabling clock on downlink 2
09:04:58:elinks:INFO: Disabling clock on downlink 3
09:04:58:elinks:INFO: Disabling clock on downlink 4
09:04:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:04:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:58:elinks:INFO: Disabling clock on downlink 0
09:04:58:elinks:INFO: Disabling clock on downlink 1
09:04:58:elinks:INFO: Disabling clock on downlink 2
09:04:58:elinks:INFO: Disabling clock on downlink 3
09:04:58:elinks:INFO: Disabling clock on downlink 4
09:04:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:04:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:04:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:04:58:setup_element:INFO: Scanning clock phase
09:04:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:04:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:04:59:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:04:59:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 18: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 19: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:04:59:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:04:59:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:04:59:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:04:59:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
09:04:59:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
09:04:59:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:04:59:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:04:59:setup_element:INFO: Scanning data phases
09:04:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:04:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:05:04:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:05:04:setup_element:INFO: Eye window for uplink 16: _________________________________XXXX___
Data delay found: 14
09:05:04:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXX____
Data delay found: 13
09:05:04:setup_element:INFO: Eye window for uplink 18: _____________________XXXXXXXXXXXXXXXXXXX
Data delay found: 10
09:05:04:setup_element:INFO: Eye window for uplink 19: _____________________XXXXXXXXXXXXXXXXXXX
Data delay found: 10
09:05:04:setup_element:INFO: Eye window for uplink 20: XXXXXXXXXXX_____________________________
Data delay found: 25
09:05:04:setup_element:INFO: Eye window for uplink 21: XXXXXXXXXXX____________________________X
Data delay found: 24
09:05:04:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
09:05:04:setup_element:INFO: Eye window for uplink 23: XXXX___________________________XXXXXXXXX
Data delay found: 17
09:05:04:setup_element:INFO: Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
09:05:04:setup_element:INFO: Eye window for uplink 25: _____XXXXX______________________________
Data delay found: 27
09:05:04:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________
Data delay found: 27
09:05:04:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
09:05:04:setup_element:INFO: Eye window for uplink 28: _________XXXXX__________________________
Data delay found: 31
09:05:04:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
09:05:04:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________
Data delay found: 36
09:05:04:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
09:05:04:setup_element:INFO: Setting the data phase to 14 for uplink 16
09:05:04:setup_element:INFO: Setting the data phase to 13 for uplink 17
09:05:04:setup_element:INFO: Setting the data phase to 10 for uplink 18
09:05:04:setup_element:INFO: Setting the data phase to 10 for uplink 19
09:05:04:setup_element:INFO: Setting the data phase to 25 for uplink 20
09:05:04:setup_element:INFO: Setting the data phase to 24 for uplink 21
09:05:04:setup_element:INFO: Setting the data phase to 15 for uplink 22
09:05:04:setup_element:INFO: Setting the data phase to 17 for uplink 23
09:05:04:setup_element:INFO: Setting the data phase to 25 for uplink 24
09:05:04:setup_element:INFO: Setting the data phase to 27 for uplink 25
09:05:04:setup_element:INFO: Setting the data phase to 27 for uplink 26
09:05:04:setup_element:INFO: Setting the data phase to 31 for uplink 27
09:05:04:setup_element:INFO: Setting the data phase to 31 for uplink 28
09:05:04:setup_element:INFO: Setting the data phase to 33 for uplink 29
09:05:04:setup_element:INFO: Setting the data phase to 36 for uplink 30
09:05:04:setup_element:INFO: Setting the data phase to 36 for uplink 31
09:05:04:setup_element:INFO: Beginning SMX ASICs map scan
09:05:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:05:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:05:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:05:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:05:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:05:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:05:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:05:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:05:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:05:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:05:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:05:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:05:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:05:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:05:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:05:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:05:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:05:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:05:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:05:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:05:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:05:07:setup_element:INFO: Performing Elink synchronization
09:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:05:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:05:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:05:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:05:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:05:07:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:05:07:ST3_emu_feb:DEBUG: Chip address: 0x0
09:05:07:ST3_emu_feb:DEBUG: Chip address: 0x1
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x2
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x3
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x4
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x5
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x6
09:05:08:ST3_emu_feb:DEBUG: Chip address: 0x7
09:05:08:febtest:INFO: Init all SMX (CSA): 30
09:05:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:05:23:febtest:INFO: 23-00 | XA-000-08-002-003-007-094-05 | 44.1 | 1141.9
09:05:23:febtest:INFO: 30-01 | XA-000-08-002-003-007-104-12 | 44.1 | 1124.0
09:05:23:febtest:INFO: 21-02 | XA-000-09-004-003-018-019-13 | 15.6 | 1218.6
09:05:23:febtest:INFO: 28-03 | XA-000-08-002-003-007-101-12 | 31.4 | 1165.6
09:05:23:febtest:INFO: 19-04 | XA-000-08-002-003-007-099-12 | 40.9 | 1147.8
09:05:24:febtest:INFO: 26-05 | XA-000-08-002-003-007-102-12 | 34.6 | 1159.7
09:05:24:febtest:INFO: 17-06 | XA-000-08-002-003-007-098-12 | 31.4 | 1183.3
09:05:24:febtest:INFO: 24-07 | XA-000-08-002-003-007-097-12 | 50.4 | 1100.2
09:05:25:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:05:27:ST3_smx:INFO: chip: 23-0 44.073563 C 1153.732915 mV
09:05:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:27:ST3_smx:INFO: Electrons
09:05:27:ST3_smx:INFO: # loops 0
09:05:29:ST3_smx:INFO: # loops 1
09:05:30:ST3_smx:INFO: # loops 2
09:05:32:ST3_smx:INFO: # loops 3
09:05:33:ST3_smx:INFO: # loops 4
09:05:35:ST3_smx:INFO: Total # of broken channels: 0
09:05:35:ST3_smx:INFO: List of broken channels: []
09:05:35:ST3_smx:INFO: Total # of broken channels: 0
09:05:35:ST3_smx:INFO: List of broken channels: []
09:05:37:ST3_smx:INFO: chip: 30-1 44.073563 C 1129.995435 mV
09:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:37:ST3_smx:INFO: Electrons
09:05:37:ST3_smx:INFO: # loops 0
09:05:38:ST3_smx:INFO: # loops 1
09:05:40:ST3_smx:INFO: # loops 2
09:05:42:ST3_smx:INFO: # loops 3
09:05:43:ST3_smx:INFO: # loops 4
09:05:45:ST3_smx:INFO: Total # of broken channels: 0
09:05:45:ST3_smx:INFO: List of broken channels: []
09:05:45:ST3_smx:INFO: Total # of broken channels: 0
09:05:45:ST3_smx:INFO: List of broken channels: []
09:05:47:ST3_smx:INFO: chip: 21-2 12.438562 C 1236.187875 mV
09:05:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:47:ST3_smx:INFO: Electrons
09:05:47:ST3_smx:INFO: # loops 0
09:05:48:ST3_smx:INFO: # loops 1
09:05:50:ST3_smx:INFO: # loops 2
09:05:51:ST3_smx:INFO: # loops 3
09:05:53:ST3_smx:INFO: # loops 4
09:05:55:ST3_smx:INFO: Total # of broken channels: 0
09:05:55:ST3_smx:INFO: List of broken channels: []
09:05:55:ST3_smx:INFO: Total # of broken channels: 10
09:05:55:ST3_smx:INFO: List of broken channels: [0, 2, 6, 8, 24, 30, 34, 70, 84, 106]
09:05:57:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV
09:05:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:57:ST3_smx:INFO: Electrons
09:05:57:ST3_smx:INFO: # loops 0
09:05:58:ST3_smx:INFO: # loops 1
09:06:00:ST3_smx:INFO: # loops 2
09:06:01:ST3_smx:INFO: # loops 3
09:06:03:ST3_smx:INFO: # loops 4
09:06:04:ST3_smx:INFO: Total # of broken channels: 0
09:06:04:ST3_smx:INFO: List of broken channels: []
09:06:04:ST3_smx:INFO: Total # of broken channels: 10
09:06:04:ST3_smx:INFO: List of broken channels: [102, 104, 106, 108, 116, 118, 120, 121, 123, 124]
09:06:06:ST3_smx:INFO: chip: 19-4 44.073563 C 1153.732915 mV
09:06:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:06:ST3_smx:INFO: Electrons
09:06:06:ST3_smx:INFO: # loops 0
09:06:08:ST3_smx:INFO: # loops 1
09:06:09:ST3_smx:INFO: # loops 2
09:06:11:ST3_smx:INFO: # loops 3
09:06:13:ST3_smx:INFO: # loops 4
09:06:14:ST3_smx:INFO: Total # of broken channels: 0
09:06:14:ST3_smx:INFO: List of broken channels: []
09:06:14:ST3_smx:INFO: Total # of broken channels: 0
09:06:14:ST3_smx:INFO: List of broken channels: []
09:06:16:ST3_smx:INFO: chip: 26-5 31.389742 C 1177.390875 mV
09:06:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:16:ST3_smx:INFO: Electrons
09:06:16:ST3_smx:INFO: # loops 0
09:06:18:ST3_smx:INFO: # loops 1
09:06:19:ST3_smx:INFO: # loops 2
09:06:21:ST3_smx:INFO: # loops 3
09:06:22:ST3_smx:INFO: # loops 4
09:06:24:ST3_smx:INFO: Total # of broken channels: 0
09:06:24:ST3_smx:INFO: List of broken channels: []
09:06:24:ST3_smx:INFO: Total # of broken channels: 0
09:06:24:ST3_smx:INFO: List of broken channels: []
09:06:26:ST3_smx:INFO: chip: 17-6 34.556970 C 1195.082160 mV
09:06:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:26:ST3_smx:INFO: Electrons
09:06:26:ST3_smx:INFO: # loops 0
09:06:27:ST3_smx:INFO: # loops 1
09:06:29:ST3_smx:INFO: # loops 2
09:06:30:ST3_smx:INFO: # loops 3
09:06:32:ST3_smx:INFO: # loops 4
09:06:34:ST3_smx:INFO: Total # of broken channels: 0
09:06:34:ST3_smx:INFO: List of broken channels: []
09:06:34:ST3_smx:INFO: Total # of broken channels: 3
09:06:34:ST3_smx:INFO: List of broken channels: [7, 115, 117]
09:06:35:ST3_smx:INFO: chip: 24-7 53.612520 C 1106.178435 mV
09:06:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:35:ST3_smx:INFO: Electrons
09:06:35:ST3_smx:INFO: # loops 0
09:06:37:ST3_smx:INFO: # loops 1
09:06:39:ST3_smx:INFO: # loops 2
09:06:40:ST3_smx:INFO: # loops 3
09:06:42:ST3_smx:INFO: # loops 4
09:06:43:ST3_smx:INFO: Total # of broken channels: 0
09:06:43:ST3_smx:INFO: List of broken channels: []
09:06:43:ST3_smx:INFO: Total # of broken channels: 0
09:06:43:ST3_smx:INFO: List of broken channels: []
09:06:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:06:44:febtest:INFO: 23-00 | XA-000-08-002-003-007-094-05 | 44.1 | 1177.4
09:06:44:febtest:INFO: 30-01 | XA-000-08-002-003-007-104-12 | 47.3 | 1153.7
09:06:44:febtest:INFO: 21-02 | XA-000-09-004-003-018-019-13 | 15.6 | 1253.7
09:06:45:febtest:INFO: 28-03 | XA-000-08-002-003-007-101-12 | 34.6 | 1201.0
09:06:45:febtest:INFO: 19-04 | XA-000-08-002-003-007-099-12 | 44.1 | 1171.5
09:06:45:febtest:INFO: 26-05 | XA-000-08-002-003-007-102-12 | 37.7 | 1183.3
09:06:45:febtest:INFO: 17-06 | XA-000-08-002-003-007-098-12 | 34.6 | 1212.7
09:06:45:febtest:INFO: 24-07 | XA-000-08-002-003-007-097-12 | 53.6 | 1124.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_25-09_04_54
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2240| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 12184 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL4B2010222A2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9340', '1.848', '1.9380']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0600', '1.850', '2.5890']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.5268']