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FEB_2242 19.09.24 08:21:57
Info
08:21:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:21:57:ST3_Shared:INFO: FEB-Sensor
08:21:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:24:34:ST3_ModuleSelector:INFO: M8UL0T1010601B2
08:24:34:ST3_ModuleSelector:INFO: 11254
08:24:34:febtest:INFO: Testing FEB with SN 2242
08:24:36:smx_tester:INFO: Scanning setup
08:24:36:elinks:INFO: Disabling clock on downlink 0
08:24:36:elinks:INFO: Disabling clock on downlink 1
08:24:36:elinks:INFO: Disabling clock on downlink 2
08:24:36:elinks:INFO: Disabling clock on downlink 3
08:24:36:elinks:INFO: Disabling clock on downlink 4
08:24:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:24:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:24:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:24:36:elinks:INFO: Disabling clock on downlink 0
08:24:36:elinks:INFO: Disabling clock on downlink 1
08:24:36:elinks:INFO: Disabling clock on downlink 2
08:24:36:elinks:INFO: Disabling clock on downlink 3
08:24:36:elinks:INFO: Disabling clock on downlink 4
08:24:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:24:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:24:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:24:36:elinks:INFO: Disabling clock on downlink 0
08:24:36:elinks:INFO: Disabling clock on downlink 1
08:24:36:elinks:INFO: Disabling clock on downlink 2
08:24:36:elinks:INFO: Disabling clock on downlink 3
08:24:36:elinks:INFO: Disabling clock on downlink 4
08:24:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:24:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:24:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:24:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:24:36:elinks:INFO: Disabling clock on downlink 0
08:24:36:elinks:INFO: Disabling clock on downlink 1
08:24:36:elinks:INFO: Disabling clock on downlink 2
08:24:36:elinks:INFO: Disabling clock on downlink 3
08:24:36:elinks:INFO: Disabling clock on downlink 4
08:24:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:24:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:24:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:24:36:elinks:INFO: Disabling clock on downlink 0
08:24:36:elinks:INFO: Disabling clock on downlink 1
08:24:36:elinks:INFO: Disabling clock on downlink 2
08:24:36:elinks:INFO: Disabling clock on downlink 3
08:24:36:elinks:INFO: Disabling clock on downlink 4
08:24:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:24:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:24:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:24:37:setup_element:INFO: Scanning clock phase
08:24:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:24:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:24:37:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:24:37:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:24:37:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:24:37:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
08:24:37:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
08:24:37:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
08:24:37:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
08:24:37:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:24:37:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:24:37:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:24:37:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:24:37:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:24:37:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
08:24:37:setup_element:INFO: Scanning data phases
08:24:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:24:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:24:43:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:24:43:setup_element:INFO: Eye window for uplink 16: _XXXXXX_________________________________
Data delay found: 23
08:24:43:setup_element:INFO: Eye window for uplink 17: XXXXX_________________________________XX
Data delay found: 21
08:24:43:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
08:24:43:setup_element:INFO: Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
08:24:43:setup_element:INFO: Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
08:24:43:setup_element:INFO: Eye window for uplink 21: XX_________________________________XXXXX
Data delay found: 18
08:24:43:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
08:24:43:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
08:24:43:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
08:24:43:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
08:24:43:setup_element:INFO: Eye window for uplink 26: __________XXXXXX_____________________XXX
Data delay found: 26
08:24:43:setup_element:INFO: Eye window for uplink 27: ______________XXXXX__________________XXX
Data delay found: 27
08:24:43:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
08:24:43:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
08:24:43:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
08:24:43:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
08:24:43:setup_element:INFO: Setting the data phase to 23 for uplink 16
08:24:43:setup_element:INFO: Setting the data phase to 21 for uplink 17
08:24:43:setup_element:INFO: Setting the data phase to 21 for uplink 18
08:24:43:setup_element:INFO: Setting the data phase to 19 for uplink 19
08:24:43:setup_element:INFO: Setting the data phase to 19 for uplink 20
08:24:43:setup_element:INFO: Setting the data phase to 18 for uplink 21
08:24:43:setup_element:INFO: Setting the data phase to 20 for uplink 22
08:24:43:setup_element:INFO: Setting the data phase to 21 for uplink 23
08:24:43:setup_element:INFO: Setting the data phase to 30 for uplink 24
08:24:43:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:24:43:setup_element:INFO: Setting the data phase to 26 for uplink 26
08:24:43:setup_element:INFO: Setting the data phase to 27 for uplink 27
08:24:43:setup_element:INFO: Setting the data phase to 37 for uplink 28
08:24:43:setup_element:INFO: Setting the data phase to 39 for uplink 29
08:24:43:setup_element:INFO: Setting the data phase to 37 for uplink 30
08:24:43:setup_element:INFO: Setting the data phase to 38 for uplink 31
08:24:43:setup_element:INFO: Beginning SMX ASICs map scan
08:24:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:24:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:24:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:24:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:24:43:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:24:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:24:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:24:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:24:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:24:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:24:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:24:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:24:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:24:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:24:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:24:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:24:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:24:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:24:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:24:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:24:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:24:45:setup_element:INFO: Performing Elink synchronization
08:24:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:24:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:24:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:24:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:24:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:24:46:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x0
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x1
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x2
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x3
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x4
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x5
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x6
08:24:46:ST3_emu_feb:DEBUG: Chip address: 0x7
08:24:46:febtest:INFO: Init all SMX (CSA): 30
08:25:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:25:02:febtest:INFO: 23-00 | XA-000-09-004-003-016-006-09 | 25.1 | 1153.7
08:25:02:febtest:INFO: 30-01 | XA-000-09-004-003-012-003-15 | 28.2 | 1147.8
08:25:02:febtest:INFO: 21-02 | XA-000-09-004-003-012-002-15 | 40.9 | 1106.2
08:25:02:febtest:INFO: 28-03 | XA-000-09-004-003-014-004-12 | 31.4 | 1130.0
08:25:02:febtest:INFO: 19-04 | XA-000-09-004-003-015-005-01 | 34.6 | 1130.0
08:25:03:febtest:INFO: 26-05 | XA-000-09-004-003-015-004-01 | 28.2 | 1141.9
08:25:03:febtest:INFO: 17-06 | XA-000-08-002-003-007-150-10 | 37.7 | 1124.0
08:25:03:febtest:INFO: 24-07 | XA-000-09-004-003-011-002-07 | 44.1 | 1094.2
08:25:04:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:25:06:ST3_smx:INFO: chip: 23-0 25.062742 C 1165.571835 mV
08:25:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:06:ST3_smx:INFO: Electrons
08:25:06:ST3_smx:INFO: # loops 0
08:25:08:ST3_smx:INFO: # loops 1
08:25:10:ST3_smx:INFO: # loops 2
08:25:11:ST3_smx:INFO: # loops 3
08:25:13:ST3_smx:INFO: # loops 4
08:25:15:ST3_smx:INFO: Total # of broken channels: 0
08:25:15:ST3_smx:INFO: List of broken channels: []
08:25:15:ST3_smx:INFO: Total # of broken channels: 2
08:25:15:ST3_smx:INFO: List of broken channels: [55, 57]
08:25:17:ST3_smx:INFO: chip: 30-1 28.225000 C 1165.571835 mV
08:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:17:ST3_smx:INFO: Electrons
08:25:17:ST3_smx:INFO: # loops 0
08:25:18:ST3_smx:INFO: # loops 1
08:25:20:ST3_smx:INFO: # loops 2
08:25:22:ST3_smx:INFO: # loops 3
08:25:23:ST3_smx:INFO: # loops 4
08:25:25:ST3_smx:INFO: Total # of broken channels: 0
08:25:25:ST3_smx:INFO: List of broken channels: []
08:25:25:ST3_smx:INFO: Total # of broken channels: 0
08:25:25:ST3_smx:INFO: List of broken channels: []
08:25:27:ST3_smx:INFO: chip: 21-2 40.898880 C 1112.140140 mV
08:25:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:27:ST3_smx:INFO: Electrons
08:25:27:ST3_smx:INFO: # loops 0
08:25:29:ST3_smx:INFO: # loops 1
08:25:30:ST3_smx:INFO: # loops 2
08:25:32:ST3_smx:INFO: # loops 3
08:25:34:ST3_smx:INFO: # loops 4
08:25:36:ST3_smx:INFO: Total # of broken channels: 0
08:25:36:ST3_smx:INFO: List of broken channels: []
08:25:36:ST3_smx:INFO: Total # of broken channels: 0
08:25:36:ST3_smx:INFO: List of broken channels: []
08:25:37:ST3_smx:INFO: chip: 28-3 31.389742 C 1141.874115 mV
08:25:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:37:ST3_smx:INFO: Electrons
08:25:37:ST3_smx:INFO: # loops 0
08:25:39:ST3_smx:INFO: # loops 1
08:25:41:ST3_smx:INFO: # loops 2
08:25:42:ST3_smx:INFO: # loops 3
08:25:44:ST3_smx:INFO: # loops 4
08:25:46:ST3_smx:INFO: Total # of broken channels: 0
08:25:46:ST3_smx:INFO: List of broken channels: []
08:25:46:ST3_smx:INFO: Total # of broken channels: 0
08:25:46:ST3_smx:INFO: List of broken channels: []
08:25:48:ST3_smx:INFO: chip: 19-4 34.556970 C 1141.874115 mV
08:25:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:48:ST3_smx:INFO: Electrons
08:25:48:ST3_smx:INFO: # loops 0
08:25:49:ST3_smx:INFO: # loops 1
08:25:51:ST3_smx:INFO: # loops 2
08:25:53:ST3_smx:INFO: # loops 3
08:25:55:ST3_smx:INFO: # loops 4
08:25:56:ST3_smx:INFO: Total # of broken channels: 0
08:25:56:ST3_smx:INFO: List of broken channels: []
08:25:56:ST3_smx:INFO: Total # of broken channels: 0
08:25:56:ST3_smx:INFO: List of broken channels: []
08:25:58:ST3_smx:INFO: chip: 26-5 31.389742 C 1147.806000 mV
08:25:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:25:58:ST3_smx:INFO: Electrons
08:25:58:ST3_smx:INFO: # loops 0
08:26:00:ST3_smx:INFO: # loops 1
08:26:01:ST3_smx:INFO: # loops 2
08:26:03:ST3_smx:INFO: # loops 3
08:26:05:ST3_smx:INFO: # loops 4
08:26:07:ST3_smx:INFO: Total # of broken channels: 0
08:26:07:ST3_smx:INFO: List of broken channels: []
08:26:07:ST3_smx:INFO: Total # of broken channels: 0
08:26:07:ST3_smx:INFO: List of broken channels: []
08:26:08:ST3_smx:INFO: chip: 17-6 40.898880 C 1129.995435 mV
08:26:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:26:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:26:08:ST3_smx:INFO: Electrons
08:26:08:ST3_smx:INFO: # loops 0
08:26:10:ST3_smx:INFO: # loops 1
08:26:12:ST3_smx:INFO: # loops 2
08:26:13:ST3_smx:INFO: # loops 3
08:26:15:ST3_smx:INFO: # loops 4
08:26:17:ST3_smx:INFO: Total # of broken channels: 0
08:26:17:ST3_smx:INFO: List of broken channels: []
08:26:17:ST3_smx:INFO: Total # of broken channels: 0
08:26:17:ST3_smx:INFO: List of broken channels: []
08:26:19:ST3_smx:INFO: chip: 24-7 47.250730 C 1100.211760 mV
08:26:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:26:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:26:19:ST3_smx:INFO: Electrons
08:26:19:ST3_smx:INFO: # loops 0
08:26:20:ST3_smx:INFO: # loops 1
08:26:22:ST3_smx:INFO: # loops 2
08:26:24:ST3_smx:INFO: # loops 3
08:26:25:ST3_smx:INFO: # loops 4
08:26:27:ST3_smx:INFO: Total # of broken channels: 0
08:26:27:ST3_smx:INFO: List of broken channels: []
08:26:27:ST3_smx:INFO: Total # of broken channels: 0
08:26:27:ST3_smx:INFO: List of broken channels: []
08:26:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:26:28:febtest:INFO: 23-00 | XA-000-09-004-003-016-006-09 | 28.2 | 1183.3
08:26:28:febtest:INFO: 30-01 | XA-000-09-004-003-012-003-15 | 28.2 | 1183.3
08:26:28:febtest:INFO: 21-02 | XA-000-09-004-003-012-002-15 | 44.1 | 1135.9
08:26:28:febtest:INFO: 28-03 | XA-000-09-004-003-014-004-12 | 34.6 | 1159.7
08:26:28:febtest:INFO: 19-04 | XA-000-09-004-003-015-005-01 | 37.7 | 1159.7
08:26:29:febtest:INFO: 26-05 | XA-000-09-004-003-015-004-01 | 31.4 | 1171.5
08:26:29:febtest:INFO: 17-06 | XA-000-08-002-003-007-150-10 | 40.9 | 1147.8
08:26:29:febtest:INFO: 24-07 | XA-000-09-004-003-011-002-07 | 47.3 | 1118.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_19-08_21_57
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2242| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 11254 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL0T1010601B2
LADDER_NAME: L8UL001060
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8430', '1.848', '2.0090']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0280', '1.850', '2.6070']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.850', '0.5181']