FEB_2242 10.09.24 13:54:30
Info
13:54:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:54:30:ST3_Shared:INFO: FEB-Microcable
13:54:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:54:30:febtest:INFO: Testing FEB with SN 2242
13:54:32:smx_tester:INFO: Scanning setup
13:54:32:elinks:INFO: Disabling clock on downlink 0
13:54:32:elinks:INFO: Disabling clock on downlink 1
13:54:32:elinks:INFO: Disabling clock on downlink 2
13:54:32:elinks:INFO: Disabling clock on downlink 3
13:54:32:elinks:INFO: Disabling clock on downlink 4
13:54:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:54:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:32:elinks:INFO: Disabling clock on downlink 0
13:54:32:elinks:INFO: Disabling clock on downlink 1
13:54:32:elinks:INFO: Disabling clock on downlink 2
13:54:32:elinks:INFO: Disabling clock on downlink 3
13:54:32:elinks:INFO: Disabling clock on downlink 4
13:54:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:54:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:32:elinks:INFO: Disabling clock on downlink 0
13:54:32:elinks:INFO: Disabling clock on downlink 1
13:54:32:elinks:INFO: Disabling clock on downlink 2
13:54:32:elinks:INFO: Disabling clock on downlink 3
13:54:32:elinks:INFO: Disabling clock on downlink 4
13:54:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:54:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:54:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:32:elinks:INFO: Disabling clock on downlink 0
13:54:32:elinks:INFO: Disabling clock on downlink 1
13:54:32:elinks:INFO: Disabling clock on downlink 2
13:54:32:elinks:INFO: Disabling clock on downlink 3
13:54:32:elinks:INFO: Disabling clock on downlink 4
13:54:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:32:elinks:INFO: Disabling clock on downlink 0
13:54:33:elinks:INFO: Disabling clock on downlink 1
13:54:33:elinks:INFO: Disabling clock on downlink 2
13:54:33:elinks:INFO: Disabling clock on downlink 3
13:54:33:elinks:INFO: Disabling clock on downlink 4
13:54:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:54:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:33:setup_element:INFO: Scanning clock phase
13:54:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:54:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:54:33:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:54:33:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:54:33:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:54:33:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:54:33:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:54:33:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:54:33:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:54:33:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:54:33:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
13:54:33:setup_element:INFO: Scanning data phases
13:54:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:54:38:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:54:38:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
13:54:38:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
13:54:38:setup_element:INFO: Eye window for uplink 26: ___________XXXXX_______________________X
Data delay found: 27
13:54:38:setup_element:INFO: Eye window for uplink 27: ______________XXXXXX___________________X
Data delay found: 29
13:54:38:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
13:54:38:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
13:54:38:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
13:54:38:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
13:54:38:setup_element:INFO: Setting the data phase to 31 for uplink 24
13:54:38:setup_element:INFO: Setting the data phase to 33 for uplink 25
13:54:38:setup_element:INFO: Setting the data phase to 27 for uplink 26
13:54:38:setup_element:INFO: Setting the data phase to 29 for uplink 27
13:54:38:setup_element:INFO: Setting the data phase to 37 for uplink 28
13:54:38:setup_element:INFO: Setting the data phase to 0 for uplink 29
13:54:38:setup_element:INFO: Setting the data phase to 36 for uplink 30
13:54:38:setup_element:INFO: Setting the data phase to 37 for uplink 31
13:54:38:setup_element:INFO: Beginning SMX ASICs map scan
13:54:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:54:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:54:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:54:38:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:54:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:54:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:54:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:54:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:54:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:54:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:54:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:54:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:54:41:setup_element:INFO: Performing Elink synchronization
13:54:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:54:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:54:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:54:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:54:41:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:54:42:ST3_emu_feb:DEBUG: Chip address: 0x1
13:54:42:ST3_emu_feb:DEBUG: Chip address: 0x3
13:54:42:ST3_emu_feb:DEBUG: Chip address: 0x5
13:54:42:ST3_emu_feb:DEBUG: Chip address: 0x7
13:54:42:febtest:INFO: Init all SMX (CSA): 30
13:54:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:54:49:febtest:INFO: 30-01 | XA-000-09-004-003-012-003-15 | 34.6 | 1147.8
13:54:49:febtest:INFO: 28-03 | XA-000-09-004-003-014-004-12 | 40.9 | 1124.0
13:54:50:febtest:INFO: 26-05 | XA-000-09-004-003-015-004-01 | 34.6 | 1141.9
13:54:50:febtest:INFO: 24-07 | XA-000-09-004-003-011-002-07 | 47.3 | 1094.2
13:54:51:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:54:53:ST3_smx:INFO: chip: 30-1 34.556970 C 1159.654860 mV
13:54:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:54:53:ST3_smx:INFO: Electrons
13:54:53:ST3_smx:INFO: # loops 0
13:54:55:ST3_smx:INFO: # loops 1
13:54:56:ST3_smx:INFO: # loops 2
13:54:58:ST3_smx:INFO: Total # of broken channels: 0
13:54:58:ST3_smx:INFO: List of broken channels: []
13:54:58:ST3_smx:INFO: Total # of broken channels: 0
13:54:58:ST3_smx:INFO: List of broken channels: []
13:55:00:ST3_smx:INFO: chip: 28-3 40.898880 C 1135.937260 mV
13:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:00:ST3_smx:INFO: Electrons
13:55:00:ST3_smx:INFO: # loops 0
13:55:01:ST3_smx:INFO: # loops 1
13:55:03:ST3_smx:INFO: # loops 2
13:55:05:ST3_smx:INFO: Total # of broken channels: 0
13:55:05:ST3_smx:INFO: List of broken channels: []
13:55:05:ST3_smx:INFO: Total # of broken channels: 0
13:55:05:ST3_smx:INFO: List of broken channels: []
13:55:06:ST3_smx:INFO: chip: 26-5 34.556970 C 1153.732915 mV
13:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:06:ST3_smx:INFO: Electrons
13:55:06:ST3_smx:INFO: # loops 0
13:55:08:ST3_smx:INFO: # loops 1
13:55:10:ST3_smx:INFO: # loops 2
13:55:11:ST3_smx:INFO: Total # of broken channels: 0
13:55:11:ST3_smx:INFO: List of broken channels: []
13:55:11:ST3_smx:INFO: Total # of broken channels: 0
13:55:11:ST3_smx:INFO: List of broken channels: []
13:55:13:ST3_smx:INFO: chip: 24-7 50.430383 C 1100.211760 mV
13:55:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:13:ST3_smx:INFO: Electrons
13:55:13:ST3_smx:INFO: # loops 0
13:55:15:ST3_smx:INFO: # loops 1
13:55:16:ST3_smx:INFO: # loops 2
13:55:18:ST3_smx:INFO: Total # of broken channels: 0
13:55:18:ST3_smx:INFO: List of broken channels: []
13:55:18:ST3_smx:INFO: Total # of broken channels: 0
13:55:18:ST3_smx:INFO: List of broken channels: []
13:55:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:19:febtest:INFO: 30-01 | XA-000-09-004-003-012-003-15 | 34.6 | 1177.4
13:55:19:febtest:INFO: 28-03 | XA-000-09-004-003-014-004-12 | 40.9 | 1153.7
13:55:19:febtest:INFO: 26-05 | XA-000-09-004-003-015-004-01 | 34.6 | 1171.5
13:55:19:febtest:INFO: 24-07 | XA-000-09-004-003-011-002-07 | 50.4 | 1118.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_10-13_54_30
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2242| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7429', '1.848', '1.0310']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0150', '1.850', '1.2710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9959', '1.850', '0.2655']