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FEB_2243 30.09.24 09:23:54
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09:23:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:23:54:ST3_Shared:INFO: FEB-Sensor
09:23:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:11:ST3_ModuleSelector:INFO: M8UL4T3010223B2
09:24:11:ST3_ModuleSelector:INFO: 19044
09:24:11:febtest:INFO: Testing FEB with SN 2243
09:24:13:smx_tester:INFO: Scanning setup
09:24:13:elinks:INFO: Disabling clock on downlink 0
09:24:13:elinks:INFO: Disabling clock on downlink 1
09:24:13:elinks:INFO: Disabling clock on downlink 2
09:24:13:elinks:INFO: Disabling clock on downlink 3
09:24:13:elinks:INFO: Disabling clock on downlink 4
09:24:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:13:elinks:INFO: Disabling clock on downlink 0
09:24:13:elinks:INFO: Disabling clock on downlink 1
09:24:13:elinks:INFO: Disabling clock on downlink 2
09:24:13:elinks:INFO: Disabling clock on downlink 3
09:24:13:elinks:INFO: Disabling clock on downlink 4
09:24:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:13:elinks:INFO: Disabling clock on downlink 0
09:24:13:elinks:INFO: Disabling clock on downlink 1
09:24:13:elinks:INFO: Disabling clock on downlink 2
09:24:13:elinks:INFO: Disabling clock on downlink 3
09:24:13:elinks:INFO: Disabling clock on downlink 4
09:24:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:24:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:24:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:14:elinks:INFO: Disabling clock on downlink 0
09:24:14:elinks:INFO: Disabling clock on downlink 1
09:24:14:elinks:INFO: Disabling clock on downlink 2
09:24:14:elinks:INFO: Disabling clock on downlink 3
09:24:14:elinks:INFO: Disabling clock on downlink 4
09:24:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:24:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:14:elinks:INFO: Disabling clock on downlink 0
09:24:14:elinks:INFO: Disabling clock on downlink 1
09:24:14:elinks:INFO: Disabling clock on downlink 2
09:24:14:elinks:INFO: Disabling clock on downlink 3
09:24:14:elinks:INFO: Disabling clock on downlink 4
09:24:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:24:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:14:setup_element:INFO: Scanning clock phase
09:24:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:24:14:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:24:14:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:24:14:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:24:14:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:24:14:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:24:14:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:24:14:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:24:14:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:24:14:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:24:14:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________________XXXX_
Clock Delay: 36
09:24:14:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________________XXXX_
Clock Delay: 36
09:24:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
09:24:14:setup_element:INFO: Scanning data phases
09:24:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:24:20:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
09:24:20:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
09:24:20:setup_element:INFO: Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
09:24:20:setup_element:INFO: Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
09:24:20:setup_element:INFO: Eye window for uplink 20: XXXX__________________________________XX
Data delay found: 20
09:24:20:setup_element:INFO: Eye window for uplink 21: XX___________________________________XXX
Data delay found: 19
09:24:20:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
09:24:20:setup_element:INFO: Eye window for uplink 23: XXXXXX_____________________________XXXXX
Data delay found: 20
09:24:20:setup_element:INFO: Eye window for uplink 24: __________XXXXXXX_______________________
Data delay found: 33
09:24:20:setup_element:INFO: Eye window for uplink 25: _____________XXXXXX_____________________
Data delay found: 35
09:24:20:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
09:24:20:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
09:24:20:setup_element:INFO: Eye window for uplink 28: ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
09:24:20:setup_element:INFO: Eye window for uplink 29: ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
09:24:20:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
09:24:20:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
09:24:20:setup_element:INFO: Setting the data phase to 18 for uplink 16
09:24:20:setup_element:INFO: Setting the data phase to 16 for uplink 17
09:24:20:setup_element:INFO: Setting the data phase to 19 for uplink 18
09:24:20:setup_element:INFO: Setting the data phase to 18 for uplink 19
09:24:20:setup_element:INFO: Setting the data phase to 20 for uplink 20
09:24:20:setup_element:INFO: Setting the data phase to 19 for uplink 21
09:24:20:setup_element:INFO: Setting the data phase to 19 for uplink 22
09:24:20:setup_element:INFO: Setting the data phase to 20 for uplink 23
09:24:20:setup_element:INFO: Setting the data phase to 33 for uplink 24
09:24:20:setup_element:INFO: Setting the data phase to 35 for uplink 25
09:24:20:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:24:20:setup_element:INFO: Setting the data phase to 32 for uplink 27
09:24:20:setup_element:INFO: Setting the data phase to 1 for uplink 28
09:24:20:setup_element:INFO: Setting the data phase to 1 for uplink 29
09:24:20:setup_element:INFO: Setting the data phase to 1 for uplink 30
09:24:20:setup_element:INFO: Setting the data phase to 1 for uplink 31
09:24:20:setup_element:INFO: Beginning SMX ASICs map scan
09:24:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:24:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:24:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:24:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:24:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:24:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:24:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:24:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:24:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:24:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:24:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:24:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:24:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:24:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:24:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:24:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:24:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:24:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:24:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:24:23:setup_element:INFO: Performing Elink synchronization
09:24:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:24:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:24:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:24:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x0
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x1
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x2
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x3
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x4
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x5
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x6
09:24:24:ST3_emu_feb:DEBUG: Chip address: 0x7
09:24:24:febtest:INFO: Init all SMX (CSA): 30
09:24:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:24:38:febtest:INFO: 23-00 | XA-000-09-004-003-008-023-14 | 25.1 | 1171.5
09:24:38:febtest:INFO: 30-01 | XA-000-08-002-003-007-151-10 | 15.6 | 1195.1
09:24:38:febtest:INFO: 21-02 | XA-000-09-004-003-008-026-14 | 25.1 | 1177.4
09:24:39:febtest:INFO: 28-03 | XA-000-09-004-003-009-025-03 | 34.6 | 1147.8
09:24:39:febtest:INFO: 19-04 | XA-000-09-004-003-008-020-14 | 37.7 | 1135.9
09:24:39:febtest:INFO: 26-05 | XA-000-09-004-003-008-021-14 | 25.1 | 1165.6
09:24:39:febtest:INFO: 17-06 | XA-000-09-004-003-009-024-03 | 12.4 | 1212.7
09:24:40:febtest:INFO: 24-07 | XA-000-09-004-003-016-023-14 | 9.3 | 1212.7
09:24:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:24:43:ST3_smx:INFO: chip: 23-0 28.225000 C 1183.292940 mV
09:24:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:43:ST3_smx:INFO: Electrons
09:24:43:ST3_smx:INFO: # loops 0
09:24:44:ST3_smx:INFO: # loops 1
09:24:46:ST3_smx:INFO: # loops 2
09:24:47:ST3_smx:INFO: # loops 3
09:24:49:ST3_smx:INFO: # loops 4
09:24:51:ST3_smx:INFO: Total # of broken channels: 0
09:24:51:ST3_smx:INFO: List of broken channels: []
09:24:51:ST3_smx:INFO: Total # of broken channels: 0
09:24:51:ST3_smx:INFO: List of broken channels: []
09:24:53:ST3_smx:INFO: chip: 30-1 18.745682 C 1212.728715 mV
09:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:53:ST3_smx:INFO: Electrons
09:24:53:ST3_smx:INFO: # loops 0
09:24:54:ST3_smx:INFO: # loops 1
09:24:56:ST3_smx:INFO: # loops 2
09:24:58:ST3_smx:INFO: # loops 3
09:24:59:ST3_smx:INFO: # loops 4
09:25:01:ST3_smx:INFO: Total # of broken channels: 0
09:25:01:ST3_smx:INFO: List of broken channels: []
09:25:01:ST3_smx:INFO: Total # of broken channels: 0
09:25:01:ST3_smx:INFO: List of broken channels: []
09:25:02:ST3_smx:INFO: chip: 21-2 28.225000 C 1183.292940 mV
09:25:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:02:ST3_smx:INFO: Electrons
09:25:02:ST3_smx:INFO: # loops 0
09:25:04:ST3_smx:INFO: # loops 1
09:25:06:ST3_smx:INFO: # loops 2
09:25:07:ST3_smx:INFO: # loops 3
09:25:09:ST3_smx:INFO: # loops 4
09:25:10:ST3_smx:INFO: Total # of broken channels: 0
09:25:10:ST3_smx:INFO: List of broken channels: []
09:25:10:ST3_smx:INFO: Total # of broken channels: 0
09:25:10:ST3_smx:INFO: List of broken channels: []
09:25:12:ST3_smx:INFO: chip: 28-3 34.556970 C 1159.654860 mV
09:25:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:12:ST3_smx:INFO: Electrons
09:25:12:ST3_smx:INFO: # loops 0
09:25:14:ST3_smx:INFO: # loops 1
09:25:16:ST3_smx:INFO: # loops 2
09:25:17:ST3_smx:INFO: # loops 3
09:25:19:ST3_smx:INFO: # loops 4
09:25:20:ST3_smx:INFO: Total # of broken channels: 0
09:25:20:ST3_smx:INFO: List of broken channels: []
09:25:20:ST3_smx:INFO: Total # of broken channels: 21
09:25:20:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 12, 14, 16, 18, 20, 22, 24, 25, 26, 27, 29, 31, 33, 35, 37, 47]
09:25:22:ST3_smx:INFO: chip: 19-4 37.726682 C 1147.806000 mV
09:25:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:22:ST3_smx:INFO: Electrons
09:25:22:ST3_smx:INFO: # loops 0
09:25:24:ST3_smx:INFO: # loops 1
09:25:25:ST3_smx:INFO: # loops 2
09:25:27:ST3_smx:INFO: # loops 3
09:25:28:ST3_smx:INFO: # loops 4
09:25:30:ST3_smx:INFO: Total # of broken channels: 0
09:25:30:ST3_smx:INFO: List of broken channels: []
09:25:30:ST3_smx:INFO: Total # of broken channels: 0
09:25:30:ST3_smx:INFO: List of broken channels: []
09:25:32:ST3_smx:INFO: chip: 26-5 28.225000 C 1177.390875 mV
09:25:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:32:ST3_smx:INFO: Electrons
09:25:32:ST3_smx:INFO: # loops 0
09:25:33:ST3_smx:INFO: # loops 1
09:25:35:ST3_smx:INFO: # loops 2
09:25:36:ST3_smx:INFO: # loops 3
09:25:38:ST3_smx:INFO: # loops 4
09:25:39:ST3_smx:INFO: Total # of broken channels: 0
09:25:39:ST3_smx:INFO: List of broken channels: []
09:25:39:ST3_smx:INFO: Total # of broken channels: 0
09:25:39:ST3_smx:INFO: List of broken channels: []
09:25:41:ST3_smx:INFO: chip: 17-6 15.590880 C 1224.468235 mV
09:25:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:41:ST3_smx:INFO: Electrons
09:25:41:ST3_smx:INFO: # loops 0
09:25:43:ST3_smx:INFO: # loops 1
09:25:44:ST3_smx:INFO: # loops 2
09:25:46:ST3_smx:INFO: # loops 3
09:25:47:ST3_smx:INFO: # loops 4
09:25:49:ST3_smx:INFO: Total # of broken channels: 0
09:25:49:ST3_smx:INFO: List of broken channels: []
09:25:49:ST3_smx:INFO: Total # of broken channels: 1
09:25:49:ST3_smx:INFO: List of broken channels: [111]
09:25:51:ST3_smx:INFO: chip: 24-7 12.438562 C 1218.600960 mV
09:25:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:51:ST3_smx:INFO: Electrons
09:25:51:ST3_smx:INFO: # loops 0
09:25:52:ST3_smx:INFO: # loops 1
09:25:54:ST3_smx:INFO: # loops 2
09:25:55:ST3_smx:INFO: # loops 3
09:25:57:ST3_smx:INFO: # loops 4
09:25:59:ST3_smx:INFO: Total # of broken channels: 0
09:25:59:ST3_smx:INFO: List of broken channels: []
09:25:59:ST3_smx:INFO: Total # of broken channels: 0
09:25:59:ST3_smx:INFO: List of broken channels: []
09:25:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:25:59:febtest:INFO: 23-00 | XA-000-09-004-003-008-023-14 | 31.4 | 1201.0
09:25:59:febtest:INFO: 30-01 | XA-000-08-002-003-007-151-10 | 21.9 | 1230.3
09:26:00:febtest:INFO: 21-02 | XA-000-09-004-003-008-026-14 | 28.2 | 1206.9
09:26:00:febtest:INFO: 28-03 | XA-000-09-004-003-009-025-03 | 34.6 | 1177.4
09:26:00:febtest:INFO: 19-04 | XA-000-09-004-003-008-020-14 | 40.9 | 1171.5
09:26:00:febtest:INFO: 26-05 | XA-000-09-004-003-008-021-14 | 28.2 | 1195.1
09:26:01:febtest:INFO: 17-06 | XA-000-09-004-003-009-024-03 | 15.6 | 1242.0
09:26:01:febtest:INFO: 24-07 | XA-000-09-004-003-016-023-14 | 12.4 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_30-09_23_54
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2243| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 19044 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M8UL4T3010223B2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8850', '1.848', '2.2340']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0310', '1.850', '2.5180']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9470', '1.850', '0.5173']