
FEB_2244 16.09.24 13:23:27
TextEdit.txt
13:23:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:23:27:ST3_Shared:INFO: FEB-Sensor 13:23:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:24:18:ST3_ModuleSelector:INFO: M8UL0T0010600B2 13:24:18:ST3_ModuleSelector:INFO: 13422 13:24:18:febtest:INFO: Testing FEB with SN 2244 13:24:20:smx_tester:INFO: Scanning setup 13:24:20:elinks:INFO: Disabling clock on downlink 0 13:24:20:elinks:INFO: Disabling clock on downlink 1 13:24:20:elinks:INFO: Disabling clock on downlink 2 13:24:20:elinks:INFO: Disabling clock on downlink 3 13:24:20:elinks:INFO: Disabling clock on downlink 4 13:24:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:24:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:24:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:24:20:elinks:INFO: Disabling clock on downlink 0 13:24:20:elinks:INFO: Disabling clock on downlink 1 13:24:20:elinks:INFO: Disabling clock on downlink 2 13:24:20:elinks:INFO: Disabling clock on downlink 3 13:24:20:elinks:INFO: Disabling clock on downlink 4 13:24:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:24:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:24:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:24:20:elinks:INFO: Disabling clock on downlink 0 13:24:20:elinks:INFO: Disabling clock on downlink 1 13:24:20:elinks:INFO: Disabling clock on downlink 2 13:24:20:elinks:INFO: Disabling clock on downlink 3 13:24:20:elinks:INFO: Disabling clock on downlink 4 13:24:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:24:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:24:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:24:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:24:21:elinks:INFO: Disabling clock on downlink 0 13:24:21:elinks:INFO: Disabling clock on downlink 1 13:24:21:elinks:INFO: Disabling clock on downlink 2 13:24:21:elinks:INFO: Disabling clock on downlink 3 13:24:21:elinks:INFO: Disabling clock on downlink 4 13:24:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:24:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:24:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:24:21:elinks:INFO: Disabling clock on downlink 0 13:24:21:elinks:INFO: Disabling clock on downlink 1 13:24:21:elinks:INFO: Disabling clock on downlink 2 13:24:21:elinks:INFO: Disabling clock on downlink 3 13:24:21:elinks:INFO: Disabling clock on downlink 4 13:24:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:24:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:24:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:24:21:setup_element:INFO: Scanning clock phase 13:24:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:24:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:24:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:24:21:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXX____ Clock Delay: 33 13:24:21:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXX____ Clock Delay: 33 13:24:21:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXXX_ Clock Delay: 35 13:24:21:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXXX_ Clock Delay: 35 13:24:21:setup_element:INFO: Eye window for uplink 20: X________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 21: X________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________________XXXXXX_ Clock Delay: 35 13:24:21:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________________XXXXXX_ Clock Delay: 35 13:24:21:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXXXX Clock Delay: 36 13:24:21:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________ Clock Delay: 40 13:24:21:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________ Clock Delay: 40 13:24:21:setup_element:INFO: Eye window for uplink 30: X__________________________________________________________________________XXXXX Clock Delay: 37 13:24:21:setup_element:INFO: Eye window for uplink 31: X__________________________________________________________________________XXXXX Clock Delay: 37 13:24:21:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2 13:24:21:setup_element:INFO: Scanning data phases 13:24:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:24:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:24:27:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:24:27:setup_element:INFO: Eye window for uplink 16: _____________________________XXXXX______ Data delay found: 11 13:24:27:setup_element:INFO: Eye window for uplink 17: __________________________XXXXX_________ Data delay found: 8 13:24:27:setup_element:INFO: Eye window for uplink 18: __________________________________XXXX__ Data delay found: 15 13:24:27:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__ Data delay found: 14 13:24:27:setup_element:INFO: Eye window for uplink 20: XX_________________________________XXXXX Data delay found: 18 13:24:27:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 13:24:27:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXXX_ Data delay found: 15 13:24:27:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXXX___ Data delay found: 13 13:24:27:setup_element:INFO: Eye window for uplink 24: _______XXX______________________________ Data delay found: 28 13:24:27:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 13:24:27:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________ Data delay found: 29 13:24:27:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________ Data delay found: 32 13:24:27:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________ Data delay found: 36 13:24:27:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 13:24:27:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________ Data delay found: 37 13:24:27:setup_element:INFO: Eye window for uplink 31: _____________XXXXXX_____________________ Data delay found: 35 13:24:27:setup_element:INFO: Setting the data phase to 11 for uplink 16 13:24:27:setup_element:INFO: Setting the data phase to 8 for uplink 17 13:24:27:setup_element:INFO: Setting the data phase to 15 for uplink 18 13:24:27:setup_element:INFO: Setting the data phase to 14 for uplink 19 13:24:27:setup_element:INFO: Setting the data phase to 18 for uplink 20 13:24:27:setup_element:INFO: Setting the data phase to 17 for uplink 21 13:24:27:setup_element:INFO: Setting the data phase to 15 for uplink 22 13:24:27:setup_element:INFO: Setting the data phase to 13 for uplink 23 13:24:27:setup_element:INFO: Setting the data phase to 28 for uplink 24 13:24:27:setup_element:INFO: Setting the data phase to 31 for uplink 25 13:24:27:setup_element:INFO: Setting the data phase to 29 for uplink 26 13:24:27:setup_element:INFO: Setting the data phase to 32 for uplink 27 13:24:27:setup_element:INFO: Setting the data phase to 36 for uplink 28 13:24:27:setup_element:INFO: Setting the data phase to 37 for uplink 29 13:24:27:setup_element:INFO: Setting the data phase to 37 for uplink 30 13:24:27:setup_element:INFO: Setting the data phase to 35 for uplink 31 13:24:27:setup_element:INFO: Beginning SMX ASICs map scan 13:24:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:24:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:24:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:24:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:24:27:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:24:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 13:24:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 13:24:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:24:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:24:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:24:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:24:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:24:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:24:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:24:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:24:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:24:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:24:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:24:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:24:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:24:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:24:30:setup_element:INFO: Performing Elink synchronization 13:24:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:24:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:24:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:24:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:24:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:24:30:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:24:30:ST3_emu_feb:DEBUG: Chip address: 0x0 13:24:30:ST3_emu_feb:DEBUG: Chip address: 0x1 13:24:30:ST3_emu_feb:DEBUG: Chip address: 0x2 13:24:30:ST3_emu_feb:DEBUG: Chip address: 0x3 13:24:30:ST3_emu_feb:DEBUG: Chip address: 0x4 13:24:31:ST3_emu_feb:DEBUG: Chip address: 0x5 13:24:31:ST3_emu_feb:DEBUG: Chip address: 0x6 13:24:31:ST3_emu_feb:DEBUG: Chip address: 0x7 13:24:31:febtest:INFO: Init all SMX (CSA): 30 13:24:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:24:45:febtest:INFO: 23-00 | XA-000-08-002-003-007-103-12 | 34.6 | 1159.7 13:24:45:febtest:INFO: 30-01 | XA-000-09-004-003-013-011-02 | 31.4 | 1159.7 13:24:45:febtest:INFO: 21-02 | XA-000-09-004-003-015-011-01 | 31.4 | 1177.4 13:24:46:febtest:INFO: 28-03 | XA-000-09-004-003-017-010-04 | 25.1 | 1177.4 13:24:46:febtest:INFO: 19-04 | XA-000-08-002-003-007-100-12 | 47.3 | 1141.9 13:24:46:febtest:INFO: 26-05 | XA-000-09-004-003-018-012-10 | 28.2 | 1171.5 13:24:46:febtest:INFO: 17-06 | XA-098-08-002-003-007-021-08 | 63.2 | 1094.2 13:24:46:febtest:INFO: 24-07 | XA-000-09-004-003-014-011-12 | 34.6 | 1159.7 13:24:47:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:24:49:ST3_smx:INFO: chip: 23-0 34.556970 C 1171.483840 mV 13:24:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:24:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:24:50:ST3_smx:INFO: Electrons 13:24:50:ST3_smx:INFO: # loops 0 13:24:51:ST3_smx:INFO: # loops 1 13:24:53:ST3_smx:INFO: # loops 2 13:24:54:ST3_smx:INFO: # loops 3 13:24:56:ST3_smx:INFO: # loops 4 13:24:58:ST3_smx:INFO: Total # of broken channels: 0 13:24:58:ST3_smx:INFO: List of broken channels: [] 13:24:58:ST3_smx:INFO: Total # of broken channels: 9 13:24:58:ST3_smx:INFO: List of broken channels: [49, 51, 67, 89, 93, 101, 109, 113, 121] 13:25:00:ST3_smx:INFO: chip: 30-1 31.389742 C 1171.483840 mV 13:25:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:00:ST3_smx:INFO: Electrons 13:25:00:ST3_smx:INFO: # loops 0 13:25:01:ST3_smx:INFO: # loops 1 13:25:03:ST3_smx:INFO: # loops 2 13:25:04:ST3_smx:INFO: # loops 3 13:25:06:ST3_smx:INFO: # loops 4 13:25:08:ST3_smx:INFO: Total # of broken channels: 1 13:25:08:ST3_smx:INFO: List of broken channels: [46] 13:25:08:ST3_smx:INFO: Total # of broken channels: 1 13:25:08:ST3_smx:INFO: List of broken channels: [46] 13:25:09:ST3_smx:INFO: chip: 21-2 28.225000 C 1189.190035 mV 13:25:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:09:ST3_smx:INFO: Electrons 13:25:09:ST3_smx:INFO: # loops 0 13:25:11:ST3_smx:INFO: # loops 1 13:25:13:ST3_smx:INFO: # loops 2 13:25:14:ST3_smx:INFO: # loops 3 13:25:16:ST3_smx:INFO: # loops 4 13:25:17:ST3_smx:INFO: Total # of broken channels: 0 13:25:17:ST3_smx:INFO: List of broken channels: [] 13:25:17:ST3_smx:INFO: Total # of broken channels: 1 13:25:17:ST3_smx:INFO: List of broken channels: [15] 13:25:19:ST3_smx:INFO: chip: 28-3 25.062742 C 1195.082160 mV 13:25:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:19:ST3_smx:INFO: Electrons 13:25:19:ST3_smx:INFO: # loops 0 13:25:21:ST3_smx:INFO: # loops 1 13:25:22:ST3_smx:INFO: # loops 2 13:25:24:ST3_smx:INFO: # loops 3 13:25:25:ST3_smx:INFO: # loops 4 13:25:27:ST3_smx:INFO: Total # of broken channels: 1 13:25:27:ST3_smx:INFO: List of broken channels: [124] 13:25:27:ST3_smx:INFO: Total # of broken channels: 1 13:25:27:ST3_smx:INFO: List of broken channels: [124] 13:25:29:ST3_smx:INFO: chip: 19-4 47.250730 C 1153.732915 mV 13:25:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:29:ST3_smx:INFO: Electrons 13:25:29:ST3_smx:INFO: # loops 0 13:25:31:ST3_smx:INFO: # loops 1 13:25:32:ST3_smx:INFO: # loops 2 13:25:34:ST3_smx:INFO: # loops 3 13:25:35:ST3_smx:INFO: # loops 4 13:25:37:ST3_smx:INFO: Total # of broken channels: 0 13:25:37:ST3_smx:INFO: List of broken channels: [] 13:25:37:ST3_smx:INFO: Total # of broken channels: 11 13:25:37:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 67, 73, 83, 85, 113, 115] 13:25:39:ST3_smx:INFO: chip: 26-5 28.225000 C 1183.292940 mV 13:25:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:39:ST3_smx:INFO: Electrons 13:25:39:ST3_smx:INFO: # loops 0 13:25:40:ST3_smx:INFO: # loops 1 13:25:42:ST3_smx:INFO: # loops 2 13:25:43:ST3_smx:INFO: # loops 3 13:25:45:ST3_smx:INFO: # loops 4 13:25:47:ST3_smx:INFO: Total # of broken channels: 0 13:25:47:ST3_smx:INFO: List of broken channels: [] 13:25:47:ST3_smx:INFO: Total # of broken channels: 1 13:25:47:ST3_smx:INFO: List of broken channels: [27] 13:25:48:ST3_smx:INFO: chip: 17-6 63.173842 C 1106.178435 mV 13:25:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:48:ST3_smx:INFO: Electrons 13:25:48:ST3_smx:INFO: # loops 0 13:25:50:ST3_smx:INFO: # loops 1 13:25:52:ST3_smx:INFO: # loops 2 13:25:53:ST3_smx:INFO: # loops 3 13:25:55:ST3_smx:INFO: # loops 4 13:25:56:ST3_smx:INFO: Total # of broken channels: 0 13:25:56:ST3_smx:INFO: List of broken channels: [] 13:25:56:ST3_smx:INFO: Total # of broken channels: 0 13:25:56:ST3_smx:INFO: List of broken channels: [] 13:25:58:ST3_smx:INFO: chip: 24-7 34.556970 C 1165.571835 mV 13:25:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:25:58:ST3_smx:INFO: Electrons 13:25:58:ST3_smx:INFO: # loops 0 13:26:00:ST3_smx:INFO: # loops 1 13:26:01:ST3_smx:INFO: # loops 2 13:26:03:ST3_smx:INFO: # loops 3 13:26:05:ST3_smx:INFO: # loops 4 13:26:07:ST3_smx:INFO: Total # of broken channels: 1 13:26:07:ST3_smx:INFO: List of broken channels: [17] 13:26:07:ST3_smx:INFO: Total # of broken channels: 2 13:26:07:ST3_smx:INFO: List of broken channels: [124, 126] 13:26:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:26:07:febtest:INFO: 23-00 | XA-000-08-002-003-007-103-12 | 37.7 | 1195.1 13:26:07:febtest:INFO: 30-01 | XA-000-09-004-003-013-011-02 | 31.4 | 1195.1 13:26:08:febtest:INFO: 21-02 | XA-000-09-004-003-015-011-01 | 31.4 | 1212.7 13:26:08:febtest:INFO: 28-03 | XA-000-09-004-003-017-010-04 | 25.1 | 1212.7 13:26:08:febtest:INFO: 19-04 | XA-000-08-002-003-007-100-12 | 47.3 | 1171.5 13:26:08:febtest:INFO: 26-05 | XA-000-09-004-003-018-012-10 | 31.4 | 1201.0 13:26:09:febtest:INFO: 17-06 | XA-098-08-002-003-007-021-08 | 66.4 | 1124.0 13:26:09:febtest:INFO: 24-07 | XA-000-09-004-003-014-011-12 | 34.6 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_09_16-13_23_27 OPERATOR : Alois Alzheimer SITE : GSI | SETUP : GSI_TEST_SETUP_2 ------------------------------------------------------------ | FEB_SN : 2244| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 13422 | SIZE: 62x42 | GRADE: A MODULE_NAME: M8UL0T0010600B2 LADDER_NAME: L8UL001060 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5990', '1.849', '2.4920'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0070', '1.850', '2.4990'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5245']