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FEB_2246 16.09.24 11:07:32
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11:07:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:07:32:ST3_Shared:INFO: FEB-Sensor
11:07:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:04:ST3_ModuleSelector:INFO: M8UL4B0010220A2
11:08:04:ST3_ModuleSelector:INFO: 15422
11:08:04:febtest:INFO: Testing FEB with SN 2246
11:08:05:smx_tester:INFO: Scanning setup
11:08:05:elinks:INFO: Disabling clock on downlink 0
11:08:05:elinks:INFO: Disabling clock on downlink 1
11:08:05:elinks:INFO: Disabling clock on downlink 2
11:08:05:elinks:INFO: Disabling clock on downlink 3
11:08:05:elinks:INFO: Disabling clock on downlink 4
11:08:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:06:elinks:INFO: Disabling clock on downlink 0
11:08:06:elinks:INFO: Disabling clock on downlink 1
11:08:06:elinks:INFO: Disabling clock on downlink 2
11:08:06:elinks:INFO: Disabling clock on downlink 3
11:08:06:elinks:INFO: Disabling clock on downlink 4
11:08:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:08:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:06:elinks:INFO: Disabling clock on downlink 0
11:08:06:elinks:INFO: Disabling clock on downlink 1
11:08:06:elinks:INFO: Disabling clock on downlink 2
11:08:06:elinks:INFO: Disabling clock on downlink 3
11:08:06:elinks:INFO: Disabling clock on downlink 4
11:08:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:08:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:08:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:06:elinks:INFO: Disabling clock on downlink 0
11:08:06:elinks:INFO: Disabling clock on downlink 1
11:08:06:elinks:INFO: Disabling clock on downlink 2
11:08:06:elinks:INFO: Disabling clock on downlink 3
11:08:06:elinks:INFO: Disabling clock on downlink 4
11:08:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:08:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:06:elinks:INFO: Disabling clock on downlink 0
11:08:06:elinks:INFO: Disabling clock on downlink 1
11:08:06:elinks:INFO: Disabling clock on downlink 2
11:08:06:elinks:INFO: Disabling clock on downlink 3
11:08:06:elinks:INFO: Disabling clock on downlink 4
11:08:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:08:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:06:setup_element:INFO: Scanning clock phase
11:08:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:07:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:08:07:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:07:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:07:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
11:08:07:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
11:08:07:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:07:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:08:07:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:08:07:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:08:07:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:08:07:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:08:07:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:08:07:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
11:08:07:setup_element:INFO: Scanning data phases
11:08:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:12:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:08:12:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
11:08:12:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXXX_
Data delay found: 15
11:08:12:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
11:08:12:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
11:08:12:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
11:08:12:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
11:08:12:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
11:08:12:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
11:08:12:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
11:08:12:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
11:08:12:setup_element:INFO: Eye window for uplink 26: __________XXXX__________________________
Data delay found: 31
11:08:12:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
11:08:12:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
11:08:12:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
11:08:12:setup_element:INFO: Eye window for uplink 30: ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
11:08:12:setup_element:INFO: Eye window for uplink 31: ___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
11:08:12:setup_element:INFO: Setting the data phase to 17 for uplink 16
11:08:12:setup_element:INFO: Setting the data phase to 15 for uplink 17
11:08:12:setup_element:INFO: Setting the data phase to 20 for uplink 18
11:08:12:setup_element:INFO: Setting the data phase to 18 for uplink 19
11:08:12:setup_element:INFO: Setting the data phase to 17 for uplink 20
11:08:12:setup_element:INFO: Setting the data phase to 16 for uplink 21
11:08:12:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:08:12:setup_element:INFO: Setting the data phase to 21 for uplink 23
11:08:12:setup_element:INFO: Setting the data phase to 30 for uplink 24
11:08:12:setup_element:INFO: Setting the data phase to 32 for uplink 25
11:08:12:setup_element:INFO: Setting the data phase to 31 for uplink 26
11:08:12:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:08:12:setup_element:INFO: Setting the data phase to 37 for uplink 28
11:08:12:setup_element:INFO: Setting the data phase to 39 for uplink 29
11:08:12:setup_element:INFO: Setting the data phase to 1 for uplink 30
11:08:12:setup_element:INFO: Setting the data phase to 1 for uplink 31
11:08:12:setup_element:INFO: Beginning SMX ASICs map scan
11:08:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:08:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:08:12:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:08:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:08:12:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:08:12:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:08:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:08:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:08:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:08:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:08:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:08:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:08:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:08:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:08:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:08:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:08:13:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:08:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:08:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:08:15:setup_element:INFO: Performing Elink synchronization
11:08:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:08:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:08:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:08:15:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:08:15:ST3_emu_feb:DEBUG: Chip address: 0x0
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x1
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x2
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x3
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x4
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x5
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x6
11:08:16:ST3_emu_feb:DEBUG: Chip address: 0x7
11:08:16:febtest:INFO: Init all SMX (CSA): 30
11:08:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:08:30:febtest:INFO: 23-00 | XA-000-09-004-003-010-008-10 | 28.2 | 1159.7
11:08:30:febtest:INFO: 30-01 | XA-000-09-004-003-010-014-10 | 37.7 | 1124.0
11:08:30:febtest:INFO: 21-02 | XA-000-09-004-003-010-012-10 | 37.7 | 1124.0
11:08:30:febtest:INFO: 28-03 | XA-000-09-004-003-010-010-10 | 31.4 | 1147.8
11:08:31:febtest:INFO: 19-04 | XA-000-09-004-003-012-014-15 | 34.6 | 1135.9
11:08:31:febtest:INFO: 26-05 | XA-000-09-004-003-013-014-02 | 21.9 | 1171.5
11:08:31:febtest:INFO: 17-06 | XA-000-09-004-003-010-009-10 | 18.7 | 1195.1
11:08:31:febtest:INFO: 24-07 | XA-000-09-004-003-010-013-10 | 18.7 | 1195.1
11:08:32:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:08:34:ST3_smx:INFO: chip: 23-0 28.225000 C 1171.483840 mV
11:08:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:35:ST3_smx:INFO: Electrons
11:08:35:ST3_smx:INFO: # loops 0
11:08:36:ST3_smx:INFO: # loops 1
11:08:38:ST3_smx:INFO: # loops 2
11:08:39:ST3_smx:INFO: # loops 3
11:08:41:ST3_smx:INFO: # loops 4
11:08:42:ST3_smx:INFO: Total # of broken channels: 8
11:08:42:ST3_smx:INFO: List of broken channels: [0, 2, 3, 53, 71, 73, 125, 126]
11:08:42:ST3_smx:INFO: Total # of broken channels: 10
11:08:42:ST3_smx:INFO: List of broken channels: [0, 2, 3, 53, 68, 71, 73, 78, 125, 126]
11:08:44:ST3_smx:INFO: chip: 30-1 37.726682 C 1135.937260 mV
11:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:44:ST3_smx:INFO: Electrons
11:08:44:ST3_smx:INFO: # loops 0
11:08:46:ST3_smx:INFO: # loops 1
11:08:48:ST3_smx:INFO: # loops 2
11:08:49:ST3_smx:INFO: # loops 3
11:08:51:ST3_smx:INFO: # loops 4
11:08:52:ST3_smx:INFO: Total # of broken channels: 0
11:08:52:ST3_smx:INFO: List of broken channels: []
11:08:52:ST3_smx:INFO: Total # of broken channels: 2
11:08:52:ST3_smx:INFO: List of broken channels: [0, 1]
11:08:54:ST3_smx:INFO: chip: 21-2 37.726682 C 1135.937260 mV
11:08:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:08:54:ST3_smx:INFO: Electrons
11:08:54:ST3_smx:INFO: # loops 0
11:08:56:ST3_smx:INFO: # loops 1
11:08:57:ST3_smx:INFO: # loops 2
11:08:59:ST3_smx:INFO: # loops 3
11:09:00:ST3_smx:INFO: # loops 4
11:09:02:ST3_smx:INFO: Total # of broken channels: 2
11:09:02:ST3_smx:INFO: List of broken channels: [3, 7]
11:09:02:ST3_smx:INFO: Total # of broken channels: 11
11:09:02:ST3_smx:INFO: List of broken channels: [2, 3, 7, 8, 14, 20, 30, 70, 90, 94, 98]
11:09:04:ST3_smx:INFO: chip: 28-3 31.389742 C 1153.732915 mV
11:09:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:04:ST3_smx:INFO: Electrons
11:09:04:ST3_smx:INFO: # loops 0
11:09:05:ST3_smx:INFO: # loops 1
11:09:07:ST3_smx:INFO: # loops 2
11:09:09:ST3_smx:INFO: # loops 3
11:09:10:ST3_smx:INFO: # loops 4
11:09:12:ST3_smx:INFO: Total # of broken channels: 1
11:09:12:ST3_smx:INFO: List of broken channels: [11]
11:09:12:ST3_smx:INFO: Total # of broken channels: 2
11:09:12:ST3_smx:INFO: List of broken channels: [0, 11]
11:09:13:ST3_smx:INFO: chip: 19-4 34.556970 C 1147.806000 mV
11:09:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:13:ST3_smx:INFO: Electrons
11:09:13:ST3_smx:INFO: # loops 0
11:09:15:ST3_smx:INFO: # loops 1
11:09:17:ST3_smx:INFO: # loops 2
11:09:18:ST3_smx:INFO: # loops 3
11:09:20:ST3_smx:INFO: # loops 4
11:09:21:ST3_smx:INFO: Total # of broken channels: 3
11:09:21:ST3_smx:INFO: List of broken channels: [3, 125, 127]
11:09:21:ST3_smx:INFO: Total # of broken channels: 3
11:09:21:ST3_smx:INFO: List of broken channels: [3, 125, 127]
11:09:23:ST3_smx:INFO: chip: 26-5 25.062742 C 1183.292940 mV
11:09:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:23:ST3_smx:INFO: Electrons
11:09:23:ST3_smx:INFO: # loops 0
11:09:25:ST3_smx:INFO: # loops 1
11:09:26:ST3_smx:INFO: # loops 2
11:09:28:ST3_smx:INFO: # loops 3
11:09:29:ST3_smx:INFO: # loops 4
11:09:31:ST3_smx:INFO: Total # of broken channels: 2
11:09:31:ST3_smx:INFO: List of broken channels: [123, 125]
11:09:31:ST3_smx:INFO: Total # of broken channels: 4
11:09:31:ST3_smx:INFO: List of broken channels: [34, 98, 123, 125]
11:09:33:ST3_smx:INFO: chip: 17-6 18.745682 C 1206.851500 mV
11:09:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:33:ST3_smx:INFO: Electrons
11:09:33:ST3_smx:INFO: # loops 0
11:09:34:ST3_smx:INFO: # loops 1
11:09:36:ST3_smx:INFO: # loops 2
11:09:37:ST3_smx:INFO: # loops 3
11:09:39:ST3_smx:INFO: # loops 4
11:09:40:ST3_smx:INFO: Total # of broken channels: 4
11:09:40:ST3_smx:INFO: List of broken channels: [87, 123, 126, 127]
11:09:40:ST3_smx:INFO: Total # of broken channels: 12
11:09:40:ST3_smx:INFO: List of broken channels: [7, 26, 71, 77, 79, 81, 87, 89, 99, 123, 126, 127]
11:09:42:ST3_smx:INFO: chip: 24-7 21.902970 C 1200.969315 mV
11:09:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:42:ST3_smx:INFO: Electrons
11:09:42:ST3_smx:INFO: # loops 0
11:09:44:ST3_smx:INFO: # loops 1
11:09:46:ST3_smx:INFO: # loops 2
11:09:47:ST3_smx:INFO: # loops 3
11:09:49:ST3_smx:INFO: # loops 4
11:09:50:ST3_smx:INFO: Total # of broken channels: 4
11:09:50:ST3_smx:INFO: List of broken channels: [109, 117, 119, 121]
11:09:50:ST3_smx:INFO: Total # of broken channels: 4
11:09:50:ST3_smx:INFO: List of broken channels: [109, 117, 119, 121]
11:09:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:09:51:febtest:INFO: 23-00 | XA-000-09-004-003-010-008-10 | 28.2 | 1189.2
11:09:51:febtest:INFO: 30-01 | XA-000-09-004-003-010-014-10 | 40.9 | 1159.7
11:09:51:febtest:INFO: 21-02 | XA-000-09-004-003-010-012-10 | 37.7 | 1159.7
11:09:51:febtest:INFO: 28-03 | XA-000-09-004-003-010-010-10 | 34.6 | 1177.4
11:09:52:febtest:INFO: 19-04 | XA-000-09-004-003-012-014-15 | 37.7 | 1165.6
11:09:52:febtest:INFO: 26-05 | XA-000-09-004-003-013-014-02 | 25.1 | 1201.0
11:09:52:febtest:INFO: 17-06 | XA-000-09-004-003-010-009-10 | 18.7 | 1224.5
11:09:52:febtest:INFO: 24-07 | XA-000-09-004-003-010-013-10 | 21.9 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_09_16-11_07_32
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2246| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 15422 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M8UL4B0010220A2
LADDER_NAME: L8UL401022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0730', '1.848', '2.4440']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0110', '1.850', '2.6130']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.850', '0.5253']
11:10:06:ST3_Shared:INFO: Listo of operators:Olga B.;