
FEB_2247 14.10.24 08:36:53
TextEdit.txt
08:36:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:36:53:ST3_Shared:INFO: FEB-Sensor 08:36:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:36:56:ST3_ModuleSelector:INFO: M8UL0T2010602B2 08:36:56:ST3_ModuleSelector:INFO: 24114 08:36:56:febtest:INFO: Testing FEB with SN 2247 08:36:57:smx_tester:INFO: Scanning setup 08:36:57:elinks:INFO: Disabling clock on downlink 0 08:36:57:elinks:INFO: Disabling clock on downlink 1 08:36:57:elinks:INFO: Disabling clock on downlink 2 08:36:57:elinks:INFO: Disabling clock on downlink 3 08:36:57:elinks:INFO: Disabling clock on downlink 4 08:36:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:36:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:36:58:elinks:INFO: Disabling clock on downlink 0 08:36:58:elinks:INFO: Disabling clock on downlink 1 08:36:58:elinks:INFO: Disabling clock on downlink 2 08:36:58:elinks:INFO: Disabling clock on downlink 3 08:36:58:elinks:INFO: Disabling clock on downlink 4 08:36:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:36:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:36:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:36:58:elinks:INFO: Disabling clock on downlink 0 08:36:58:elinks:INFO: Disabling clock on downlink 1 08:36:58:elinks:INFO: Disabling clock on downlink 2 08:36:58:elinks:INFO: Disabling clock on downlink 3 08:36:58:elinks:INFO: Disabling clock on downlink 4 08:36:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:36:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 08:36:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 08:36:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:36:58:elinks:INFO: Disabling clock on downlink 0 08:36:58:elinks:INFO: Disabling clock on downlink 1 08:36:58:elinks:INFO: Disabling clock on downlink 2 08:36:58:elinks:INFO: Disabling clock on downlink 3 08:36:58:elinks:INFO: Disabling clock on downlink 4 08:36:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:36:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:36:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:36:58:elinks:INFO: Disabling clock on downlink 0 08:36:58:elinks:INFO: Disabling clock on downlink 1 08:36:58:elinks:INFO: Disabling clock on downlink 2 08:36:58:elinks:INFO: Disabling clock on downlink 3 08:36:58:elinks:INFO: Disabling clock on downlink 4 08:36:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:36:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:36:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 08:36:58:setup_element:INFO: Scanning clock phase 08:36:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:36:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:36:59:setup_element:INFO: Clock phase scan results for group 0, downlink 2 08:36:59:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 08:36:59:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 08:36:59:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:36:59:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:36:59:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:36:59:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:36:59:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:36:59:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:36:59:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:36:59:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 08:36:59:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 08:36:59:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 08:36:59:setup_element:INFO: Scanning data phases 08:36:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:36:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:37:05:setup_element:INFO: Data phase scan results for group 0, downlink 2 08:37:05:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X Data delay found: 21 08:37:05:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX Data delay found: 19 08:37:05:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX Data delay found: 20 08:37:05:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX Data delay found: 18 08:37:05:setup_element:INFO: Eye window for uplink 20: XXX___________________________________XX Data delay found: 20 08:37:05:setup_element:INFO: Eye window for uplink 21: XXX__________________________________XXX Data delay found: 19 08:37:05:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX Data delay found: 20 08:37:05:setup_element:INFO: Eye window for uplink 23: XXXXXX______________________________XXXX Data delay found: 20 08:37:05:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________ Data delay found: 30 08:37:05:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 08:37:05:setup_element:INFO: Eye window for uplink 26: ______________XXXX______________________ Data delay found: 35 08:37:05:setup_element:INFO: Eye window for uplink 27: _________________XXXXX__________________ Data delay found: 39 08:37:05:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________ Data delay found: 38 08:37:05:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________ Data delay found: 0 08:37:05:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________ Data delay found: 1 08:37:05:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________ Data delay found: 1 08:37:05:setup_element:INFO: Setting the data phase to 21 for uplink 16 08:37:05:setup_element:INFO: Setting the data phase to 19 for uplink 17 08:37:05:setup_element:INFO: Setting the data phase to 20 for uplink 18 08:37:05:setup_element:INFO: Setting the data phase to 18 for uplink 19 08:37:05:setup_element:INFO: Setting the data phase to 20 for uplink 20 08:37:05:setup_element:INFO: Setting the data phase to 19 for uplink 21 08:37:05:setup_element:INFO: Setting the data phase to 20 for uplink 22 08:37:05:setup_element:INFO: Setting the data phase to 20 for uplink 23 08:37:05:setup_element:INFO: Setting the data phase to 30 for uplink 24 08:37:05:setup_element:INFO: Setting the data phase to 32 for uplink 25 08:37:05:setup_element:INFO: Setting the data phase to 35 for uplink 26 08:37:05:setup_element:INFO: Setting the data phase to 39 for uplink 27 08:37:05:setup_element:INFO: Setting the data phase to 38 for uplink 28 08:37:05:setup_element:INFO: Setting the data phase to 0 for uplink 29 08:37:05:setup_element:INFO: Setting the data phase to 1 for uplink 30 08:37:05:setup_element:INFO: Setting the data phase to 1 for uplink 31 ==============================================OOO============================================== 08:37:05:setup_element:INFO: Beginning SMX ASICs map scan 08:37:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:37:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:37:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:37:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 08:37:05:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 08:37:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 08:37:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 08:37:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 08:37:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 08:37:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 08:37:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 08:37:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 08:37:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 08:37:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 08:37:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 08:37:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 08:37:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 08:37:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 08:37:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 08:37:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 08:37:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 08:37:08:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 16: ________________________________________________________________________________ Uplink 17: ________________________________________________________________________________ Uplink 18: ______________________________________________________________________XXXXXXXX__ Uplink 19: ______________________________________________________________________XXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXXX__ Uplink 21: _____________________________________________________________________XXXXXXXXX__ Uplink 22: _____________________________________________________________________XXXXXXXXX__ Uplink 23: _____________________________________________________________________XXXXXXXXX__ Uplink 24: ____________________________________________________________________XXXXXXXX____ Uplink 25: ____________________________________________________________________XXXXXXXX____ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: ________________________________________________________________________________ Uplink 31: ________________________________________________________________________________ Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 18: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 19: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 20: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 21: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 22: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 23: Optimal Phase: 20 Window Length: 30 Eye Window: XXXXXX______________________________XXXX Uplink 24: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 26: Optimal Phase: 35 Window Length: 36 Eye Window: ______________XXXX______________________ Uplink 27: Optimal Phase: 39 Window Length: 35 Eye Window: _________________XXXXX__________________ Uplink 28: Optimal Phase: 38 Window Length: 35 Eye Window: ________________XXXXX___________________ Uplink 29: Optimal Phase: 0 Window Length: 34 Eye Window: __________________XXXXXX________________ Uplink 30: Optimal Phase: 1 Window Length: 34 Eye Window: ___________________XXXXXX_______________ Uplink 31: Optimal Phase: 1 Window Length: 33 Eye Window: __________________XXXXXXX_______________ ==============================================OOO============================================== 08:37:08:setup_element:INFO: Performing Elink synchronization 08:37:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:37:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:37:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:37:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 08:37:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 08:37:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 08:37:08:febtest:INFO: Init all SMX (CSA): 30 08:37:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:37:22:febtest:INFO: 23-00 | XA-001-08-003-000-006-051-11 | 15.6 | 1189.2 08:37:22:febtest:INFO: 30-01 | XA-006-08-003-000-006-051-08 | 21.9 | 1165.6 08:37:23:febtest:INFO: 21-02 | XA-004-08-003-000-006-051-15 | 15.6 | 1201.0 08:37:23:febtest:INFO: 28-03 | XA-000-08-003-000-005-185-12 | 9.3 | 1206.9 08:37:23:febtest:INFO: 19-04 | XA-003-08-003-000-006-051-12 | 18.7 | 1183.3 08:37:23:febtest:INFO: 26-05 | XA-000-08-003-000-005-165-11 | 9.3 | 1195.1 08:37:24:febtest:INFO: 17-06 | XA-002-08-003-000-006-051-15 | 21.9 | 1206.9 08:37:24:febtest:INFO: 24-07 | XA-005-08-003-000-006-051-12 | 9.3 | 1282.9 08:37:25:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 08:37:27:ST3_smx:INFO: chip: 23-0 15.590880 C 1200.969315 mV 08:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:27:ST3_smx:INFO: Electrons 08:37:27:ST3_smx:INFO: # loops 0 08:37:29:ST3_smx:INFO: # loops 1 08:37:30:ST3_smx:INFO: # loops 2 08:37:32:ST3_smx:INFO: # loops 3 08:37:33:ST3_smx:INFO: # loops 4 08:37:35:ST3_smx:INFO: Total # of broken channels: 0 08:37:35:ST3_smx:INFO: List of broken channels: [] 08:37:35:ST3_smx:INFO: Total # of broken channels: 0 08:37:35:ST3_smx:INFO: List of broken channels: [] 08:37:36:ST3_smx:INFO: chip: 30-1 21.902970 C 1177.390875 mV 08:37:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:36:ST3_smx:INFO: Electrons 08:37:36:ST3_smx:INFO: # loops 0 08:37:38:ST3_smx:INFO: # loops 1 08:37:40:ST3_smx:INFO: # loops 2 08:37:41:ST3_smx:INFO: # loops 3 08:37:43:ST3_smx:INFO: # loops 4 08:37:45:ST3_smx:INFO: Total # of broken channels: 0 08:37:45:ST3_smx:INFO: List of broken channels: [] 08:37:45:ST3_smx:INFO: Total # of broken channels: 1 08:37:45:ST3_smx:INFO: List of broken channels: [80] 08:37:46:ST3_smx:INFO: chip: 21-2 15.590880 C 1206.851500 mV 08:37:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:46:ST3_smx:INFO: Electrons 08:37:46:ST3_smx:INFO: # loops 0 08:37:48:ST3_smx:INFO: # loops 1 08:37:50:ST3_smx:INFO: # loops 2 08:37:52:ST3_smx:INFO: # loops 3 08:37:53:ST3_smx:INFO: # loops 4 08:37:55:ST3_smx:INFO: Total # of broken channels: 0 08:37:55:ST3_smx:INFO: List of broken channels: [] 08:37:55:ST3_smx:INFO: Total # of broken channels: 0 08:37:55:ST3_smx:INFO: List of broken channels: [] 08:37:57:ST3_smx:INFO: chip: 28-3 9.288730 C 1218.600960 mV 08:37:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:37:57:ST3_smx:INFO: Electrons 08:37:57:ST3_smx:INFO: # loops 0 08:37:58:ST3_smx:INFO: # loops 1 08:38:00:ST3_smx:INFO: # loops 2 08:38:01:ST3_smx:INFO: # loops 3 08:38:03:ST3_smx:INFO: # loops 4 08:38:05:ST3_smx:INFO: Total # of broken channels: 0 08:38:05:ST3_smx:INFO: List of broken channels: [] 08:38:05:ST3_smx:INFO: Total # of broken channels: 0 08:38:05:ST3_smx:INFO: List of broken channels: [] 08:38:06:ST3_smx:INFO: chip: 19-4 18.745682 C 1195.082160 mV 08:38:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:06:ST3_smx:INFO: Electrons 08:38:06:ST3_smx:INFO: # loops 0 08:38:08:ST3_smx:INFO: # loops 1 08:38:10:ST3_smx:INFO: # loops 2 08:38:11:ST3_smx:INFO: # loops 3 08:38:13:ST3_smx:INFO: # loops 4 08:38:14:ST3_smx:INFO: Total # of broken channels: 0 08:38:14:ST3_smx:INFO: List of broken channels: [] 08:38:14:ST3_smx:INFO: Total # of broken channels: 0 08:38:14:ST3_smx:INFO: List of broken channels: [] 08:38:16:ST3_smx:INFO: chip: 26-5 9.288730 C 1206.851500 mV 08:38:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:16:ST3_smx:INFO: Electrons 08:38:16:ST3_smx:INFO: # loops 0 08:38:18:ST3_smx:INFO: # loops 1 08:38:19:ST3_smx:INFO: # loops 2 08:38:21:ST3_smx:INFO: # loops 3 08:38:22:ST3_smx:INFO: # loops 4 08:38:24:ST3_smx:INFO: Total # of broken channels: 0 08:38:24:ST3_smx:INFO: List of broken channels: [] 08:38:24:ST3_smx:INFO: Total # of broken channels: 0 08:38:24:ST3_smx:INFO: List of broken channels: [] 08:38:26:ST3_smx:INFO: chip: 17-6 21.902970 C 1236.187875 mV 08:38:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:26:ST3_smx:INFO: Electrons 08:38:26:ST3_smx:INFO: # loops 0 08:38:27:ST3_smx:INFO: # loops 1 08:38:29:ST3_smx:INFO: # loops 2 08:38:30:ST3_smx:INFO: # loops 3 08:38:32:ST3_smx:INFO: # loops 4 08:38:33:ST3_smx:INFO: Total # of broken channels: 0 08:38:33:ST3_smx:INFO: List of broken channels: [] 08:38:33:ST3_smx:INFO: Total # of broken channels: 0 08:38:33:ST3_smx:INFO: List of broken channels: [] 08:38:35:ST3_smx:INFO: chip: 24-7 9.288730 C 1329.229315 mV 08:38:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:38:35:ST3_smx:INFO: Electrons 08:38:35:ST3_smx:INFO: # loops 0 08:38:37:ST3_smx:INFO: # loops 1 08:38:38:ST3_smx:INFO: # loops 2 08:38:40:ST3_smx:INFO: # loops 3 08:38:41:ST3_smx:INFO: # loops 4 08:38:43:ST3_smx:INFO: Total # of broken channels: 0 08:38:43:ST3_smx:INFO: List of broken channels: [] 08:38:43:ST3_smx:INFO: Total # of broken channels: 0 08:38:43:ST3_smx:INFO: List of broken channels: [] 08:38:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:38:43:febtest:INFO: 23-00 | XA-001-08-003-000-006-051-11 | 15.6 | 1224.5 08:38:44:febtest:INFO: 30-01 | XA-006-08-003-000-006-051-08 | 25.1 | 1201.0 08:38:44:febtest:INFO: 21-02 | XA-004-08-003-000-006-051-15 | 18.7 | 1230.3 08:38:44:febtest:INFO: 28-03 | XA-000-08-003-000-005-185-12 | 9.3 | 1242.0 08:38:44:febtest:INFO: 19-04 | XA-003-08-003-000-006-051-12 | 21.9 | 1218.6 08:38:45:febtest:INFO: 26-05 | XA-000-08-003-000-005-165-11 | 12.4 | 1230.3 08:38:45:febtest:INFO: 17-06 | XA-002-08-003-000-006-051-15 | 21.9 | 1329.2 08:38:45:febtest:INFO: 24-07 | XA-005-08-003-000-006-051-12 | 6.1 | 1578.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_10_14-08_36_53 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2247| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 24114 | SIZE: 62x124 | GRADE: A MODULE_NAME: M8UL0T2010602B2 LADDER_NAME: L8UL001060 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5330', '1.848', '2.4250'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0700', '1.850', '2.5260'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.5276']