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FEB_2247 10.10.24 11:04:08
Info
11:04:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:08:ST3_Shared:INFO: FEB-Microcable
11:04:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:08:febtest:INFO: Testing FEB with SN 2247
11:04:10:smx_tester:INFO: Scanning setup
11:04:10:elinks:INFO: Disabling clock on downlink 0
11:04:10:elinks:INFO: Disabling clock on downlink 1
11:04:10:elinks:INFO: Disabling clock on downlink 2
11:04:10:elinks:INFO: Disabling clock on downlink 3
11:04:10:elinks:INFO: Disabling clock on downlink 4
11:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:10:elinks:INFO: Disabling clock on downlink 0
11:04:10:elinks:INFO: Disabling clock on downlink 1
11:04:10:elinks:INFO: Disabling clock on downlink 2
11:04:10:elinks:INFO: Disabling clock on downlink 3
11:04:10:elinks:INFO: Disabling clock on downlink 4
11:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:10:elinks:INFO: Disabling clock on downlink 0
11:04:10:elinks:INFO: Disabling clock on downlink 1
11:04:10:elinks:INFO: Disabling clock on downlink 2
11:04:10:elinks:INFO: Disabling clock on downlink 3
11:04:10:elinks:INFO: Disabling clock on downlink 4
11:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:04:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:10:elinks:INFO: Disabling clock on downlink 0
11:04:10:elinks:INFO: Disabling clock on downlink 1
11:04:10:elinks:INFO: Disabling clock on downlink 2
11:04:10:elinks:INFO: Disabling clock on downlink 3
11:04:10:elinks:INFO: Disabling clock on downlink 4
11:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:04:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:11:elinks:INFO: Disabling clock on downlink 0
11:04:11:elinks:INFO: Disabling clock on downlink 1
11:04:11:elinks:INFO: Disabling clock on downlink 2
11:04:11:elinks:INFO: Disabling clock on downlink 3
11:04:11:elinks:INFO: Disabling clock on downlink 4
11:04:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:04:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:04:11:setup_element:INFO: Scanning clock phase
11:04:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:04:11:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:04:11:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:04:11:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:04:11:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:04:11:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
11:04:11:setup_element:INFO: Scanning data phases
11:04:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:04:17:setup_element:INFO: Eye window for uplink 16: XXXX__________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
11:04:17:setup_element:INFO: Eye window for uplink 17: XXX___________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 8
11:04:17:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
11:04:17:setup_element:INFO: Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
11:04:17:setup_element:INFO: Eye window for uplink 20: XX________XXXXXXXXXXXXXXXXXXX_________XX
Data delay found: 33
11:04:17:setup_element:INFO: Eye window for uplink 21: XX________XXXXXXXXXXXXXXXXXXX_______XXXX
Data delay found: 5
11:04:17:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
11:04:17:setup_element:INFO: Eye window for uplink 23: XXXXXXX_____________________________XXXX
Data delay found: 21
11:04:17:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
11:04:17:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
11:04:17:setup_element:INFO: Eye window for uplink 26: _____________XXXXX______________________
Data delay found: 35
11:04:17:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
11:04:17:setup_element:INFO: Eye window for uplink 28: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:04:17:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
11:04:17:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
11:04:17:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
11:04:17:setup_element:INFO: Setting the data phase to 8 for uplink 16
11:04:17:setup_element:INFO: Setting the data phase to 8 for uplink 17
11:04:17:setup_element:INFO: Setting the data phase to 20 for uplink 18
11:04:17:setup_element:INFO: Setting the data phase to 18 for uplink 19
11:04:17:setup_element:INFO: Setting the data phase to 33 for uplink 20
11:04:17:setup_element:INFO: Setting the data phase to 5 for uplink 21
11:04:17:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:04:17:setup_element:INFO: Setting the data phase to 21 for uplink 23
11:04:17:setup_element:INFO: Setting the data phase to 29 for uplink 24
11:04:17:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:04:17:setup_element:INFO: Setting the data phase to 35 for uplink 26
11:04:17:setup_element:INFO: Setting the data phase to 38 for uplink 27
11:04:17:setup_element:INFO: Setting the data phase to 6 for uplink 28
11:04:17:setup_element:INFO: Setting the data phase to 6 for uplink 29
11:04:17:setup_element:INFO: Setting the data phase to 0 for uplink 30
11:04:17:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
11:04:17:setup_element:INFO: Beginning SMX ASICs map scan
11:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:04:17:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:04:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:04:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:04:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:04:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:04:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:04:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:04:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:04:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:04:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:04:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:04:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:04:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:04:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:04:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:04:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:04:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:04:20:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXXXX_
Uplink 17: ______________________________________________________________________XXXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 8
Window Length: 10
Eye Window: XXXX__________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 17:
Optimal Phase: 8
Window Length: 11
Eye Window: XXX___________XXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 20:
Optimal Phase: 33
Window Length: 9
Eye Window: XX________XXXXXXXXXXXXXXXXXXX_________XX
Uplink 21:
Optimal Phase: 5
Window Length: 8
Eye Window: XX________XXXXXXXXXXXXXXXXXXX_______XXXX
Uplink 22:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 23:
Optimal Phase: 21
Window Length: 29
Eye Window: XXXXXXX_____________________________XXXX
Uplink 24:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 6
Window Length: 13
Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 29:
Optimal Phase: 6
Window Length: 13
Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Uplink 30:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 31:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
==============================================OOO==============================================
11:04:20:setup_element:INFO: Performing Elink synchronization
11:04:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:04:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:04:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
11:04:21:febtest:INFO: Init all SMX (CSA): 30
11:04:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:04:35:febtest:INFO: 23-00 | XA-001-08-003-000-006-051-11 | 18.7 | 1195.1
11:04:36:febtest:INFO: 30-01 | XA-006-08-003-000-006-051-08 | 25.1 | 1159.7
11:04:36:febtest:INFO: 21-02 | XA-004-08-003-000-006-051-15 | 21.9 | 1195.1
11:04:36:febtest:INFO: 28-03 | XA-000-08-003-000-005-185-12 | 12.4 | 1206.9
11:04:36:febtest:INFO: 19-04 | XA-003-08-003-000-006-051-12 | 21.9 | 1183.3
11:04:37:febtest:INFO: 26-05 | XA-000-08-003-000-005-165-11 | 12.4 | 1195.1
11:04:37:febtest:INFO: 17-06 | XA-002-08-003-000-006-051-15 | 25.1 | 1218.6
11:04:37:febtest:INFO: 24-07 | XA-005-08-003-000-006-051-12 | 9.3 | 1300.3
11:04:38:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:04:40:ST3_smx:INFO: chip: 23-0 18.745682 C 1206.851500 mV
11:04:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:40:ST3_smx:INFO: Electrons
11:04:40:ST3_smx:INFO: # loops 0
11:04:42:ST3_smx:INFO: # loops 1
11:04:44:ST3_smx:INFO: # loops 2
11:04:45:ST3_smx:INFO: Total # of broken channels: 0
11:04:45:ST3_smx:INFO: List of broken channels: []
11:04:45:ST3_smx:INFO: Total # of broken channels: 0
11:04:45:ST3_smx:INFO: List of broken channels: []
11:04:47:ST3_smx:INFO: chip: 30-1 25.062742 C 1171.483840 mV
11:04:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:47:ST3_smx:INFO: Electrons
11:04:47:ST3_smx:INFO: # loops 0
11:04:49:ST3_smx:INFO: # loops 1
11:04:50:ST3_smx:INFO: # loops 2
11:04:52:ST3_smx:INFO: Total # of broken channels: 0
11:04:52:ST3_smx:INFO: List of broken channels: []
11:04:52:ST3_smx:INFO: Total # of broken channels: 0
11:04:52:ST3_smx:INFO: List of broken channels: []
11:04:54:ST3_smx:INFO: chip: 21-2 18.745682 C 1206.851500 mV
11:04:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:54:ST3_smx:INFO: Electrons
11:04:54:ST3_smx:INFO: # loops 0
11:04:55:ST3_smx:INFO: # loops 1
11:04:57:ST3_smx:INFO: # loops 2
11:04:59:ST3_smx:INFO: Total # of broken channels: 0
11:04:59:ST3_smx:INFO: List of broken channels: []
11:04:59:ST3_smx:INFO: Total # of broken channels: 24
11:04:59:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 52]
11:05:00:ST3_smx:INFO: chip: 28-3 12.438562 C 1218.600960 mV
11:05:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:00:ST3_smx:INFO: Electrons
11:05:00:ST3_smx:INFO: # loops 0
11:05:02:ST3_smx:INFO: # loops 1
11:05:04:ST3_smx:INFO: # loops 2
11:05:05:ST3_smx:INFO: Total # of broken channels: 0
11:05:05:ST3_smx:INFO: List of broken channels: []
11:05:05:ST3_smx:INFO: Total # of broken channels: 0
11:05:05:ST3_smx:INFO: List of broken channels: []
11:05:07:ST3_smx:INFO: chip: 19-4 21.902970 C 1195.082160 mV
11:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:07:ST3_smx:INFO: Electrons
11:05:07:ST3_smx:INFO: # loops 0
11:05:09:ST3_smx:INFO: # loops 1
11:05:10:ST3_smx:INFO: # loops 2
11:05:12:ST3_smx:INFO: Total # of broken channels: 0
11:05:12:ST3_smx:INFO: List of broken channels: []
11:05:12:ST3_smx:INFO: Total # of broken channels: 43
11:05:12:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 78, 80, 82, 84, 86, 92, 94]
11:05:14:ST3_smx:INFO: chip: 26-5 12.438562 C 1206.851500 mV
11:05:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:14:ST3_smx:INFO: Electrons
11:05:14:ST3_smx:INFO: # loops 0
11:05:15:ST3_smx:INFO: # loops 1
11:05:17:ST3_smx:INFO: # loops 2
11:05:18:ST3_smx:INFO: Total # of broken channels: 0
11:05:18:ST3_smx:INFO: List of broken channels: []
11:05:18:ST3_smx:INFO: Total # of broken channels: 26
11:05:18:ST3_smx:INFO: List of broken channels: [63, 65, 69, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127]
11:05:20:ST3_smx:INFO: chip: 17-6 25.062742 C 1247.887635 mV
11:05:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:20:ST3_smx:INFO: Electrons
11:05:20:ST3_smx:INFO: # loops 0
11:05:22:ST3_smx:INFO: # loops 1
11:05:24:ST3_smx:INFO: # loops 2
11:05:25:ST3_smx:INFO: Total # of broken channels: 0
11:05:25:ST3_smx:INFO: List of broken channels: []
11:05:25:ST3_smx:INFO: Total # of broken channels: 0
11:05:25:ST3_smx:INFO: List of broken channels: []
11:05:27:ST3_smx:INFO: chip: 24-7 12.438562 C 1386.734115 mV
11:05:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:05:27:ST3_smx:INFO: Electrons
11:05:27:ST3_smx:INFO: # loops 0
11:05:29:ST3_smx:INFO: # loops 1
11:05:30:ST3_smx:INFO: # loops 2
11:05:32:ST3_smx:INFO: Total # of broken channels: 0
11:05:32:ST3_smx:INFO: List of broken channels: []
11:05:32:ST3_smx:INFO: Total # of broken channels: 0
11:05:32:ST3_smx:INFO: List of broken channels: []
11:05:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:05:32:febtest:INFO: 23-00 | XA-001-08-003-000-006-051-11 | 18.7 | 1230.3
11:05:33:febtest:INFO: 30-01 | XA-006-08-003-000-006-051-08 | 28.2 | 1195.1
11:05:33:febtest:INFO: 21-02 | XA-004-08-003-000-006-051-15 | 21.9 | 1230.3
11:05:33:febtest:INFO: 28-03 | XA-000-08-003-000-005-185-12 | 12.4 | 1236.2
11:05:33:febtest:INFO: 19-04 | XA-003-08-003-000-006-051-12 | 25.1 | 1218.6
11:05:34:febtest:INFO: 26-05 | XA-000-08-003-000-005-165-11 | 15.6 | 1230.3
11:05:34:febtest:INFO: 17-06 | XA-002-08-003-000-006-051-15 | 21.9 | 1489.0
11:05:34:febtest:INFO: 24-07 | XA-005-08-003-000-006-051-12 | 6.1 | 1578.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_10-11_04_08
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2247| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5380', '1.848', '2.5690']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0670', '1.850', '2.6090']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.850', '0.5273']