
FEB_2249 07.10.24 11:40:31
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11:40:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:40:31:ST3_Shared:INFO: FEB-Microcable 11:40:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:40:31:febtest:INFO: Testing FEB with SN 2249 11:40:33:smx_tester:INFO: Scanning setup 11:40:33:elinks:INFO: Disabling clock on downlink 0 11:40:33:elinks:INFO: Disabling clock on downlink 1 11:40:33:elinks:INFO: Disabling clock on downlink 2 11:40:33:elinks:INFO: Disabling clock on downlink 3 11:40:33:elinks:INFO: Disabling clock on downlink 4 11:40:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:40:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:33:elinks:INFO: Disabling clock on downlink 0 11:40:33:elinks:INFO: Disabling clock on downlink 1 11:40:33:elinks:INFO: Disabling clock on downlink 2 11:40:33:elinks:INFO: Disabling clock on downlink 3 11:40:33:elinks:INFO: Disabling clock on downlink 4 11:40:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:40:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:33:elinks:INFO: Disabling clock on downlink 0 11:40:33:elinks:INFO: Disabling clock on downlink 1 11:40:33:elinks:INFO: Disabling clock on downlink 2 11:40:33:elinks:INFO: Disabling clock on downlink 3 11:40:33:elinks:INFO: Disabling clock on downlink 4 11:40:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:40:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:40:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:33:elinks:INFO: Disabling clock on downlink 0 11:40:33:elinks:INFO: Disabling clock on downlink 1 11:40:33:elinks:INFO: Disabling clock on downlink 2 11:40:33:elinks:INFO: Disabling clock on downlink 3 11:40:33:elinks:INFO: Disabling clock on downlink 4 11:40:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:40:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:33:elinks:INFO: Disabling clock on downlink 0 11:40:33:elinks:INFO: Disabling clock on downlink 1 11:40:33:elinks:INFO: Disabling clock on downlink 2 11:40:33:elinks:INFO: Disabling clock on downlink 3 11:40:33:elinks:INFO: Disabling clock on downlink 4 11:40:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:40:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:40:33:setup_element:INFO: Scanning clock phase 11:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:34:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:40:34:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 11:40:34:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 11:40:34:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:34:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:34:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:34:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 11:40:34:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:34:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 11:40:34:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2 11:40:34:setup_element:INFO: Scanning data phases 11:40:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:39:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:40:39:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________ Data delay found: 30 11:40:39:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 11:40:39:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________ Data delay found: 32 11:40:39:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________ Data delay found: 35 11:40:39:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________ Data delay found: 37 11:40:39:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________ Data delay found: 39 11:40:39:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 11:40:39:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXX________________ Data delay found: 39 11:40:39:setup_element:INFO: Setting the data phase to 30 for uplink 24 11:40:39:setup_element:INFO: Setting the data phase to 32 for uplink 25 11:40:39:setup_element:INFO: Setting the data phase to 32 for uplink 26 11:40:39:setup_element:INFO: Setting the data phase to 35 for uplink 27 11:40:39:setup_element:INFO: Setting the data phase to 37 for uplink 28 11:40:39:setup_element:INFO: Setting the data phase to 39 for uplink 29 11:40:39:setup_element:INFO: Setting the data phase to 39 for uplink 30 11:40:39:setup_element:INFO: Setting the data phase to 39 for uplink 31 11:40:39:setup_element:INFO: Beginning SMX ASICs map scan 11:40:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:40:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:40:39:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 11:40:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:40:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:40:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:40:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:40:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:40:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:40:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:40:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:40:42:setup_element:INFO: Performing Elink synchronization 11:40:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:40:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:40:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:40:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:40:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:40:42:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:40:42:ST3_emu_feb:DEBUG: Chip address: 0x1 11:40:42:ST3_emu_feb:DEBUG: Chip address: 0x3 11:40:42:ST3_emu_feb:DEBUG: Chip address: 0x5 11:40:42:ST3_emu_feb:DEBUG: Chip address: 0x7 11:40:42:febtest:INFO: Init all SMX (CSA): 30 11:40:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:40:50:febtest:INFO: 30-01 | XA-000-09-004-003-013-005-02 | 31.4 | 1147.8 11:40:50:febtest:INFO: 28-03 | XA-000-09-004-003-012-004-15 | 28.2 | 1159.7 11:40:50:febtest:INFO: 26-05 | XA-000-09-004-003-011-004-07 | 31.4 | 1147.8 11:40:50:febtest:INFO: 24-07 | XA-000-09-004-003-011-003-07 | 40.9 | 1118.1 11:40:51:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:40:53:ST3_smx:INFO: chip: 30-1 31.389742 C 1159.654860 mV 11:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:40:53:ST3_smx:INFO: Electrons 11:40:53:ST3_smx:INFO: # loops 0 11:40:55:ST3_smx:INFO: # loops 1 11:40:56:ST3_smx:INFO: # loops 2 11:40:58:ST3_smx:INFO: Total # of broken channels: 0 11:40:58:ST3_smx:INFO: List of broken channels: [] 11:40:58:ST3_smx:INFO: Total # of broken channels: 0 11:40:58:ST3_smx:INFO: List of broken channels: [] 11:41:00:ST3_smx:INFO: chip: 28-3 28.225000 C 1165.571835 mV 11:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:00:ST3_smx:INFO: Electrons 11:41:00:ST3_smx:INFO: # loops 0 11:41:02:ST3_smx:INFO: # loops 1 11:41:03:ST3_smx:INFO: # loops 2 11:41:05:ST3_smx:INFO: Total # of broken channels: 0 11:41:05:ST3_smx:INFO: List of broken channels: [] 11:41:05:ST3_smx:INFO: Total # of broken channels: 0 11:41:05:ST3_smx:INFO: List of broken channels: [] 11:41:07:ST3_smx:INFO: chip: 26-5 31.389742 C 1159.654860 mV 11:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:07:ST3_smx:INFO: Electrons 11:41:07:ST3_smx:INFO: # loops 0 11:41:08:ST3_smx:INFO: # loops 1 11:41:10:ST3_smx:INFO: # loops 2 11:41:11:ST3_smx:INFO: Total # of broken channels: 0 11:41:11:ST3_smx:INFO: List of broken channels: [] 11:41:11:ST3_smx:INFO: Total # of broken channels: 0 11:41:11:ST3_smx:INFO: List of broken channels: [] 11:41:13:ST3_smx:INFO: chip: 24-7 40.898880 C 1129.995435 mV 11:41:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:41:13:ST3_smx:INFO: Electrons 11:41:13:ST3_smx:INFO: # loops 0 11:41:15:ST3_smx:INFO: # loops 1 11:41:16:ST3_smx:INFO: # loops 2 11:41:18:ST3_smx:INFO: Total # of broken channels: 0 11:41:18:ST3_smx:INFO: List of broken channels: [] 11:41:18:ST3_smx:INFO: Total # of broken channels: 0 11:41:18:ST3_smx:INFO: List of broken channels: [] 11:41:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:41:18:febtest:INFO: 30-01 | XA-000-09-004-003-013-005-02 | 31.4 | 1177.4 11:41:19:febtest:INFO: 28-03 | XA-000-09-004-003-012-004-15 | 25.1 | 1189.2 11:41:19:febtest:INFO: 26-05 | XA-000-09-004-003-011-004-07 | 31.4 | 1183.3 11:41:19:febtest:INFO: 24-07 | XA-000-09-004-003-011-003-07 | 40.9 | 1147.8 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_07-11_40_31 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2249| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7408', '1.848', '1.5620'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0070', '1.850', '1.3290'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '0.2722']