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FEB_2251 02.10.24 08:39:57
Info
08:39:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:39:57:ST3_Shared:INFO: FEB-ASIC
08:39:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:39:57:febtest:INFO: Testing FEB with SN 2251
08:39:59:smx_tester:INFO: Scanning setup
08:39:59:elinks:INFO: Disabling clock on downlink 0
08:39:59:elinks:INFO: Disabling clock on downlink 1
08:39:59:elinks:INFO: Disabling clock on downlink 2
08:39:59:elinks:INFO: Disabling clock on downlink 3
08:39:59:elinks:INFO: Disabling clock on downlink 4
08:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:59:elinks:INFO: Disabling clock on downlink 0
08:39:59:elinks:INFO: Disabling clock on downlink 1
08:39:59:elinks:INFO: Disabling clock on downlink 2
08:39:59:elinks:INFO: Disabling clock on downlink 3
08:39:59:elinks:INFO: Disabling clock on downlink 4
08:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:59:elinks:INFO: Disabling clock on downlink 0
08:39:59:elinks:INFO: Disabling clock on downlink 1
08:39:59:elinks:INFO: Disabling clock on downlink 2
08:39:59:elinks:INFO: Disabling clock on downlink 3
08:39:59:elinks:INFO: Disabling clock on downlink 4
08:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:39:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:59:elinks:INFO: Disabling clock on downlink 0
08:39:59:elinks:INFO: Disabling clock on downlink 1
08:39:59:elinks:INFO: Disabling clock on downlink 2
08:39:59:elinks:INFO: Disabling clock on downlink 3
08:39:59:elinks:INFO: Disabling clock on downlink 4
08:39:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:39:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:00:elinks:INFO: Disabling clock on downlink 0
08:40:00:elinks:INFO: Disabling clock on downlink 1
08:40:00:elinks:INFO: Disabling clock on downlink 2
08:40:00:elinks:INFO: Disabling clock on downlink 3
08:40:00:elinks:INFO: Disabling clock on downlink 4
08:40:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:40:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:40:00:setup_element:INFO: Scanning clock phase
08:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:40:00:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:40:00:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
08:40:00:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:40:00:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
08:40:00:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:40:00:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
08:40:00:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:40:00:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:40:00:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
08:40:00:setup_element:INFO: Scanning data phases
08:40:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:05:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:40:05:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX__________________________
Data delay found: 30
08:40:05:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
08:40:05:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
08:40:05:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________
Data delay found: 36
08:40:05:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
08:40:05:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX________________
Data delay found: 0
08:40:05:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
08:40:05:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
08:40:05:setup_element:INFO: Setting the data phase to 30 for uplink 24
08:40:05:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:40:05:setup_element:INFO: Setting the data phase to 32 for uplink 26
08:40:05:setup_element:INFO: Setting the data phase to 36 for uplink 27
08:40:05:setup_element:INFO: Setting the data phase to 37 for uplink 28
08:40:05:setup_element:INFO: Setting the data phase to 0 for uplink 29
08:40:05:setup_element:INFO: Setting the data phase to 38 for uplink 30
08:40:05:setup_element:INFO: Setting the data phase to 37 for uplink 31
08:40:05:setup_element:INFO: Beginning SMX ASICs map scan
08:40:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:40:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:40:05:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:40:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:40:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:40:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:40:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:40:08:setup_element:INFO: Performing Elink synchronization
08:40:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:40:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:40:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:40:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:40:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:40:08:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:40:08:ST3_emu_feb:DEBUG: Chip address: 0x1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
08:40:08:ST3_emu_feb:DEBUG: Chip address: 0x3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
08:40:08:ST3_emu_feb:DEBUG: Chip address: 0x5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
08:40:08:ST3_emu_feb:DEBUG: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
08:40:09:febtest:INFO: Init all SMX (CSA): 30
08:40:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:40:16:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1218.6
08:40:17:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 28.2 | 1195.1
08:40:17:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0
08:40:17:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 18.7 | 1206.9
08:40:18:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:40:20:ST3_smx:INFO: chip: 30-1 21.902970 C 1230.330540 mV
08:40:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:20:ST3_smx:INFO: Electrons
08:40:20:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:40:23:ST3_smx:INFO: ----> Checking Analog response
08:40:23:ST3_smx:INFO: ----> Checking broken channels
08:40:23:ST3_smx:INFO: Total # broken ch: 8
08:40:23:ST3_smx:INFO: List FAST: [6, 30, 67, 86, 89, 112, 117, 122]
08:40:23:ST3_smx:INFO: List SLOW: []
08:40:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:23:ST3_smx:INFO: Holes
08:40:23:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:40:26:ST3_smx:INFO: ----> Checking Analog response
08:40:26:ST3_smx:INFO: ----> Checking broken channels
08:40:26:ST3_smx:INFO: Total # broken ch: 8
08:40:26:ST3_smx:INFO: List FAST: [6, 30, 67, 86, 89, 112, 117, 122]
08:40:26:ST3_smx:INFO: List SLOW: []
08:40:28:ST3_smx:INFO: chip: 28-3 28.225000 C 1200.969315 mV
08:40:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:28:ST3_smx:INFO: Electrons
08:40:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:40:30:ST3_smx:INFO: ----> Checking Analog response
08:40:30:ST3_smx:INFO: ----> Checking broken channels
08:40:31:ST3_smx:INFO: Total # broken ch: 3
08:40:31:ST3_smx:INFO: List FAST: [7, 16, 113]
08:40:31:ST3_smx:INFO: List SLOW: []
08:40:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:31:ST3_smx:INFO: Holes
08:40:31:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:40:34:ST3_smx:INFO: ----> Checking Analog response
08:40:34:ST3_smx:INFO: ----> Checking broken channels
08:40:34:ST3_smx:INFO: Total # broken ch: 3
08:40:34:ST3_smx:INFO: List FAST: [7, 16, 113]
08:40:34:ST3_smx:INFO: List SLOW: []
08:40:35:ST3_smx:INFO: chip: 26-5 357.000000 C 0.000000 mV
08:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:35:ST3_smx:INFO: Electrons
08:40:35:ST3_smx:INFO: Injected pulses: 255LSB, amp_cal 14.280000 fC
08:40:57:ST3_smx:INFO: ----> Checking Analog response
08:40:57:ST3_smx:INFO: ----> Checking broken channels
08:41:05:ST3_smx:INFO: Total # broken ch: 0
08:41:05:ST3_smx:INFO: List FAST: []
08:41:05:ST3_smx:INFO: List SLOW: []
08:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:41:05:ST3_smx:INFO: Holes
08:41:05:ST3_smx:INFO: Injected pulses: 255LSB, amp_cal 14.280000 fC
08:41:56:ST3_smx:INFO: ----> Checking Analog response
08:41:56:ST3_smx:INFO: ----> Checking broken channels
08:42:04:ST3_smx:INFO: Total # broken ch: 0
08:42:04:ST3_smx:INFO: List FAST: []
08:42:04:ST3_smx:INFO: List SLOW: []
08:42:05:ST3_smx:INFO: chip: 24-7 21.902970 C 1212.728715 mV
08:42:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:42:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:42:06:ST3_smx:INFO: Electrons
08:42:06:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:42:08:ST3_smx:INFO: ----> Checking Analog response
08:42:08:ST3_smx:INFO: ----> Checking broken channels
08:42:09:ST3_smx:INFO: Total # broken ch: 5
08:42:09:ST3_smx:INFO: List FAST: [23, 69, 81, 98, 109]
08:42:09:ST3_smx:INFO: List SLOW: []
08:42:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:42:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:42:09:ST3_smx:INFO: Holes
08:42:09:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
08:42:12:ST3_smx:INFO: ----> Checking Analog response
08:42:12:ST3_smx:INFO: ----> Checking broken channels
08:42:12:ST3_smx:INFO: Total # broken ch: 5
08:42:12:ST3_smx:INFO: List FAST: [23, 69, 81, 98, 109]
08:42:12:ST3_smx:INFO: List SLOW: []
08:42:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:42:12:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1265.4
08:42:13:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 31.4 | 1224.5
08:42:13:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0
08:42:13:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 21.9 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_10_02-08_39_57
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2251| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
MODULE_NAME
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VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0010', '1.848', '1.3360']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0260', '1.850', '1.2200']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '0.4463']