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FEB_2251 02.10.24 09:06:19
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09:06:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:19:ST3_Shared:INFO: FEB-Microcable
09:06:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:20:febtest:INFO: Testing FEB with SN 2251
09:06:21:smx_tester:INFO: Scanning setup
09:06:21:elinks:INFO: Disabling clock on downlink 0
09:06:21:elinks:INFO: Disabling clock on downlink 1
09:06:21:elinks:INFO: Disabling clock on downlink 2
09:06:21:elinks:INFO: Disabling clock on downlink 3
09:06:21:elinks:INFO: Disabling clock on downlink 4
09:06:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:06:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:21:elinks:INFO: Disabling clock on downlink 0
09:06:21:elinks:INFO: Disabling clock on downlink 1
09:06:21:elinks:INFO: Disabling clock on downlink 2
09:06:21:elinks:INFO: Disabling clock on downlink 3
09:06:21:elinks:INFO: Disabling clock on downlink 4
09:06:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:06:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:21:elinks:INFO: Disabling clock on downlink 0
09:06:21:elinks:INFO: Disabling clock on downlink 1
09:06:21:elinks:INFO: Disabling clock on downlink 2
09:06:21:elinks:INFO: Disabling clock on downlink 3
09:06:21:elinks:INFO: Disabling clock on downlink 4
09:06:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:06:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:06:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:21:elinks:INFO: Disabling clock on downlink 0
09:06:21:elinks:INFO: Disabling clock on downlink 1
09:06:21:elinks:INFO: Disabling clock on downlink 2
09:06:21:elinks:INFO: Disabling clock on downlink 3
09:06:21:elinks:INFO: Disabling clock on downlink 4
09:06:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:06:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:22:elinks:INFO: Disabling clock on downlink 0
09:06:22:elinks:INFO: Disabling clock on downlink 1
09:06:22:elinks:INFO: Disabling clock on downlink 2
09:06:22:elinks:INFO: Disabling clock on downlink 3
09:06:22:elinks:INFO: Disabling clock on downlink 4
09:06:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:06:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:06:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:06:22:setup_element:INFO: Scanning clock phase
09:06:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:06:22:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:06:22:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:06:22:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:06:22:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:06:22:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:22:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:22:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:06:22:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:06:22:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:06:22:setup_element:INFO: Scanning data phases
09:06:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:27:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:06:27:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
09:06:27:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
09:06:27:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
09:06:27:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
09:06:27:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
09:06:27:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
09:06:27:setup_element:INFO: Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
09:06:27:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
09:06:27:setup_element:INFO: Setting the data phase to 29 for uplink 24
09:06:27:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:06:27:setup_element:INFO: Setting the data phase to 32 for uplink 26
09:06:27:setup_element:INFO: Setting the data phase to 35 for uplink 27
09:06:27:setup_element:INFO: Setting the data phase to 36 for uplink 28
09:06:27:setup_element:INFO: Setting the data phase to 39 for uplink 29
09:06:27:setup_element:INFO: Setting the data phase to 37 for uplink 30
09:06:27:setup_element:INFO: Setting the data phase to 37 for uplink 31
09:06:27:setup_element:INFO: Beginning SMX ASICs map scan
09:06:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:06:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:06:27:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:06:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:06:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:06:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:06:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:06:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:06:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:06:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:06:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:06:30:setup_element:INFO: Performing Elink synchronization
09:06:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:06:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:06:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:06:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:06:30:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:06:30:ST3_emu_feb:DEBUG: Chip address: 0x1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
09:06:30:ST3_emu_feb:DEBUG: Chip address: 0x3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
09:06:30:ST3_emu_feb:DEBUG: Chip address: 0x5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
09:06:30:ST3_emu_feb:DEBUG: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
09:06:30:febtest:INFO: Init all SMX (CSA): 30
09:06:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:06:38:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1218.6
09:06:38:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 28.2 | 1195.1
09:06:39:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | -432.3 | 1578.5
09:06:39:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 18.7 | 1206.9
09:06:40:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:06:42:ST3_smx:INFO: chip: 30-1 21.902970 C 1230.330540 mV
09:06:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:42:ST3_smx:INFO: Electrons
09:06:42:ST3_smx:INFO: # loops 0
09:06:44:ST3_smx:INFO: # loops 1
09:06:45:ST3_smx:INFO: # loops 2
09:06:47:ST3_smx:INFO: Total # of broken channels: 0
09:06:47:ST3_smx:INFO: List of broken channels: []
09:06:47:ST3_smx:INFO: Total # of broken channels: 0
09:06:47:ST3_smx:INFO: List of broken channels: []
09:06:49:ST3_smx:INFO: chip: 28-3 28.225000 C 1200.969315 mV
09:06:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:49:ST3_smx:INFO: Electrons
09:06:49:ST3_smx:INFO: # loops 0
09:06:50:ST3_smx:INFO: # loops 1
09:06:52:ST3_smx:INFO: # loops 2
09:06:54:ST3_smx:INFO: Total # of broken channels: 0
09:06:54:ST3_smx:INFO: List of broken channels: []
09:06:54:ST3_smx:INFO: Total # of broken channels: 0
09:06:54:ST3_smx:INFO: List of broken channels: []
09:06:55:ST3_smx:INFO: chip: 26-5 -432.266438 C 1578.532875 mV
09:06:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:55:ST3_smx:INFO: Electrons
09:06:55:ST3_smx:INFO: # loops 0
09:06:57:ST3_smx:INFO: # loops 1
09:06:59:ST3_smx:INFO: # loops 2
09:07:00:ST3_smx:INFO: Total # of broken channels: 0
09:07:00:ST3_smx:INFO: List of broken channels: []
09:07:00:ST3_smx:INFO: Total # of broken channels: 0
09:07:00:ST3_smx:INFO: List of broken channels: []
09:07:09:ST3_smx:INFO: chip: 24-7 21.902970 C 1212.728715 mV
09:07:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:07:09:ST3_smx:INFO: Electrons
09:07:09:ST3_smx:INFO: # loops 0
09:07:11:ST3_smx:INFO: # loops 1
09:07:13:ST3_smx:INFO: # loops 2
09:07:14:ST3_smx:INFO: Total # of broken channels: 0
09:07:14:ST3_smx:INFO: List of broken channels: []
09:07:14:ST3_smx:INFO: Total # of broken channels: 0
09:07:14:ST3_smx:INFO: List of broken channels: []
09:07:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:07:15:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1265.4
09:07:15:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 28.2 | 1230.3
09:07:15:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | -432.3 | 1578.5
09:07:15:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 21.9 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_02-09_06_19
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2251| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.848', '1.4510']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0200', '1.850', '1.2190']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9959', '1.850', '0.4447']