
FEB_2251 02.10.24 14:13:24
TextEdit.txt
14:13:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:13:24:ST3_Shared:INFO: FEB-Microcable 14:13:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:13:24:febtest:INFO: Testing FEB with SN 2251 14:13:26:smx_tester:INFO: Scanning setup 14:13:26:elinks:INFO: Disabling clock on downlink 0 14:13:26:elinks:INFO: Disabling clock on downlink 1 14:13:26:elinks:INFO: Disabling clock on downlink 2 14:13:26:elinks:INFO: Disabling clock on downlink 3 14:13:26:elinks:INFO: Disabling clock on downlink 4 14:13:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:13:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:26:elinks:INFO: Disabling clock on downlink 0 14:13:26:elinks:INFO: Disabling clock on downlink 1 14:13:26:elinks:INFO: Disabling clock on downlink 2 14:13:26:elinks:INFO: Disabling clock on downlink 3 14:13:26:elinks:INFO: Disabling clock on downlink 4 14:13:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:13:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:26:elinks:INFO: Disabling clock on downlink 0 14:13:26:elinks:INFO: Disabling clock on downlink 1 14:13:26:elinks:INFO: Disabling clock on downlink 2 14:13:26:elinks:INFO: Disabling clock on downlink 3 14:13:26:elinks:INFO: Disabling clock on downlink 4 14:13:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:13:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:13:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:26:elinks:INFO: Disabling clock on downlink 0 14:13:26:elinks:INFO: Disabling clock on downlink 1 14:13:26:elinks:INFO: Disabling clock on downlink 2 14:13:26:elinks:INFO: Disabling clock on downlink 3 14:13:26:elinks:INFO: Disabling clock on downlink 4 14:13:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:13:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:26:elinks:INFO: Disabling clock on downlink 0 14:13:26:elinks:INFO: Disabling clock on downlink 1 14:13:26:elinks:INFO: Disabling clock on downlink 2 14:13:26:elinks:INFO: Disabling clock on downlink 3 14:13:26:elinks:INFO: Disabling clock on downlink 4 14:13:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:13:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:26:setup_element:INFO: Scanning clock phase 14:13:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:13:27:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 14:13:27:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 14:13:27:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:13:27:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 14:13:27:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:13:27:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:13:27:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 14:13:27:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:13:27:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:13:27:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:13:27:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 14:13:27:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 14:13:27:setup_element:INFO: Scanning data phases 14:13:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:32:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:13:32:setup_element:INFO: Eye window for uplink 16: X____________________________________XXX Data delay found: 18 14:13:32:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_ Data delay found: 16 14:13:32:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 14:13:32:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXX_ Data delay found: 17 14:13:32:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX Data delay found: 17 14:13:32:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 14:13:32:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX Data delay found: 19 14:13:32:setup_element:INFO: Eye window for uplink 23: XXXXXX_____________________________XXXXX Data delay found: 20 14:13:32:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 14:13:32:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________ Data delay found: 30 14:13:32:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________ Data delay found: 31 14:13:32:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________ Data delay found: 35 14:13:32:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________ Data delay found: 37 14:13:32:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX________________ Data delay found: 0 14:13:32:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________ Data delay found: 38 14:13:32:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________ Data delay found: 38 14:13:32:setup_element:INFO: Setting the data phase to 18 for uplink 16 14:13:32:setup_element:INFO: Setting the data phase to 16 for uplink 17 14:13:32:setup_element:INFO: Setting the data phase to 19 for uplink 18 14:13:32:setup_element:INFO: Setting the data phase to 17 for uplink 19 14:13:32:setup_element:INFO: Setting the data phase to 17 for uplink 20 14:13:32:setup_element:INFO: Setting the data phase to 16 for uplink 21 14:13:32:setup_element:INFO: Setting the data phase to 19 for uplink 22 14:13:32:setup_element:INFO: Setting the data phase to 20 for uplink 23 14:13:32:setup_element:INFO: Setting the data phase to 28 for uplink 24 14:13:32:setup_element:INFO: Setting the data phase to 30 for uplink 25 14:13:32:setup_element:INFO: Setting the data phase to 31 for uplink 26 14:13:32:setup_element:INFO: Setting the data phase to 35 for uplink 27 14:13:32:setup_element:INFO: Setting the data phase to 37 for uplink 28 14:13:32:setup_element:INFO: Setting the data phase to 0 for uplink 29 14:13:32:setup_element:INFO: Setting the data phase to 38 for uplink 30 14:13:32:setup_element:INFO: Setting the data phase to 38 for uplink 31 14:13:32:setup_element:INFO: Beginning SMX ASICs map scan 14:13:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:13:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:13:32:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:13:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:13:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:13:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:13:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:13:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:13:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:13:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:13:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:13:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:13:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:13:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:13:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:13:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:13:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:13:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:13:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:13:35:setup_element:INFO: Performing Elink synchronization 14:13:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:13:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:13:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:13:35:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x0 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x2 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x3 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x4 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x5 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x6 14:13:36:ST3_emu_feb:DEBUG: Chip address: 0x7 14:13:36:febtest:INFO: Init all SMX (CSA): 30 14:13:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:13:50:febtest:INFO: 23-00 | XA-018-08-003-000-006-051-10 | 21.9 | 1230.3 14:13:50:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1230.3 14:13:50:febtest:INFO: 21-02 | XA-000-08-003-000-006-028-06 | 34.6 | 1183.3 14:13:50:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 31.4 | 1189.2 14:13:51:febtest:INFO: 19-04 | XA-000-08-003-000-006-048-08 | 25.1 | 1224.5 14:13:51:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0 14:13:51:febtest:INFO: 17-06 | XA-017-08-003-000-006-051-14 | 34.6 | 1177.4 14:13:51:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 25.1 | 1201.0 14:13:52:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:13:54:ST3_smx:INFO: chip: 23-0 21.902970 C 1247.887635 mV 14:13:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:54:ST3_smx:INFO: Electrons 14:13:54:ST3_smx:INFO: # loops 0 14:13:56:ST3_smx:INFO: # loops 1 14:13:58:ST3_smx:INFO: # loops 2 14:13:59:ST3_smx:INFO: Total # of broken channels: 1 14:13:59:ST3_smx:INFO: List of broken channels: [78] 14:13:59:ST3_smx:INFO: Total # of broken channels: 1 14:13:59:ST3_smx:INFO: List of broken channels: [78] 14:14:01:ST3_smx:INFO: chip: 30-1 21.902970 C 1242.040240 mV 14:14:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:01:ST3_smx:INFO: Electrons 14:14:01:ST3_smx:INFO: # loops 0 14:14:03:ST3_smx:INFO: # loops 1 14:14:04:ST3_smx:INFO: # loops 2 14:14:06:ST3_smx:INFO: Total # of broken channels: 1 14:14:06:ST3_smx:INFO: List of broken channels: [69] 14:14:06:ST3_smx:INFO: Total # of broken channels: 1 14:14:06:ST3_smx:INFO: List of broken channels: [118] 14:14:07:ST3_smx:INFO: chip: 21-2 34.556970 C 1195.082160 mV 14:14:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:07:ST3_smx:INFO: Electrons 14:14:08:ST3_smx:INFO: # loops 0 14:14:09:ST3_smx:INFO: # loops 1 14:14:11:ST3_smx:INFO: # loops 2 14:14:12:ST3_smx:INFO: Total # of broken channels: 4 14:14:12:ST3_smx:INFO: List of broken channels: [80, 82, 108, 124] 14:14:12:ST3_smx:INFO: Total # of broken channels: 62 14:14:12:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126] 14:14:14:ST3_smx:INFO: chip: 28-3 34.556970 C 1200.969315 mV 14:14:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:14:ST3_smx:INFO: Electrons 14:14:14:ST3_smx:INFO: # loops 0 14:14:16:ST3_smx:INFO: # loops 1 14:14:17:ST3_smx:INFO: # loops 2 14:14:19:ST3_smx:INFO: Total # of broken channels: 0 14:14:19:ST3_smx:INFO: List of broken channels: [] 14:14:19:ST3_smx:INFO: Total # of broken channels: 6 14:14:19:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 16, 74] 14:14:20:ST3_smx:INFO: chip: 19-4 25.062742 C 1242.040240 mV 14:14:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:20:ST3_smx:INFO: Electrons 14:14:20:ST3_smx:INFO: # loops 0 14:14:22:ST3_smx:INFO: # loops 1 14:14:23:ST3_smx:INFO: # loops 2 14:14:25:ST3_smx:INFO: Total # of broken channels: 0 14:14:25:ST3_smx:INFO: List of broken channels: [] 14:14:25:ST3_smx:INFO: Total # of broken channels: 5 14:14:25:ST3_smx:INFO: List of broken channels: [6, 10, 16, 20, 28] 14:14:27:ST3_smx:INFO: chip: 26-5 357.000000 C 0.000000 mV 14:14:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:27:ST3_smx:INFO: Electrons 14:14:27:ST3_smx:INFO: # loops 0 14:14:29:ST3_smx:INFO: # loops 1 14:14:30:ST3_smx:INFO: # loops 2 14:14:32:ST3_smx:INFO: Total # of broken channels: 0 14:14:32:ST3_smx:INFO: List of broken channels: [] 14:14:32:ST3_smx:INFO: Total # of broken channels: 0 14:14:32:ST3_smx:INFO: List of broken channels: [] 14:14:41:ST3_smx:INFO: chip: 17-6 37.726682 C 1189.190035 mV 14:14:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:41:ST3_smx:INFO: Electrons 14:14:41:ST3_smx:INFO: # loops 0 14:14:43:ST3_smx:INFO: # loops 1 14:14:44:ST3_smx:INFO: # loops 2 14:14:46:ST3_smx:INFO: Total # of broken channels: 1 14:14:46:ST3_smx:INFO: List of broken channels: [0] 14:14:46:ST3_smx:INFO: Total # of broken channels: 1 14:14:46:ST3_smx:INFO: List of broken channels: [0] 14:14:48:ST3_smx:INFO: chip: 24-7 28.225000 C 1212.728715 mV 14:14:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:48:ST3_smx:INFO: Electrons 14:14:48:ST3_smx:INFO: # loops 0 14:14:49:ST3_smx:INFO: # loops 1 14:14:51:ST3_smx:INFO: # loops 2 14:14:53:ST3_smx:INFO: Total # of broken channels: 0 14:14:53:ST3_smx:INFO: List of broken channels: [] 14:14:53:ST3_smx:INFO: Total # of broken channels: 0 14:14:53:ST3_smx:INFO: List of broken channels: [] 14:14:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:14:53:febtest:INFO: 23-00 | XA-018-08-003-000-006-051-10 | 21.9 | 1294.5 14:14:53:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 21.9 | 1294.5 14:14:54:febtest:INFO: 21-02 | XA-000-08-003-000-006-028-06 | 37.7 | 1218.6 14:14:54:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 34.6 | 1236.2 14:14:54:febtest:INFO: 19-04 | XA-000-08-003-000-006-048-08 | 25.1 | 1277.1 14:14:54:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0 14:14:55:febtest:INFO: 17-06 | XA-017-08-003-000-006-051-14 | 37.7 | 1212.7 14:14:55:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 28.2 | 1230.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_02-14_13_24 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2251| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9350', '1.848', '2.3210'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0420', '1.850', '2.5330'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.7046']