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FEB_2251 07.10.24 14:45:08
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14:45:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:08:ST3_Shared:INFO: FEB-Microcable
14:45:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:08:febtest:INFO: Testing FEB with SN 2251
14:45:10:smx_tester:INFO: Scanning setup
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:45:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:setup_element:INFO: Scanning clock phase
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:45:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:45:11:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXX________
Clock Delay: 30
14:45:11:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXX________
Clock Delay: 30
14:45:11:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:45:11:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:45:11:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:45:11:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:11:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:45:11:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:45:11:setup_element:INFO: Scanning data phases
14:45:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:45:16:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:45:16:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
14:45:16:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
14:45:16:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
14:45:16:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXX_
Data delay found: 17
14:45:16:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX
Data delay found: 17
14:45:16:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
14:45:16:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
14:45:16:setup_element:INFO: Eye window for uplink 23: XXXXXX______________________________XXXX
Data delay found: 20
14:45:16:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
14:45:16:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________
Data delay found: 30
14:45:16:setup_element:INFO: Eye window for uplink 26: __________XXXX__________________________
Data delay found: 31
14:45:16:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
14:45:16:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
14:45:16:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXX________________
Data delay found: 0
14:45:16:setup_element:INFO: Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
14:45:16:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
14:45:16:setup_element:INFO: Setting the data phase to 18 for uplink 16
14:45:16:setup_element:INFO: Setting the data phase to 16 for uplink 17
14:45:16:setup_element:INFO: Setting the data phase to 19 for uplink 18
14:45:16:setup_element:INFO: Setting the data phase to 17 for uplink 19
14:45:16:setup_element:INFO: Setting the data phase to 17 for uplink 20
14:45:16:setup_element:INFO: Setting the data phase to 16 for uplink 21
14:45:16:setup_element:INFO: Setting the data phase to 19 for uplink 22
14:45:16:setup_element:INFO: Setting the data phase to 20 for uplink 23
14:45:16:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:45:16:setup_element:INFO: Setting the data phase to 30 for uplink 25
14:45:16:setup_element:INFO: Setting the data phase to 31 for uplink 26
14:45:16:setup_element:INFO: Setting the data phase to 35 for uplink 27
14:45:16:setup_element:INFO: Setting the data phase to 37 for uplink 28
14:45:16:setup_element:INFO: Setting the data phase to 0 for uplink 29
14:45:16:setup_element:INFO: Setting the data phase to 38 for uplink 30
14:45:16:setup_element:INFO: Setting the data phase to 38 for uplink 31
14:45:16:setup_element:INFO: Beginning SMX ASICs map scan
14:45:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:45:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:45:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:45:16:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:45:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:45:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:45:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:45:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:45:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:45:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:45:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:45:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:45:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:45:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:45:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:45:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:45:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:45:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:45:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:45:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:45:19:setup_element:INFO: Performing Elink synchronization
14:45:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:45:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:45:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:45:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:45:19:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x0
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x1
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x2
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x3
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x4
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x5
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x6
14:45:20:ST3_emu_feb:DEBUG: Chip address: 0x7
14:45:20:febtest:INFO: Init all SMX (CSA): 30
14:45:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:34:febtest:INFO: 23-00 | XA-018-08-003-000-006-051-10 | 15.6 | 1236.2
14:45:34:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 18.7 | 1224.5
14:45:35:febtest:INFO: 21-02 | XA-000-08-003-000-006-028-06 | 28.2 | 1189.2
14:45:35:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 28.2 | 1189.2
14:45:35:febtest:INFO: 19-04 | XA-000-08-003-000-006-048-08 | 18.7 | 1230.3
14:45:35:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0
14:45:36:febtest:INFO: 17-06 | XA-017-08-003-000-006-051-14 | 34.6 | 1177.4
14:45:36:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 21.9 | 1201.0
14:45:37:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:45:39:ST3_smx:INFO: chip: 23-0 15.590880 C 1253.730060 mV
14:45:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:39:ST3_smx:INFO: Electrons
14:45:39:ST3_smx:INFO: # loops 0
14:45:41:ST3_smx:INFO: # loops 1
14:45:42:ST3_smx:INFO: # loops 2
14:45:44:ST3_smx:INFO: Total # of broken channels: 0
14:45:44:ST3_smx:INFO: List of broken channels: []
14:45:44:ST3_smx:INFO: Total # of broken channels: 51
14:45:44:ST3_smx:INFO: List of broken channels: [2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 108]
14:45:46:ST3_smx:INFO: chip: 30-1 15.590880 C 1236.187875 mV
14:45:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:46:ST3_smx:INFO: Electrons
14:45:46:ST3_smx:INFO: # loops 0
14:45:47:ST3_smx:INFO: # loops 1
14:45:49:ST3_smx:INFO: # loops 2
14:45:51:ST3_smx:INFO: Total # of broken channels: 0
14:45:51:ST3_smx:INFO: List of broken channels: []
14:45:51:ST3_smx:INFO: Total # of broken channels: 0
14:45:51:ST3_smx:INFO: List of broken channels: []
14:45:52:ST3_smx:INFO: chip: 21-2 28.225000 C 1200.969315 mV
14:45:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:52:ST3_smx:INFO: Electrons
14:45:52:ST3_smx:INFO: # loops 0
14:45:54:ST3_smx:INFO: # loops 1
14:45:55:ST3_smx:INFO: # loops 2
14:45:57:ST3_smx:INFO: Total # of broken channels: 0
14:45:57:ST3_smx:INFO: List of broken channels: []
14:45:57:ST3_smx:INFO: Total # of broken channels: 9
14:45:57:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14, 16, 18, 20]
14:45:59:ST3_smx:INFO: chip: 28-3 28.225000 C 1200.969315 mV
14:45:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:59:ST3_smx:INFO: Electrons
14:45:59:ST3_smx:INFO: # loops 0
14:46:00:ST3_smx:INFO: # loops 1
14:46:02:ST3_smx:INFO: # loops 2
14:46:04:ST3_smx:INFO: Total # of broken channels: 13
14:46:04:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27]
14:46:04:ST3_smx:INFO: Total # of broken channels: 29
14:46:04:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 57, 59, 65]
14:46:05:ST3_smx:INFO: chip: 19-4 18.745682 C 1242.040240 mV
14:46:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:05:ST3_smx:INFO: Electrons
14:46:05:ST3_smx:INFO: # loops 0
14:46:07:ST3_smx:INFO: # loops 1
14:46:09:ST3_smx:INFO: # loops 2
14:46:10:ST3_smx:INFO: Total # of broken channels: 0
14:46:10:ST3_smx:INFO: List of broken channels: []
14:46:10:ST3_smx:INFO: Total # of broken channels: 4
14:46:10:ST3_smx:INFO: List of broken channels: [4, 6, 16, 18]
14:46:12:ST3_smx:INFO: chip: 26-5 357.000000 C 0.000000 mV
14:46:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:12:ST3_smx:INFO: Electrons
14:46:12:ST3_smx:INFO: # loops 0
14:46:14:ST3_smx:INFO: # loops 1
14:46:15:ST3_smx:INFO: # loops 2
14:46:17:ST3_smx:INFO: Total # of broken channels: 0
14:46:17:ST3_smx:INFO: List of broken channels: []
14:46:17:ST3_smx:INFO: Total # of broken channels: 0
14:46:17:ST3_smx:INFO: List of broken channels: []
14:46:26:ST3_smx:INFO: chip: 17-6 34.556970 C 1189.190035 mV
14:46:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:26:ST3_smx:INFO: Electrons
14:46:26:ST3_smx:INFO: # loops 0
14:46:28:ST3_smx:INFO: # loops 1
14:46:29:ST3_smx:INFO: # loops 2
14:46:31:ST3_smx:INFO: Total # of broken channels: 1
14:46:31:ST3_smx:INFO: List of broken channels: [0]
14:46:31:ST3_smx:INFO: Total # of broken channels: 1
14:46:31:ST3_smx:INFO: List of broken channels: [0]
14:46:33:ST3_smx:INFO: chip: 24-7 25.062742 C 1212.728715 mV
14:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:33:ST3_smx:INFO: Electrons
14:46:33:ST3_smx:INFO: # loops 0
14:46:34:ST3_smx:INFO: # loops 1
14:46:36:ST3_smx:INFO: # loops 2
14:46:38:ST3_smx:INFO: Total # of broken channels: 0
14:46:38:ST3_smx:INFO: List of broken channels: []
14:46:38:ST3_smx:INFO: Total # of broken channels: 2
14:46:38:ST3_smx:INFO: List of broken channels: [4, 6]
14:46:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:46:38:febtest:INFO: 23-00 | XA-018-08-003-000-006-051-10 | 15.6 | 1288.7
14:46:38:febtest:INFO: 30-01 | XA-000-08-003-000-005-162-11 | 15.6 | 1271.2
14:46:39:febtest:INFO: 21-02 | XA-000-08-003-000-006-028-06 | 31.4 | 1224.5
14:46:39:febtest:INFO: 28-03 | XA-000-08-003-000-005-160-11 | 28.2 | 1230.3
14:46:39:febtest:INFO: 19-04 | XA-000-08-003-000-006-048-08 | 21.9 | 1277.1
14:46:39:febtest:INFO: 26-05 | XA-000-08-002-003-007-105-12 | 357.0 | 0.0
14:46:40:febtest:INFO: 17-06 | XA-017-08-003-000-006-051-14 | 34.6 | 1212.7
14:46:40:febtest:INFO: 24-07 | XA-019-08-003-000-006-051-09 | 25.1 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_07-14_45_08
OPERATOR : Oleksandr S.; Irakli K.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2251| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9340', '1.848', '2.2720']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0650', '1.850', '2.5050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.850', '0.6887']