13:39:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:39:11:ST3_Shared:INFO:	                         FEB-Sensor                         
13:39:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:39:43:ST3_ModuleSelector:INFO:	M3DR0B2000542A2
13:39:43:ST3_ModuleSelector:INFO:	
13:39:43:febtest:INFO:	Testing FEB with SN 2252
13:39:45:smx_tester:INFO:	Scanning setup
13:39:45:elinks:INFO:	Disabling clock on downlink 0
13:39:45:elinks:INFO:	Disabling clock on downlink 1
13:39:45:elinks:INFO:	Disabling clock on downlink 2
13:39:45:elinks:INFO:	Disabling clock on downlink 3
13:39:45:elinks:INFO:	Disabling clock on downlink 4
13:39:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:39:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:39:45:elinks:INFO:	Disabling clock on downlink 0
13:39:45:elinks:INFO:	Disabling clock on downlink 1
13:39:45:elinks:INFO:	Disabling clock on downlink 2
13:39:45:elinks:INFO:	Disabling clock on downlink 3
13:39:45:elinks:INFO:	Disabling clock on downlink 4
13:39:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:39:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:39:45:elinks:INFO:	Disabling clock on downlink 0
13:39:45:elinks:INFO:	Disabling clock on downlink 1
13:39:45:elinks:INFO:	Disabling clock on downlink 2
13:39:45:elinks:INFO:	Disabling clock on downlink 3
13:39:45:elinks:INFO:	Disabling clock on downlink 4
13:39:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:39:45:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:39:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:39:45:elinks:INFO:	Disabling clock on downlink 0
13:39:45:elinks:INFO:	Disabling clock on downlink 1
13:39:45:elinks:INFO:	Disabling clock on downlink 2
13:39:45:elinks:INFO:	Disabling clock on downlink 3
13:39:45:elinks:INFO:	Disabling clock on downlink 4
13:39:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:39:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:39:45:elinks:INFO:	Disabling clock on downlink 0
13:39:45:elinks:INFO:	Disabling clock on downlink 1
13:39:45:elinks:INFO:	Disabling clock on downlink 2
13:39:45:elinks:INFO:	Disabling clock on downlink 3
13:39:45:elinks:INFO:	Disabling clock on downlink 4
13:39:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:39:45:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:39:45:setup_element:INFO:	Scanning clock phase
13:39:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:39:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:46:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:39:46:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:39:46:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:39:46:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:39:46:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:39:46:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:39:46:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:39:46:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:46:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
13:39:46:setup_element:INFO:	Scanning data phases
13:39:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:39:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:51:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:39:51:setup_element:INFO:	Eye window for uplink 16: __________________________________XXXX__
Data delay found: 15
13:39:51:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
13:39:51:setup_element:INFO:	Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
13:39:51:setup_element:INFO:	Eye window for uplink 19: XX________________________________XXXXX_
Data delay found: 17
13:39:51:setup_element:INFO:	Eye window for uplink 20: X_____________________________XXXXXXXXXX
Data delay found: 15
13:39:51:setup_element:INFO:	Eye window for uplink 21: X_____________________________XXXXXXXXXX
Data delay found: 15
13:39:51:setup_element:INFO:	Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
13:39:51:setup_element:INFO:	Eye window for uplink 23: XXXXX_____________________________XXXXXX
Data delay found: 19
13:39:51:setup_element:INFO:	Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
13:39:51:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
13:39:51:setup_element:INFO:	Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
13:39:51:setup_element:INFO:	Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
13:39:51:setup_element:INFO:	Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
13:39:51:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
13:39:51:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
13:39:51:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_X___________________
Data delay found: 37
13:39:51:setup_element:INFO:	Setting the data phase to 15 for uplink 16
13:39:51:setup_element:INFO:	Setting the data phase to 14 for uplink 17
13:39:51:setup_element:INFO:	Setting the data phase to 19 for uplink 18
13:39:51:setup_element:INFO:	Setting the data phase to 17 for uplink 19
13:39:52:setup_element:INFO:	Setting the data phase to 15 for uplink 20
13:39:52:setup_element:INFO:	Setting the data phase to 15 for uplink 21
13:39:52:setup_element:INFO:	Setting the data phase to 18 for uplink 22
13:39:52:setup_element:INFO:	Setting the data phase to 19 for uplink 23
13:39:52:setup_element:INFO:	Setting the data phase to 31 for uplink 24
13:39:52:setup_element:INFO:	Setting the data phase to 33 for uplink 25
13:39:52:setup_element:INFO:	Setting the data phase to 31 for uplink 26
13:39:52:setup_element:INFO:	Setting the data phase to 35 for uplink 27
13:39:52:setup_element:INFO:	Setting the data phase to 35 for uplink 28
13:39:52:setup_element:INFO:	Setting the data phase to 38 for uplink 29
13:39:52:setup_element:INFO:	Setting the data phase to 36 for uplink 30
13:39:52:setup_element:INFO:	Setting the data phase to 37 for uplink 31
==============================================OOO==============================================
13:39:52:setup_element:INFO:	Beginning SMX ASICs map scan
13:39:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:39:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:39:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:39:52:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:39:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:39:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:39:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:39:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:39:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:39:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:39:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:39:52:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:39:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:39:52:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:39:52:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:39:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:39:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:39:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:39:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:39:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:39:54:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXXXXX__
      Uplink 19: _____________________________________________________________________XXXXXXXXX__
      Uplink 20: _____________________________________________________________________XXXXXXXX___
      Uplink 21: _____________________________________________________________________XXXXXXXX___
      Uplink 22: _____________________________________________________________________XXXXXXXX___
      Uplink 23: _____________________________________________________________________XXXXXXXX___
      Uplink 24: _____________________________________________________________________XXXXXXX____
      Uplink 25: _____________________________________________________________________XXXXXXX____
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ________________________________________________________________________________
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 17:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 18:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 32
      Eye Window: XX________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 15
      Window Length: 29
      Eye Window: X_____________________________XXXXXXXXXX
    Uplink 21:
      Optimal Phase: 15
      Window Length: 29
      Eye Window: X_____________________________XXXXXXXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 23:
      Optimal Phase: 19
      Window Length: 29
      Eye Window: XXXXX_____________________________XXXXXX
    Uplink 24:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXX_X___________________

==============================================OOO==============================================
13:39:54:setup_element:INFO:	Performing Elink synchronization
13:39:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:39:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:54:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:39:54:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:39:54:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:39:54:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:39:55:febtest:INFO:	Init all SMX (CSA): 30
13:40:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:40:11:febtest:INFO:	23-00 | XA-000-09-004-003-016-016-14 |  18.7 | 1218.6
13:40:11:febtest:INFO:	30-01 | XA-000-09-004-003-016-018-14 |  18.7 | 1218.6
13:40:11:febtest:INFO:	21-02 | XA-000-09-004-003-017-016-03 |  28.2 | 1183.3
13:40:12:febtest:INFO:	28-03 | XA-000-09-004-003-015-020-06 |  34.6 | 1165.6
13:40:12:febtest:INFO:	19-04 | XA-000-09-004-003-016-019-14 |  34.6 | 1171.5
13:40:12:febtest:INFO:	26-05 | XA-000-09-004-003-017-019-03 |  28.2 | 1183.3
13:40:12:febtest:INFO:	17-06 | XA-000-09-004-003-016-015-09 |  34.6 | 1141.9
13:40:13:febtest:INFO:	24-07 | XA-000-09-004-003-017-017-03 |  37.7 | 1159.7
13:40:14:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:40:16:ST3_smx:INFO:	chip: 23-0 	 18.745682 C 	 1230.330540 mV
13:40:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:16:ST3_smx:INFO:		Electrons
13:40:16:ST3_smx:INFO:	# loops 0
13:40:17:ST3_smx:INFO:	# loops 1
13:40:19:ST3_smx:INFO:	# loops 2
13:40:21:ST3_smx:INFO:	# loops 3
13:40:22:ST3_smx:INFO:	# loops 4
13:40:24:ST3_smx:INFO:	Total # of broken channels: 0
13:40:24:ST3_smx:INFO:	List of broken channels: []
13:40:24:ST3_smx:INFO:	Total # of broken channels: 0
13:40:24:ST3_smx:INFO:	List of broken channels: []
13:40:25:ST3_smx:INFO:	chip: 30-1 	 18.745682 C 	 1230.330540 mV
13:40:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:25:ST3_smx:INFO:		Electrons
13:40:26:ST3_smx:INFO:	# loops 0
13:40:27:ST3_smx:INFO:	# loops 1
13:40:29:ST3_smx:INFO:	# loops 2
13:40:30:ST3_smx:INFO:	# loops 3
13:40:32:ST3_smx:INFO:	# loops 4
13:40:34:ST3_smx:INFO:	Total # of broken channels: 0
13:40:34:ST3_smx:INFO:	List of broken channels: []
13:40:34:ST3_smx:INFO:	Total # of broken channels: 2
13:40:34:ST3_smx:INFO:	List of broken channels: [0, 1]
13:40:35:ST3_smx:INFO:	chip: 21-2 	 28.225000 C 	 1200.969315 mV
13:40:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:35:ST3_smx:INFO:		Electrons
13:40:35:ST3_smx:INFO:	# loops 0
13:40:37:ST3_smx:INFO:	# loops 1
13:40:38:ST3_smx:INFO:	# loops 2
13:40:40:ST3_smx:INFO:	# loops 3
13:40:42:ST3_smx:INFO:	# loops 4
13:40:43:ST3_smx:INFO:	Total # of broken channels: 2
13:40:43:ST3_smx:INFO:	List of broken channels: [99, 125]
13:40:43:ST3_smx:INFO:	Total # of broken channels: 2
13:40:43:ST3_smx:INFO:	List of broken channels: [99, 125]
13:40:45:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1177.390875 mV
13:40:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:45:ST3_smx:INFO:		Electrons
13:40:45:ST3_smx:INFO:	# loops 0
13:40:46:ST3_smx:INFO:	# loops 1
13:40:48:ST3_smx:INFO:	# loops 2
13:40:50:ST3_smx:INFO:	# loops 3
13:40:51:ST3_smx:INFO:	# loops 4
13:40:53:ST3_smx:INFO:	Total # of broken channels: 0
13:40:53:ST3_smx:INFO:	List of broken channels: []
13:40:53:ST3_smx:INFO:	Total # of broken channels: 1
13:40:53:ST3_smx:INFO:	List of broken channels: [126]
13:40:55:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1177.390875 mV
13:40:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:40:55:ST3_smx:INFO:		Electrons
13:40:55:ST3_smx:INFO:	# loops 0
13:40:56:ST3_smx:INFO:	# loops 1
13:40:58:ST3_smx:INFO:	# loops 2
13:40:59:ST3_smx:INFO:	# loops 3
13:41:01:ST3_smx:INFO:	# loops 4
13:41:03:ST3_smx:INFO:	Total # of broken channels: 0
13:41:03:ST3_smx:INFO:	List of broken channels: []
13:41:03:ST3_smx:INFO:	Total # of broken channels: 0
13:41:03:ST3_smx:INFO:	List of broken channels: []
13:41:04:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1195.082160 mV
13:41:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:04:ST3_smx:INFO:		Electrons
13:41:04:ST3_smx:INFO:	# loops 0
13:41:06:ST3_smx:INFO:	# loops 1
13:41:07:ST3_smx:INFO:	# loops 2
13:41:09:ST3_smx:INFO:	# loops 3
13:41:11:ST3_smx:INFO:	# loops 4
13:41:12:ST3_smx:INFO:	Total # of broken channels: 0
13:41:12:ST3_smx:INFO:	List of broken channels: []
13:41:12:ST3_smx:INFO:	Total # of broken channels: 0
13:41:12:ST3_smx:INFO:	List of broken channels: []
13:41:14:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1147.806000 mV
13:41:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:14:ST3_smx:INFO:		Electrons
13:41:14:ST3_smx:INFO:	# loops 0
13:41:16:ST3_smx:INFO:	# loops 1
13:41:17:ST3_smx:INFO:	# loops 2
13:41:19:ST3_smx:INFO:	# loops 3
13:41:20:ST3_smx:INFO:	# loops 4
13:41:22:ST3_smx:INFO:	Total # of broken channels: 0
13:41:22:ST3_smx:INFO:	List of broken channels: []
13:41:22:ST3_smx:INFO:	Total # of broken channels: 0
13:41:22:ST3_smx:INFO:	List of broken channels: []
13:41:24:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1171.483840 mV
13:41:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:41:24:ST3_smx:INFO:		Electrons
13:41:24:ST3_smx:INFO:	# loops 0
13:41:25:ST3_smx:INFO:	# loops 1
13:41:27:ST3_smx:INFO:	# loops 2
13:41:28:ST3_smx:INFO:	# loops 3
13:41:30:ST3_smx:INFO:	# loops 4
13:41:31:ST3_smx:INFO:	Total # of broken channels: 0
13:41:31:ST3_smx:INFO:	List of broken channels: []
13:41:31:ST3_smx:INFO:	Total # of broken channels: 0
13:41:31:ST3_smx:INFO:	List of broken channels: []
13:41:32:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:41:32:febtest:INFO:	23-00 | XA-000-09-004-003-016-016-14 |  21.9 | 1253.7
13:41:32:febtest:INFO:	30-01 | XA-000-09-004-003-016-018-14 |  18.7 | 1253.7
13:41:32:febtest:INFO:	21-02 | XA-000-09-004-003-017-016-03 |  31.4 | 1224.5
13:41:33:febtest:INFO:	28-03 | XA-000-09-004-003-015-020-06 |  34.6 | 1201.0
13:41:33:febtest:INFO:	19-04 | XA-000-09-004-003-016-019-14 |  40.9 | 1201.0
13:41:33:febtest:INFO:	26-05 | XA-000-09-004-003-017-019-03 |  28.2 | 1218.6
13:41:33:febtest:INFO:	17-06 | XA-000-09-004-003-016-015-09 |  37.7 | 1165.6
13:41:34:febtest:INFO:	24-07 | XA-000-09-004-003-017-017-03 |  37.7 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_21-13_39_11
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2252| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME:  | SIZE: 0 | GRADE: 
MODULE_NAME: M3DR0B2000542A2
LADDER_NAME: 
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4850', '1.848', '2.7270']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9650', '1.849', '2.7390']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9310', '1.850', '0.7664']