
FEB_2253 12.09.24 09:15:07
TextEdit.txt
09:15:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:15:07:ST3_Shared:INFO: FEB-Sensor 09:15:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:15:09:ST3_ModuleSelector:INFO: M8UL0B0010600A2 09:15:09:ST3_ModuleSelector:INFO: 07122 09:15:09:febtest:INFO: Testing FEB with SN 2253 09:15:11:smx_tester:INFO: Scanning setup 09:15:11:elinks:INFO: Disabling clock on downlink 0 09:15:11:elinks:INFO: Disabling clock on downlink 1 09:15:11:elinks:INFO: Disabling clock on downlink 2 09:15:11:elinks:INFO: Disabling clock on downlink 3 09:15:11:elinks:INFO: Disabling clock on downlink 4 09:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:11:elinks:INFO: Disabling clock on downlink 0 09:15:11:elinks:INFO: Disabling clock on downlink 1 09:15:11:elinks:INFO: Disabling clock on downlink 2 09:15:11:elinks:INFO: Disabling clock on downlink 3 09:15:11:elinks:INFO: Disabling clock on downlink 4 09:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:11:elinks:INFO: Disabling clock on downlink 0 09:15:11:elinks:INFO: Disabling clock on downlink 1 09:15:11:elinks:INFO: Disabling clock on downlink 2 09:15:11:elinks:INFO: Disabling clock on downlink 3 09:15:11:elinks:INFO: Disabling clock on downlink 4 09:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:11:elinks:INFO: Disabling clock on downlink 0 09:15:11:elinks:INFO: Disabling clock on downlink 1 09:15:11:elinks:INFO: Disabling clock on downlink 2 09:15:11:elinks:INFO: Disabling clock on downlink 3 09:15:11:elinks:INFO: Disabling clock on downlink 4 09:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:11:elinks:INFO: Disabling clock on downlink 0 09:15:11:elinks:INFO: Disabling clock on downlink 1 09:15:11:elinks:INFO: Disabling clock on downlink 2 09:15:11:elinks:INFO: Disabling clock on downlink 3 09:15:11:elinks:INFO: Disabling clock on downlink 4 09:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:15:11:setup_element:INFO: Scanning clock phase 09:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:15:12:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXXXX Clock Delay: 34 09:15:12:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXXXX Clock Delay: 34 09:15:12:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:12:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:15:12:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________ Clock Delay: 40 09:15:12:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________ Clock Delay: 40 09:15:12:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 09:15:12:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 09:15:12:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:15:12:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:15:12:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:15:12:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 09:15:12:setup_element:INFO: Scanning data phases 09:15:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:17:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:15:17:setup_element:INFO: Eye window for uplink 16: _XXXX___________________________________ Data delay found: 22 09:15:17:setup_element:INFO: Eye window for uplink 17: XXX____________________________________X Data delay found: 20 09:15:17:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX Data delay found: 20 09:15:17:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX Data delay found: 18 09:15:17:setup_element:INFO: Eye window for uplink 20: XX______________XXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 8 09:15:18:setup_element:INFO: Eye window for uplink 21: XX______________XXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 8 09:15:18:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX Data delay found: 18 09:15:18:setup_element:INFO: Eye window for uplink 23: XXXXX_____________________________XXXXXX Data delay found: 19 09:15:18:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________ Data delay found: 29 09:15:18:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________ Data delay found: 31 09:15:18:setup_element:INFO: Eye window for uplink 26: ___________XXXX_________________________ Data delay found: 32 09:15:18:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________ Data delay found: 36 09:15:18:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 09:15:18:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 09:15:18:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX______________XX Data delay found: 8 09:15:18:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_____________XX Data delay found: 8 09:15:18:setup_element:INFO: Setting the data phase to 22 for uplink 16 09:15:18:setup_element:INFO: Setting the data phase to 20 for uplink 17 09:15:18:setup_element:INFO: Setting the data phase to 20 for uplink 18 09:15:18:setup_element:INFO: Setting the data phase to 18 for uplink 19 09:15:18:setup_element:INFO: Setting the data phase to 8 for uplink 20 09:15:18:setup_element:INFO: Setting the data phase to 8 for uplink 21 09:15:18:setup_element:INFO: Setting the data phase to 18 for uplink 22 09:15:18:setup_element:INFO: Setting the data phase to 19 for uplink 23 09:15:18:setup_element:INFO: Setting the data phase to 29 for uplink 24 09:15:18:setup_element:INFO: Setting the data phase to 31 for uplink 25 09:15:18:setup_element:INFO: Setting the data phase to 32 for uplink 26 09:15:18:setup_element:INFO: Setting the data phase to 36 for uplink 27 09:15:18:setup_element:INFO: Setting the data phase to 35 for uplink 28 09:15:18:setup_element:INFO: Setting the data phase to 37 for uplink 29 09:15:18:setup_element:INFO: Setting the data phase to 8 for uplink 30 09:15:18:setup_element:INFO: Setting the data phase to 8 for uplink 31 09:15:18:setup_element:INFO: Beginning SMX ASICs map scan 09:15:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:15:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:15:18:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:15:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:15:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:15:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:15:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:15:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:15:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:15:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:15:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:15:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:15:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:15:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:15:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:15:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:15:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:15:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:15:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:15:20:setup_element:INFO: Performing Elink synchronization 09:15:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:15:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:15:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:15:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:15:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:15:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x0 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x1 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x2 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x3 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x4 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x5 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x6 09:15:21:ST3_emu_feb:DEBUG: Chip address: 0x7 09:15:21:febtest:INFO: Init all SMX (CSA): 30 09:15:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:15:36:febtest:INFO: 23-00 | XA-000-08-003-000-005-243-09 | 21.9 | 1183.3 09:15:36:febtest:INFO: 30-01 | XA-000-08-003-000-005-245-09 | -432.3 | 1578.5 09:15:36:febtest:INFO: 21-02 | XA-000-08-002-003-007-124-11 | 15.6 | 1242.0 09:15:36:febtest:INFO: 28-03 | XA-000-08-003-000-005-246-09 | 34.6 | 1130.0 09:15:37:febtest:INFO: 19-04 | XA-000-08-003-000-005-188-12 | 18.7 | 1201.0 09:15:37:febtest:INFO: 26-05 | XA-000-08-003-000-005-241-09 | 28.2 | 1171.5 09:15:37:febtest:INFO: 17-06 | XA-000-08-003-000-005-190-12 | 28.2 | 1171.5 09:15:37:febtest:INFO: 24-07 | XA-000-08-003-000-005-247-09 | 18.7 | 1195.1 09:15:38:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:15:40:ST3_smx:INFO: chip: 23-0 25.062742 C 1200.969315 mV 09:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:15:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:15:40:ST3_smx:INFO: Electrons 09:15:40:ST3_smx:INFO: # loops 0 09:15:42:ST3_smx:INFO: # loops 1 09:15:44:ST3_smx:INFO: # loops 2 09:15:45:ST3_smx:INFO: # loops 3 09:15:47:ST3_smx:INFO: # loops 4 09:15:48:ST3_smx:INFO: Total # of broken channels: 0 09:15:48:ST3_smx:INFO: List of broken channels: [] 09:15:48:ST3_smx:INFO: Total # of broken channels: 0 09:15:48:ST3_smx:INFO: List of broken channels: [] 09:15:50:ST3_smx:INFO: chip: 30-1 -432.266438 C 1578.532875 mV 09:15:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:15:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:15:50:ST3_smx:INFO: Electrons 09:15:50:ST3_smx:INFO: # loops 0 09:15:52:ST3_smx:INFO: # loops 1 09:15:53:ST3_smx:INFO: # loops 2 09:15:55:ST3_smx:INFO: # loops 3 09:15:57:ST3_smx:INFO: # loops 4 09:15:58:ST3_smx:INFO: Total # of broken channels: 1 09:15:58:ST3_smx:INFO: List of broken channels: [98] 09:15:58:ST3_smx:INFO: Total # of broken channels: 3 09:15:58:ST3_smx:INFO: List of broken channels: [0, 1, 98] 09:16:00:ST3_smx:INFO: chip: 21-2 15.590880 C 1282.867635 mV 09:16:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:00:ST3_smx:INFO: Electrons 09:16:00:ST3_smx:INFO: # loops 0 09:16:02:ST3_smx:INFO: # loops 1 09:16:03:ST3_smx:INFO: # loops 2 09:16:05:ST3_smx:INFO: # loops 3 09:16:06:ST3_smx:INFO: # loops 4 09:16:08:ST3_smx:INFO: Total # of broken channels: 2 09:16:08:ST3_smx:INFO: List of broken channels: [123, 127] 09:16:08:ST3_smx:INFO: Total # of broken channels: 2 09:16:08:ST3_smx:INFO: List of broken channels: [123, 127] 09:16:10:ST3_smx:INFO: chip: 28-3 34.556970 C 1147.806000 mV 09:16:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:10:ST3_smx:INFO: Electrons 09:16:10:ST3_smx:INFO: # loops 0 09:16:11:ST3_smx:INFO: # loops 1 09:16:13:ST3_smx:INFO: # loops 2 09:16:15:ST3_smx:INFO: # loops 3 09:16:16:ST3_smx:INFO: # loops 4 09:16:18:ST3_smx:INFO: Total # of broken channels: 0 09:16:18:ST3_smx:INFO: List of broken channels: [] 09:16:18:ST3_smx:INFO: Total # of broken channels: 0 09:16:18:ST3_smx:INFO: List of broken channels: [] 09:16:20:ST3_smx:INFO: chip: 19-4 18.745682 C 1212.728715 mV 09:16:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:20:ST3_smx:INFO: Electrons 09:16:20:ST3_smx:INFO: # loops 0 09:16:21:ST3_smx:INFO: # loops 1 09:16:23:ST3_smx:INFO: # loops 2 09:16:25:ST3_smx:INFO: # loops 3 09:16:26:ST3_smx:INFO: # loops 4 09:16:28:ST3_smx:INFO: Total # of broken channels: 4 09:16:28:ST3_smx:INFO: List of broken channels: [35, 39, 45, 103] 09:16:28:ST3_smx:INFO: Total # of broken channels: 4 09:16:28:ST3_smx:INFO: List of broken channels: [35, 39, 45, 103] 09:16:29:ST3_smx:INFO: chip: 26-5 28.225000 C 1183.292940 mV 09:16:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:30:ST3_smx:INFO: Electrons 09:16:30:ST3_smx:INFO: # loops 0 09:16:31:ST3_smx:INFO: # loops 1 09:16:33:ST3_smx:INFO: # loops 2 09:16:34:ST3_smx:INFO: # loops 3 09:16:36:ST3_smx:INFO: # loops 4 09:16:38:ST3_smx:INFO: Total # of broken channels: 0 09:16:38:ST3_smx:INFO: List of broken channels: [] 09:16:38:ST3_smx:INFO: Total # of broken channels: 1 09:16:38:ST3_smx:INFO: List of broken channels: [21] 09:16:39:ST3_smx:INFO: chip: 17-6 31.389742 C 1183.292940 mV 09:16:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:39:ST3_smx:INFO: Electrons 09:16:39:ST3_smx:INFO: # loops 0 09:16:41:ST3_smx:INFO: # loops 1 09:16:43:ST3_smx:INFO: # loops 2 09:16:44:ST3_smx:INFO: # loops 3 09:16:46:ST3_smx:INFO: # loops 4 09:16:47:ST3_smx:INFO: Total # of broken channels: 0 09:16:47:ST3_smx:INFO: List of broken channels: [] 09:16:47:ST3_smx:INFO: Total # of broken channels: 0 09:16:47:ST3_smx:INFO: List of broken channels: [] 09:16:49:ST3_smx:INFO: chip: 24-7 21.902970 C 1200.969315 mV 09:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:16:49:ST3_smx:INFO: Electrons 09:16:49:ST3_smx:INFO: # loops 0 09:16:51:ST3_smx:INFO: # loops 1 09:16:52:ST3_smx:INFO: # loops 2 09:16:54:ST3_smx:INFO: # loops 3 09:16:56:ST3_smx:INFO: # loops 4 09:16:57:ST3_smx:INFO: Total # of broken channels: 0 09:16:57:ST3_smx:INFO: List of broken channels: [] 09:16:57:ST3_smx:INFO: Total # of broken channels: 0 09:16:57:ST3_smx:INFO: List of broken channels: [] 09:16:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:16:58:febtest:INFO: 23-00 | XA-000-08-003-000-005-243-09 | 25.1 | 1224.5 09:16:58:febtest:INFO: 30-01 | XA-000-08-003-000-005-245-09 | -432.3 | 1578.5 09:16:58:febtest:INFO: 21-02 | XA-000-08-002-003-007-124-11 | 12.4 | 1578.5 09:16:59:febtest:INFO: 28-03 | XA-000-08-003-000-005-246-09 | 37.7 | 1171.5 09:16:59:febtest:INFO: 19-04 | XA-000-08-003-000-005-188-12 | 21.9 | 1236.2 09:16:59:febtest:INFO: 26-05 | XA-000-08-003-000-005-241-09 | 31.4 | 1206.9 09:16:59:febtest:INFO: 17-06 | XA-000-08-003-000-005-190-12 | 31.4 | 1206.9 09:16:59:febtest:INFO: 24-07 | XA-000-08-003-000-005-247-09 | 21.9 | 1224.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_09_12-09_15_07 OPERATOR : Kerstin S.; Olga B.; Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2253| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 07122 | SIZE: 62x42 | GRADE: A MODULE_NAME: M8UL0B0010600A2 LADDER_NAME: L8UL001060 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4750', '1.847', '2.8210'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0530', '1.850', '2.6290'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0240', '1.850', '0.5258']