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FEB_2255 05.11.24 08:16:53
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08:16:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:16:53:ST3_Shared:INFO: FEB-Sensor
08:16:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:17:04:ST3_ModuleSelector:DEBUG: M3DR2B4000124A2
08:17:04:ST3_ModuleSelector:DEBUG: L3DR200012
08:17:04:ST3_ModuleSelector:DEBUG: 12334
08:17:04:ST3_ModuleSelector:DEBUG: 62x124
08:17:04:ST3_ModuleSelector:DEBUG: B
08:17:04:ST3_ModuleSelector:DEBUG: M3DR2B4000124A2
08:17:04:ST3_ModuleSelector:DEBUG: L3DR200012
08:17:04:ST3_ModuleSelector:DEBUG: 12334
08:17:04:ST3_ModuleSelector:DEBUG: 62x124
08:17:04:ST3_ModuleSelector:DEBUG: B
08:17:11:ST3_ModuleSelector:INFO: M3DR2B4000124A2
08:17:11:ST3_ModuleSelector:INFO: 12334
08:17:11:febtest:INFO: Testing FEB with SN 2255
08:17:13:smx_tester:INFO: Scanning setup
08:17:13:elinks:INFO: Disabling clock on downlink 0
08:17:13:elinks:INFO: Disabling clock on downlink 1
08:17:13:elinks:INFO: Disabling clock on downlink 2
08:17:13:elinks:INFO: Disabling clock on downlink 3
08:17:13:elinks:INFO: Disabling clock on downlink 4
08:17:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:17:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:17:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:17:13:elinks:INFO: Disabling clock on downlink 0
08:17:13:elinks:INFO: Disabling clock on downlink 1
08:17:13:elinks:INFO: Disabling clock on downlink 2
08:17:13:elinks:INFO: Disabling clock on downlink 3
08:17:13:elinks:INFO: Disabling clock on downlink 4
08:17:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:17:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:17:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:17:13:elinks:INFO: Disabling clock on downlink 0
08:17:13:elinks:INFO: Disabling clock on downlink 1
08:17:13:elinks:INFO: Disabling clock on downlink 2
08:17:13:elinks:INFO: Disabling clock on downlink 3
08:17:13:elinks:INFO: Disabling clock on downlink 4
08:17:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:17:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:17:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:17:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:17:13:elinks:INFO: Disabling clock on downlink 0
08:17:13:elinks:INFO: Disabling clock on downlink 1
08:17:13:elinks:INFO: Disabling clock on downlink 2
08:17:13:elinks:INFO: Disabling clock on downlink 3
08:17:13:elinks:INFO: Disabling clock on downlink 4
08:17:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:17:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:17:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:17:14:elinks:INFO: Disabling clock on downlink 0
08:17:14:elinks:INFO: Disabling clock on downlink 1
08:17:14:elinks:INFO: Disabling clock on downlink 2
08:17:14:elinks:INFO: Disabling clock on downlink 3
08:17:14:elinks:INFO: Disabling clock on downlink 4
08:17:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:17:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:17:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:17:14:setup_element:INFO: Scanning clock phase
08:17:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:17:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:17:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:17:14:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:17:14:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:17:14:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:17:14:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:17:14:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
08:17:14:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
08:17:14:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:17:14:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
08:17:14:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
08:17:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
08:17:14:setup_element:INFO: Scanning data phases
08:17:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:17:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:17:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:17:20:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
08:17:20:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
08:17:20:setup_element:INFO: Eye window for uplink 18: XXXXX__________________________________X
Data delay found: 21
08:17:20:setup_element:INFO: Eye window for uplink 19: XXXX_________________________________XXX
Data delay found: 20
08:17:20:setup_element:INFO: Eye window for uplink 20: XXXX___________________________________X
Data delay found: 21
08:17:20:setup_element:INFO: Eye window for uplink 21: XX____________________________________XX
Data delay found: 19
08:17:20:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
08:17:20:setup_element:INFO: Eye window for uplink 23: XXXXX______________________________XXXXX
Data delay found: 19
08:17:20:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
08:17:20:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
08:17:20:setup_element:INFO: Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
08:17:20:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
08:17:20:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
08:17:20:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
08:17:20:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
08:17:20:setup_element:INFO: Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
08:17:20:setup_element:INFO: Setting the data phase to 21 for uplink 16
08:17:20:setup_element:INFO: Setting the data phase to 19 for uplink 17
08:17:20:setup_element:INFO: Setting the data phase to 21 for uplink 18
08:17:20:setup_element:INFO: Setting the data phase to 20 for uplink 19
08:17:20:setup_element:INFO: Setting the data phase to 21 for uplink 20
08:17:20:setup_element:INFO: Setting the data phase to 19 for uplink 21
08:17:20:setup_element:INFO: Setting the data phase to 18 for uplink 22
08:17:20:setup_element:INFO: Setting the data phase to 19 for uplink 23
08:17:20:setup_element:INFO: Setting the data phase to 32 for uplink 24
08:17:20:setup_element:INFO: Setting the data phase to 34 for uplink 25
08:17:20:setup_element:INFO: Setting the data phase to 33 for uplink 26
08:17:20:setup_element:INFO: Setting the data phase to 35 for uplink 27
08:17:20:setup_element:INFO: Setting the data phase to 35 for uplink 28
08:17:20:setup_element:INFO: Setting the data phase to 38 for uplink 29
08:17:20:setup_element:INFO: Setting the data phase to 1 for uplink 30
08:17:20:setup_element:INFO: Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
08:17:20:setup_element:INFO: Beginning SMX ASICs map scan
08:17:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:17:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:17:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:17:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:17:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:17:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:17:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:17:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:17:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:17:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:17:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:17:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:17:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:17:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:17:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:17:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:17:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:17:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:17:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:17:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:17:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:17:23:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: _____________________________________________________________________XXXXXXXXX__
Uplink 21: _____________________________________________________________________XXXXXXXXX__
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 18:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 19:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 20:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 21:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 19
Window Length: 30
Eye Window: XXXXX______________________________XXXXX
Uplink 24:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 30:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
Uplink 31:
Optimal Phase: 1
Window Length: 33
Eye Window: __________________XXXXXXX_______________
==============================================OOO==============================================
08:17:23:setup_element:INFO: Performing Elink synchronization
08:17:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:17:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:17:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:17:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:17:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:17:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:17:23:febtest:INFO: Init all SMX (CSA): 30
08:17:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:17:39:febtest:INFO: 23-00 | XA-000-09-004-004-017-009-14 | 34.6 | 1171.5
08:17:39:febtest:INFO: 30-01 | XA-000-09-004-003-002-010-06 | 25.1 | 1195.1
08:17:39:febtest:INFO: 21-02 | XA-000-09-004-004-017-011-14 | 34.6 | 1159.7
08:17:39:febtest:INFO: 28-03 | XA-000-09-004-003-002-015-06 | 40.9 | 1147.8
08:17:39:febtest:INFO: 19-04 | XA-000-09-004-004-018-010-00 | 40.9 | 1135.9
08:17:40:febtest:INFO: 26-05 | XA-000-09-004-003-002-019-01 | 44.1 | 1153.7
08:17:40:febtest:INFO: 17-06 | XA-000-09-004-004-017-010-14 | 31.4 | 1141.9
08:17:40:febtest:INFO: 24-07 | XA-000-09-004-004-003-019-06 | 34.6 | 1171.5
08:17:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:17:43:ST3_smx:INFO: chip: 23-0 34.556970 C 1183.292940 mV
08:17:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:43:ST3_smx:INFO: Electrons
08:17:43:ST3_smx:INFO: # loops 0
08:17:45:ST3_smx:INFO: # loops 1
08:17:46:ST3_smx:INFO: # loops 2
08:17:48:ST3_smx:INFO: # loops 3
08:17:50:ST3_smx:INFO: # loops 4
08:17:52:ST3_smx:INFO: Total # of broken channels: 0
08:17:52:ST3_smx:INFO: List of broken channels: []
08:17:52:ST3_smx:INFO: Total # of broken channels: 2
08:17:52:ST3_smx:INFO: List of broken channels: [64, 66]
08:17:53:ST3_smx:INFO: chip: 30-1 28.225000 C 1206.851500 mV
08:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:17:53:ST3_smx:INFO: Electrons
08:17:53:ST3_smx:INFO: # loops 0
08:17:55:ST3_smx:INFO: # loops 1
08:17:57:ST3_smx:INFO: # loops 2
08:17:59:ST3_smx:INFO: # loops 3
08:18:00:ST3_smx:INFO: # loops 4
08:18:02:ST3_smx:INFO: Total # of broken channels: 0
08:18:02:ST3_smx:INFO: List of broken channels: []
08:18:02:ST3_smx:INFO: Total # of broken channels: 0
08:18:02:ST3_smx:INFO: List of broken channels: []
08:18:04:ST3_smx:INFO: chip: 21-2 34.556970 C 1171.483840 mV
08:18:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:04:ST3_smx:INFO: Electrons
08:18:04:ST3_smx:INFO: # loops 0
08:18:05:ST3_smx:INFO: # loops 1
08:18:07:ST3_smx:INFO: # loops 2
08:18:09:ST3_smx:INFO: # loops 3
08:18:10:ST3_smx:INFO: # loops 4
08:18:12:ST3_smx:INFO: Total # of broken channels: 0
08:18:12:ST3_smx:INFO: List of broken channels: []
08:18:12:ST3_smx:INFO: Total # of broken channels: 0
08:18:12:ST3_smx:INFO: List of broken channels: []
08:18:14:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV
08:18:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:14:ST3_smx:INFO: Electrons
08:18:14:ST3_smx:INFO: # loops 0
08:18:16:ST3_smx:INFO: # loops 1
08:18:17:ST3_smx:INFO: # loops 2
08:18:19:ST3_smx:INFO: # loops 3
08:18:21:ST3_smx:INFO: # loops 4
08:18:22:ST3_smx:INFO: Total # of broken channels: 0
08:18:22:ST3_smx:INFO: List of broken channels: []
08:18:22:ST3_smx:INFO: Total # of broken channels: 0
08:18:22:ST3_smx:INFO: List of broken channels: []
08:18:24:ST3_smx:INFO: chip: 19-4 44.073563 C 1141.874115 mV
08:18:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:24:ST3_smx:INFO: Electrons
08:18:24:ST3_smx:INFO: # loops 0
08:18:26:ST3_smx:INFO: # loops 1
08:18:27:ST3_smx:INFO: # loops 2
08:18:29:ST3_smx:INFO: # loops 3
08:18:31:ST3_smx:INFO: # loops 4
08:18:32:ST3_smx:INFO: Total # of broken channels: 0
08:18:32:ST3_smx:INFO: List of broken channels: []
08:18:32:ST3_smx:INFO: Total # of broken channels: 0
08:18:32:ST3_smx:INFO: List of broken channels: []
08:18:34:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
08:18:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:34:ST3_smx:INFO: Electrons
08:18:34:ST3_smx:INFO: # loops 0
08:18:36:ST3_smx:INFO: # loops 1
08:18:37:ST3_smx:INFO: # loops 2
08:18:39:ST3_smx:INFO: # loops 3
08:18:41:ST3_smx:INFO: # loops 4
08:18:42:ST3_smx:INFO: Total # of broken channels: 0
08:18:42:ST3_smx:INFO: List of broken channels: []
08:18:42:ST3_smx:INFO: Total # of broken channels: 0
08:18:42:ST3_smx:INFO: List of broken channels: []
08:18:44:ST3_smx:INFO: chip: 17-6 31.389742 C 1153.732915 mV
08:18:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:44:ST3_smx:INFO: Electrons
08:18:44:ST3_smx:INFO: # loops 0
08:18:46:ST3_smx:INFO: # loops 1
08:18:47:ST3_smx:INFO: # loops 2
08:18:49:ST3_smx:INFO: # loops 3
08:18:51:ST3_smx:INFO: # loops 4
08:18:52:ST3_smx:INFO: Total # of broken channels: 0
08:18:52:ST3_smx:INFO: List of broken channels: []
08:18:52:ST3_smx:INFO: Total # of broken channels: 0
08:18:52:ST3_smx:INFO: List of broken channels: []
08:18:54:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
08:18:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:18:54:ST3_smx:INFO: Electrons
08:18:54:ST3_smx:INFO: # loops 0
08:18:56:ST3_smx:INFO: # loops 1
08:18:58:ST3_smx:INFO: # loops 2
08:18:59:ST3_smx:INFO: # loops 3
08:19:01:ST3_smx:INFO: # loops 4
08:19:03:ST3_smx:INFO: Total # of broken channels: 0
08:19:03:ST3_smx:INFO: List of broken channels: []
08:19:03:ST3_smx:INFO: Total # of broken channels: 0
08:19:03:ST3_smx:INFO: List of broken channels: []
08:19:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:19:03:febtest:INFO: 23-00 | XA-000-09-004-004-017-009-14 | 37.7 | 1206.9
08:19:03:febtest:INFO: 30-01 | XA-000-09-004-003-002-010-06 | 28.2 | 1224.5
08:19:04:febtest:INFO: 21-02 | XA-000-09-004-004-017-011-14 | 37.7 | 1189.2
08:19:04:febtest:INFO: 28-03 | XA-000-09-004-003-002-015-06 | 44.1 | 1183.3
08:19:04:febtest:INFO: 19-04 | XA-000-09-004-004-018-010-00 | 44.1 | 1165.6
08:19:04:febtest:INFO: 26-05 | XA-000-09-004-003-002-019-01 | 44.1 | 1224.5
08:19:04:febtest:INFO: 17-06 | XA-000-09-004-004-017-010-14 | 34.6 | 1165.6
08:19:05:febtest:INFO: 24-07 | XA-000-09-004-004-003-019-06 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_05-08_16_53
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2255| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 12334 | SIZE: 62x124 | GRADE: B
MODULE_NAME: M3DR2B4000124A2
LADDER_NAME: L3DR200012
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5550', '1.848', '2.7370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0450', '1.850', '2.8080']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9600', '1.850', '0.7727']