
FEB_2256 04.11.24 08:50:08
TextEdit.txt
08:50:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:50:08:ST3_Shared:INFO: FEB-Sensor 08:50:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:50:11:ST3_ModuleSelector:INFO: M3DR2B1000121A2 08:50:11:ST3_ModuleSelector:INFO: 27312 08:50:11:febtest:INFO: Testing FEB with SN 2256 08:50:12:smx_tester:INFO: Scanning setup 08:50:12:elinks:INFO: Disabling clock on downlink 0 08:50:13:elinks:INFO: Disabling clock on downlink 1 08:50:13:elinks:INFO: Disabling clock on downlink 2 08:50:13:elinks:INFO: Disabling clock on downlink 3 08:50:13:elinks:INFO: Disabling clock on downlink 4 08:50:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:50:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:50:13:elinks:INFO: Disabling clock on downlink 0 08:50:13:elinks:INFO: Disabling clock on downlink 1 08:50:13:elinks:INFO: Disabling clock on downlink 2 08:50:13:elinks:INFO: Disabling clock on downlink 3 08:50:13:elinks:INFO: Disabling clock on downlink 4 08:50:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:50:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:50:13:elinks:INFO: Disabling clock on downlink 0 08:50:13:elinks:INFO: Disabling clock on downlink 1 08:50:13:elinks:INFO: Disabling clock on downlink 2 08:50:13:elinks:INFO: Disabling clock on downlink 3 08:50:13:elinks:INFO: Disabling clock on downlink 4 08:50:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 08:50:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 08:50:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:50:13:elinks:INFO: Disabling clock on downlink 0 08:50:13:elinks:INFO: Disabling clock on downlink 1 08:50:13:elinks:INFO: Disabling clock on downlink 2 08:50:13:elinks:INFO: Disabling clock on downlink 3 08:50:13:elinks:INFO: Disabling clock on downlink 4 08:50:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:50:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:50:13:elinks:INFO: Disabling clock on downlink 0 08:50:13:elinks:INFO: Disabling clock on downlink 1 08:50:13:elinks:INFO: Disabling clock on downlink 2 08:50:13:elinks:INFO: Disabling clock on downlink 3 08:50:13:elinks:INFO: Disabling clock on downlink 4 08:50:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:50:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 08:50:13:setup_element:INFO: Scanning clock phase 08:50:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:50:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:50:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2 08:50:14:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:50:14:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:50:14:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:50:14:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:50:14:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 08:50:14:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:50:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 08:50:14:setup_element:INFO: Scanning data phases 08:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:50:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:50:19:setup_element:INFO: Data phase scan results for group 0, downlink 2 08:50:19:setup_element:INFO: Eye window for uplink 16: ___________________________________XXXX_ Data delay found: 16 08:50:19:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__ Data delay found: 15 08:50:19:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 08:50:19:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 08:50:19:setup_element:INFO: Eye window for uplink 20: X________________________XXXXXXXXXXXXXXX Data delay found: 12 08:50:19:setup_element:INFO: Eye window for uplink 21: X________________________XXXXXXXXXXXXXXX Data delay found: 12 08:50:19:setup_element:INFO: Eye window for uplink 22: XXXX________________________________XXXX Data delay found: 19 08:50:19:setup_element:INFO: Eye window for uplink 23: XXXXXX______________________________XXXX Data delay found: 20 08:50:19:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________ Data delay found: 30 08:50:19:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 08:50:19:setup_element:INFO: Eye window for uplink 26: ________XXXXXX__________________________ Data delay found: 30 08:50:19:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________ Data delay found: 34 08:50:19:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________ Data delay found: 36 08:50:19:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________ Data delay found: 39 08:50:19:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________ Data delay found: 36 08:50:19:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_X___________________ Data delay found: 37 08:50:19:setup_element:INFO: Setting the data phase to 16 for uplink 16 08:50:19:setup_element:INFO: Setting the data phase to 15 for uplink 17 08:50:19:setup_element:INFO: Setting the data phase to 19 for uplink 18 08:50:19:setup_element:INFO: Setting the data phase to 17 for uplink 19 08:50:19:setup_element:INFO: Setting the data phase to 12 for uplink 20 08:50:19:setup_element:INFO: Setting the data phase to 12 for uplink 21 08:50:19:setup_element:INFO: Setting the data phase to 19 for uplink 22 08:50:19:setup_element:INFO: Setting the data phase to 20 for uplink 23 08:50:19:setup_element:INFO: Setting the data phase to 30 for uplink 24 08:50:19:setup_element:INFO: Setting the data phase to 32 for uplink 25 08:50:19:setup_element:INFO: Setting the data phase to 30 for uplink 26 08:50:19:setup_element:INFO: Setting the data phase to 34 for uplink 27 08:50:19:setup_element:INFO: Setting the data phase to 36 for uplink 28 08:50:19:setup_element:INFO: Setting the data phase to 39 for uplink 29 08:50:19:setup_element:INFO: Setting the data phase to 36 for uplink 30 08:50:19:setup_element:INFO: Setting the data phase to 37 for uplink 31 ==============================================OOO============================================== 08:50:19:setup_element:INFO: Beginning SMX ASICs map scan 08:50:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:50:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:50:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:50:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 08:50:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 08:50:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 08:50:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 08:50:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 08:50:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 08:50:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 08:50:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 08:50:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 08:50:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 08:50:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 08:50:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 08:50:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 08:50:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 08:50:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 08:50:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 08:50:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 08:50:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 08:50:22:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 71 Eye Windows: Uplink 16: ________________________________________________________________________________ Uplink 17: ________________________________________________________________________________ Uplink 18: _____________________________________________________________________XXXXXXXX___ Uplink 19: _____________________________________________________________________XXXXXXXX___ Uplink 20: _____________________________________________________________________XXXXXXXXX__ Uplink 21: _____________________________________________________________________XXXXXXXXX__ Uplink 22: ______________________________________________________________________XXXXXXX___ Uplink 23: ______________________________________________________________________XXXXXXX___ Uplink 24: ________________________________________________________________________________ Uplink 25: ________________________________________________________________________________ Uplink 26: ________________________________________________________________________________ Uplink 27: ________________________________________________________________________________ Uplink 28: _____________________________________________________________________XXXXXXXX___ Uplink 29: _____________________________________________________________________XXXXXXXX___ Uplink 30: _____________________________________________________________________XXXXXXXX___ Uplink 31: _____________________________________________________________________XXXXXXXX___ Data phase characteristics: Uplink 16: Optimal Phase: 16 Window Length: 36 Eye Window: ___________________________________XXXX_ Uplink 17: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 20: Optimal Phase: 12 Window Length: 24 Eye Window: X________________________XXXXXXXXXXXXXXX Uplink 21: Optimal Phase: 12 Window Length: 24 Eye Window: X________________________XXXXXXXXXXXXXXX Uplink 22: Optimal Phase: 19 Window Length: 32 Eye Window: XXXX________________________________XXXX Uplink 23: Optimal Phase: 20 Window Length: 30 Eye Window: XXXXXX______________________________XXXX Uplink 24: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 26: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 27: Optimal Phase: 34 Window Length: 33 Eye Window: ___________XXXXXXX______________________ Uplink 28: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 29: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 30: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 31: Optimal Phase: 37 Window Length: 33 Eye Window: ______________XXXXX_X___________________ ==============================================OOO============================================== 08:50:22:setup_element:INFO: Performing Elink synchronization 08:50:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:50:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 08:50:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 08:50:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 08:50:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 08:50:22:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30 08:50:23:febtest:INFO: Init all SMX (CSA): 30 08:50:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:50:37:febtest:INFO: 23-00 | XA-000-09-004-003-002-014-06 | 34.6 | 1141.9 08:50:37:febtest:INFO: 30-01 | XA-000-09-004-003-006-015-00 | 25.1 | 1183.3 08:50:38:febtest:INFO: 21-02 | XA-000-09-004-003-006-013-00 | 34.6 | 1141.9 08:50:38:febtest:INFO: 28-03 | XA-000-09-004-003-006-022-07 | 34.6 | 1147.8 08:50:38:febtest:INFO: 19-04 | XA-000-09-004-003-006-020-07 | 28.2 | 1159.7 08:50:38:febtest:INFO: 26-05 | XA-000-09-004-003-006-019-07 | 31.4 | 1153.7 08:50:39:febtest:INFO: 17-06 | XA-000-09-004-003-006-021-07 | 21.9 | 1153.7 08:50:39:febtest:INFO: 24-07 | XA-000-09-004-003-006-014-00 | 34.6 | 1135.9 08:50:40:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 08:50:42:ST3_smx:INFO: chip: 23-0 34.556970 C 1159.654860 mV 08:50:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:50:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:50:42:ST3_smx:INFO: Electrons 08:50:42:ST3_smx:INFO: # loops 0 08:50:44:ST3_smx:INFO: # loops 1 08:50:45:ST3_smx:INFO: # loops 2 08:50:47:ST3_smx:INFO: # loops 3 08:50:48:ST3_smx:INFO: # loops 4 08:50:50:ST3_smx:INFO: Total # of broken channels: 0 08:50:50:ST3_smx:INFO: List of broken channels: [] 08:50:50:ST3_smx:INFO: Total # of broken channels: 1 08:50:50:ST3_smx:INFO: List of broken channels: [9] 08:50:52:ST3_smx:INFO: chip: 30-1 25.062742 C 1195.082160 mV 08:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:50:52:ST3_smx:INFO: Electrons 08:50:52:ST3_smx:INFO: # loops 0 08:50:53:ST3_smx:INFO: # loops 1 08:50:55:ST3_smx:INFO: # loops 2 08:50:56:ST3_smx:INFO: # loops 3 08:50:58:ST3_smx:INFO: # loops 4 08:51:00:ST3_smx:INFO: Total # of broken channels: 0 08:51:00:ST3_smx:INFO: List of broken channels: [] 08:51:00:ST3_smx:INFO: Total # of broken channels: 1 08:51:00:ST3_smx:INFO: List of broken channels: [0] 08:51:01:ST3_smx:INFO: chip: 21-2 34.556970 C 1153.732915 mV 08:51:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:01:ST3_smx:INFO: Electrons 08:51:01:ST3_smx:INFO: # loops 0 08:51:03:ST3_smx:INFO: # loops 1 08:51:05:ST3_smx:INFO: # loops 2 08:51:06:ST3_smx:INFO: # loops 3 08:51:08:ST3_smx:INFO: # loops 4 08:51:10:ST3_smx:INFO: Total # of broken channels: 0 08:51:10:ST3_smx:INFO: List of broken channels: [] 08:51:10:ST3_smx:INFO: Total # of broken channels: 0 08:51:10:ST3_smx:INFO: List of broken channels: [] 08:51:11:ST3_smx:INFO: chip: 28-3 34.556970 C 1159.654860 mV 08:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:11:ST3_smx:INFO: Electrons 08:51:11:ST3_smx:INFO: # loops 0 08:51:13:ST3_smx:INFO: # loops 1 08:51:15:ST3_smx:INFO: # loops 2 08:51:16:ST3_smx:INFO: # loops 3 08:51:18:ST3_smx:INFO: # loops 4 08:51:19:ST3_smx:INFO: Total # of broken channels: 0 08:51:19:ST3_smx:INFO: List of broken channels: [] 08:51:19:ST3_smx:INFO: Total # of broken channels: 0 08:51:19:ST3_smx:INFO: List of broken channels: [] 08:51:21:ST3_smx:INFO: chip: 19-4 31.389742 C 1171.483840 mV 08:51:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:21:ST3_smx:INFO: Electrons 08:51:21:ST3_smx:INFO: # loops 0 08:51:23:ST3_smx:INFO: # loops 1 08:51:24:ST3_smx:INFO: # loops 2 08:51:26:ST3_smx:INFO: # loops 3 08:51:27:ST3_smx:INFO: # loops 4 08:51:29:ST3_smx:INFO: Total # of broken channels: 0 08:51:29:ST3_smx:INFO: List of broken channels: [] 08:51:29:ST3_smx:INFO: Total # of broken channels: 0 08:51:29:ST3_smx:INFO: List of broken channels: [] 08:51:31:ST3_smx:INFO: chip: 26-5 31.389742 C 1165.571835 mV 08:51:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:31:ST3_smx:INFO: Electrons 08:51:31:ST3_smx:INFO: # loops 0 08:51:32:ST3_smx:INFO: # loops 1 08:51:34:ST3_smx:INFO: # loops 2 08:51:35:ST3_smx:INFO: # loops 3 08:51:37:ST3_smx:INFO: # loops 4 08:51:39:ST3_smx:INFO: Total # of broken channels: 0 08:51:39:ST3_smx:INFO: List of broken channels: [] 08:51:39:ST3_smx:INFO: Total # of broken channels: 0 08:51:39:ST3_smx:INFO: List of broken channels: [] 08:51:40:ST3_smx:INFO: chip: 17-6 21.902970 C 1165.571835 mV 08:51:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:40:ST3_smx:INFO: Electrons 08:51:40:ST3_smx:INFO: # loops 0 08:51:42:ST3_smx:INFO: # loops 1 08:51:44:ST3_smx:INFO: # loops 2 08:51:45:ST3_smx:INFO: # loops 3 08:51:47:ST3_smx:INFO: # loops 4 08:51:48:ST3_smx:INFO: Total # of broken channels: 1 08:51:48:ST3_smx:INFO: List of broken channels: [127] 08:51:48:ST3_smx:INFO: Total # of broken channels: 1 08:51:48:ST3_smx:INFO: List of broken channels: [127] 08:51:50:ST3_smx:INFO: chip: 24-7 37.726682 C 1147.806000 mV 08:51:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 08:51:50:ST3_smx:INFO: Electrons 08:51:50:ST3_smx:INFO: # loops 0 08:51:52:ST3_smx:INFO: # loops 1 08:51:53:ST3_smx:INFO: # loops 2 08:51:55:ST3_smx:INFO: # loops 3 08:51:56:ST3_smx:INFO: # loops 4 08:51:58:ST3_smx:INFO: Total # of broken channels: 0 08:51:58:ST3_smx:INFO: List of broken channels: [] 08:51:58:ST3_smx:INFO: Total # of broken channels: 0 08:51:58:ST3_smx:INFO: List of broken channels: [] 08:51:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 08:51:58:febtest:INFO: 23-00 | XA-000-09-004-003-002-014-06 | 34.6 | 1201.0 08:51:59:febtest:INFO: 30-01 | XA-000-09-004-003-006-015-00 | 28.2 | 1218.6 08:51:59:febtest:INFO: 21-02 | XA-000-09-004-003-006-013-00 | 37.7 | 1171.5 08:51:59:febtest:INFO: 28-03 | XA-000-09-004-003-006-022-07 | 37.7 | 1177.4 08:51:59:febtest:INFO: 19-04 | XA-000-09-004-003-006-020-07 | 31.4 | 1195.1 08:52:00:febtest:INFO: 26-05 | XA-000-09-004-003-006-019-07 | 34.6 | 1189.2 08:52:00:febtest:INFO: 17-06 | XA-000-09-004-003-006-021-07 | 21.9 | 1183.3 08:52:00:febtest:INFO: 24-07 | XA-000-09-004-003-006-014-00 | 37.7 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_11_04-08_50_08 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2256| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 27312 | SIZE: 62x42 | GRADE: A MODULE_NAME: M3DR2B1000121A2 LADDER_NAME: L3DR200012 ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9540', '1.848', '2.5120'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0090', '1.850', '2.8440'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9600', '1.850', '0.7749']