Go Back
FEB_2257 16.10.24 07:34:04
TextEdit.txt
07:34:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:34:04:ST3_Shared:INFO: FEB-Sensor
07:34:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:34:14:ST3_ModuleSelector:INFO: M3DR0T3000543B2
07:34:14:ST3_ModuleSelector:INFO: 29094
07:34:14:febtest:INFO: Testing FEB with SN 2257
07:34:16:smx_tester:INFO: Scanning setup
07:34:16:elinks:INFO: Disabling clock on downlink 0
07:34:16:elinks:INFO: Disabling clock on downlink 1
07:34:16:elinks:INFO: Disabling clock on downlink 2
07:34:16:elinks:INFO: Disabling clock on downlink 3
07:34:16:elinks:INFO: Disabling clock on downlink 4
07:34:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:34:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:34:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:34:16:elinks:INFO: Disabling clock on downlink 0
07:34:16:elinks:INFO: Disabling clock on downlink 1
07:34:16:elinks:INFO: Disabling clock on downlink 2
07:34:16:elinks:INFO: Disabling clock on downlink 3
07:34:16:elinks:INFO: Disabling clock on downlink 4
07:34:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:34:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:34:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:34:16:elinks:INFO: Disabling clock on downlink 0
07:34:16:elinks:INFO: Disabling clock on downlink 1
07:34:16:elinks:INFO: Disabling clock on downlink 2
07:34:16:elinks:INFO: Disabling clock on downlink 3
07:34:16:elinks:INFO: Disabling clock on downlink 4
07:34:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:34:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:34:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:34:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:34:17:elinks:INFO: Disabling clock on downlink 0
07:34:17:elinks:INFO: Disabling clock on downlink 1
07:34:17:elinks:INFO: Disabling clock on downlink 2
07:34:17:elinks:INFO: Disabling clock on downlink 3
07:34:17:elinks:INFO: Disabling clock on downlink 4
07:34:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:34:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:34:17:elinks:INFO: Disabling clock on downlink 0
07:34:17:elinks:INFO: Disabling clock on downlink 1
07:34:17:elinks:INFO: Disabling clock on downlink 2
07:34:17:elinks:INFO: Disabling clock on downlink 3
07:34:17:elinks:INFO: Disabling clock on downlink 4
07:34:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:34:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:34:17:setup_element:INFO: Scanning clock phase
07:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:34:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:34:17:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:34:17:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:34:17:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:34:17:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
07:34:17:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
07:34:17:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:34:17:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:34:17:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
07:34:17:setup_element:INFO: Scanning data phases
07:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:34:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:34:23:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:34:23:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
07:34:23:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
07:34:23:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
07:34:23:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
07:34:23:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________
Data delay found: 22
07:34:23:setup_element:INFO: Eye window for uplink 21: XXXX__________________________________XX
Data delay found: 20
07:34:23:setup_element:INFO: Eye window for uplink 22: XXXXXX_________________________________X
Data delay found: 22
07:34:23:setup_element:INFO: Eye window for uplink 23: XXXXXXXXX_____________________________XX
Data delay found: 23
07:34:23:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
07:34:23:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
07:34:23:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
07:34:23:setup_element:INFO: Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
07:34:23:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
07:34:23:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
07:34:23:setup_element:INFO: Eye window for uplink 30: __________________XXXXX_________________
Data delay found: 0
07:34:23:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
07:34:23:setup_element:INFO: Setting the data phase to 19 for uplink 16
07:34:23:setup_element:INFO: Setting the data phase to 17 for uplink 17
07:34:23:setup_element:INFO: Setting the data phase to 18 for uplink 18
07:34:23:setup_element:INFO: Setting the data phase to 15 for uplink 19
07:34:23:setup_element:INFO: Setting the data phase to 22 for uplink 20
07:34:23:setup_element:INFO: Setting the data phase to 20 for uplink 21
07:34:23:setup_element:INFO: Setting the data phase to 22 for uplink 22
07:34:23:setup_element:INFO: Setting the data phase to 23 for uplink 23
07:34:23:setup_element:INFO: Setting the data phase to 32 for uplink 24
07:34:23:setup_element:INFO: Setting the data phase to 34 for uplink 25
07:34:23:setup_element:INFO: Setting the data phase to 32 for uplink 26
07:34:23:setup_element:INFO: Setting the data phase to 35 for uplink 27
07:34:23:setup_element:INFO: Setting the data phase to 38 for uplink 28
07:34:23:setup_element:INFO: Setting the data phase to 0 for uplink 29
07:34:23:setup_element:INFO: Setting the data phase to 0 for uplink 30
07:34:23:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
07:34:23:setup_element:INFO: Beginning SMX ASICs map scan
07:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:34:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:34:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:34:23:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:34:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:34:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:34:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:34:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:34:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:34:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:34:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:34:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:34:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:34:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:34:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:34:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:34:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:34:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:34:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:34:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:34:26:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 21:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 22:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 23:
Optimal Phase: 23
Window Length: 29
Eye Window: XXXXXXXXX_____________________________XX
Uplink 24:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
Uplink 30:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
==============================================OOO==============================================
07:34:26:setup_element:INFO: Performing Elink synchronization
07:34:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:34:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:34:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:34:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
07:34:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:34:26:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:34:27:febtest:INFO: Init all SMX (CSA): 30
07:34:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:34:40:febtest:INFO: 23-00 | XA-000-09-004-003-015-022-06 | 18.7 | 1177.4
07:34:41:febtest:INFO: 30-01 | XA-000-09-004-003-017-018-03 | 6.1 | 1218.6
07:34:41:febtest:INFO: 21-02 | XA-000-09-004-003-016-020-14 | 31.4 | 1130.0
07:34:41:febtest:INFO: 28-03 | XA-000-09-004-003-016-017-14 | 15.6 | 1189.2
07:34:41:febtest:INFO: 19-04 | XA-000-09-004-003-013-021-05 | 31.4 | 1141.9
07:34:42:febtest:INFO: 26-05 | XA-000-09-004-003-017-015-04 | 15.6 | 1195.1
07:34:42:febtest:INFO: 17-06 | XA-000-09-004-003-015-021-06 | 12.4 | 1218.6
07:34:42:febtest:INFO: 24-07 | XA-000-09-004-003-014-022-11 | 25.1 | 1165.6
07:34:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:34:45:ST3_smx:INFO: chip: 23-0 21.902970 C 1183.292940 mV
07:34:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:34:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:34:45:ST3_smx:INFO: Electrons
07:34:45:ST3_smx:INFO: # loops 0
07:34:47:ST3_smx:INFO: # loops 1
07:34:48:ST3_smx:INFO: # loops 2
07:34:50:ST3_smx:INFO: # loops 3
07:34:51:ST3_smx:INFO: # loops 4
07:34:53:ST3_smx:INFO: Total # of broken channels: 0
07:34:53:ST3_smx:INFO: List of broken channels: []
07:34:53:ST3_smx:INFO: Total # of broken channels: 1
07:34:53:ST3_smx:INFO: List of broken channels: [68]
07:34:55:ST3_smx:INFO: chip: 30-1 6.141382 C 1230.330540 mV
07:34:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:34:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:34:55:ST3_smx:INFO: Electrons
07:34:55:ST3_smx:INFO: # loops 0
07:34:57:ST3_smx:INFO: # loops 1
07:34:58:ST3_smx:INFO: # loops 2
07:35:00:ST3_smx:INFO: # loops 3
07:35:01:ST3_smx:INFO: # loops 4
07:35:03:ST3_smx:INFO: Total # of broken channels: 0
07:35:03:ST3_smx:INFO: List of broken channels: []
07:35:03:ST3_smx:INFO: Total # of broken channels: 0
07:35:03:ST3_smx:INFO: List of broken channels: []
07:35:04:ST3_smx:INFO: chip: 21-2 34.556970 C 1141.874115 mV
07:35:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:04:ST3_smx:INFO: Electrons
07:35:04:ST3_smx:INFO: # loops 0
07:35:06:ST3_smx:INFO: # loops 1
07:35:08:ST3_smx:INFO: # loops 2
07:35:09:ST3_smx:INFO: # loops 3
07:35:11:ST3_smx:INFO: # loops 4
07:35:12:ST3_smx:INFO: Total # of broken channels: 0
07:35:12:ST3_smx:INFO: List of broken channels: []
07:35:12:ST3_smx:INFO: Total # of broken channels: 0
07:35:12:ST3_smx:INFO: List of broken channels: []
07:35:14:ST3_smx:INFO: chip: 28-3 15.590880 C 1195.082160 mV
07:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:14:ST3_smx:INFO: Electrons
07:35:14:ST3_smx:INFO: # loops 0
07:35:16:ST3_smx:INFO: # loops 1
07:35:17:ST3_smx:INFO: # loops 2
07:35:19:ST3_smx:INFO: # loops 3
07:35:20:ST3_smx:INFO: # loops 4
07:35:22:ST3_smx:INFO: Total # of broken channels: 0
07:35:22:ST3_smx:INFO: List of broken channels: []
07:35:22:ST3_smx:INFO: Total # of broken channels: 0
07:35:22:ST3_smx:INFO: List of broken channels: []
07:35:23:ST3_smx:INFO: chip: 19-4 34.556970 C 1153.732915 mV
07:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:23:ST3_smx:INFO: Electrons
07:35:23:ST3_smx:INFO: # loops 0
07:35:25:ST3_smx:INFO: # loops 1
07:35:27:ST3_smx:INFO: # loops 2
07:35:28:ST3_smx:INFO: # loops 3
07:35:30:ST3_smx:INFO: # loops 4
07:35:31:ST3_smx:INFO: Total # of broken channels: 0
07:35:31:ST3_smx:INFO: List of broken channels: []
07:35:31:ST3_smx:INFO: Total # of broken channels: 0
07:35:31:ST3_smx:INFO: List of broken channels: []
07:35:33:ST3_smx:INFO: chip: 26-5 18.745682 C 1200.969315 mV
07:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:33:ST3_smx:INFO: Electrons
07:35:33:ST3_smx:INFO: # loops 0
07:35:35:ST3_smx:INFO: # loops 1
07:35:36:ST3_smx:INFO: # loops 2
07:35:38:ST3_smx:INFO: # loops 3
07:35:39:ST3_smx:INFO: # loops 4
07:35:41:ST3_smx:INFO: Total # of broken channels: 0
07:35:41:ST3_smx:INFO: List of broken channels: []
07:35:41:ST3_smx:INFO: Total # of broken channels: 0
07:35:41:ST3_smx:INFO: List of broken channels: []
07:35:43:ST3_smx:INFO: chip: 17-6 15.590880 C 1224.468235 mV
07:35:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:43:ST3_smx:INFO: Electrons
07:35:43:ST3_smx:INFO: # loops 0
07:35:44:ST3_smx:INFO: # loops 1
07:35:46:ST3_smx:INFO: # loops 2
07:35:47:ST3_smx:INFO: # loops 3
07:35:49:ST3_smx:INFO: # loops 4
07:35:50:ST3_smx:INFO: Total # of broken channels: 0
07:35:50:ST3_smx:INFO: List of broken channels: []
07:35:50:ST3_smx:INFO: Total # of broken channels: 0
07:35:50:ST3_smx:INFO: List of broken channels: []
07:35:52:ST3_smx:INFO: chip: 24-7 28.225000 C 1177.390875 mV
07:35:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:35:52:ST3_smx:INFO: Electrons
07:35:52:ST3_smx:INFO: # loops 0
07:35:54:ST3_smx:INFO: # loops 1
07:35:55:ST3_smx:INFO: # loops 2
07:35:57:ST3_smx:INFO: # loops 3
07:35:58:ST3_smx:INFO: # loops 4
07:36:00:ST3_smx:INFO: Total # of broken channels: 0
07:36:00:ST3_smx:INFO: List of broken channels: []
07:36:00:ST3_smx:INFO: Total # of broken channels: 0
07:36:00:ST3_smx:INFO: List of broken channels: []
07:36:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:36:00:febtest:INFO: 23-00 | XA-000-09-004-003-015-022-06 | 21.9 | 1206.9
07:36:00:febtest:INFO: 30-01 | XA-000-09-004-003-017-018-03 | 9.3 | 1253.7
07:36:01:febtest:INFO: 21-02 | XA-000-09-004-003-016-020-14 | 37.7 | 1159.7
07:36:01:febtest:INFO: 28-03 | XA-000-09-004-003-016-017-14 | 18.7 | 1218.6
07:36:01:febtest:INFO: 19-04 | XA-000-09-004-003-013-021-05 | 37.7 | 1171.5
07:36:01:febtest:INFO: 26-05 | XA-000-09-004-003-017-015-04 | 18.7 | 1224.5
07:36:02:febtest:INFO: 17-06 | XA-000-09-004-003-015-021-06 | 15.6 | 1242.0
07:36:02:febtest:INFO: 24-07 | XA-000-09-004-003-014-022-11 | 28.2 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_16-07_34_04
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2257| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 29094 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M3DR0T3000543B2
LADDER_NAME: L3DR000054
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4140', '1.848', '2.0880']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0390', '1.850', '2.5520']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9490', '1.850', '0.5199']
07:36:10:ST3_Shared:INFO: Listo of operators:Olga B.;