
FEB_2258 18.10.24 07:25:56
TextEdit.txt
07:25:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:25:56:ST3_Shared:INFO: FEB-Sensor 07:25:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:26:14:ST3_ModuleSelector:INFO: New Sensor ID: 03123 07:26:23:ST3_ModuleSelector:INFO: M3DR0T2000542B2 07:26:23:ST3_ModuleSelector:INFO: 03123 07:26:23:febtest:INFO: Testing FEB with SN 2258 07:26:25:smx_tester:INFO: Scanning setup 07:26:25:elinks:INFO: Disabling clock on downlink 0 07:26:25:elinks:INFO: Disabling clock on downlink 1 07:26:25:elinks:INFO: Disabling clock on downlink 2 07:26:25:elinks:INFO: Disabling clock on downlink 3 07:26:25:elinks:INFO: Disabling clock on downlink 4 07:26:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:26:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:25:elinks:INFO: Disabling clock on downlink 0 07:26:25:elinks:INFO: Disabling clock on downlink 1 07:26:25:elinks:INFO: Disabling clock on downlink 2 07:26:25:elinks:INFO: Disabling clock on downlink 3 07:26:25:elinks:INFO: Disabling clock on downlink 4 07:26:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:25:elinks:INFO: Disabling clock on downlink 0 07:26:25:elinks:INFO: Disabling clock on downlink 1 07:26:25:elinks:INFO: Disabling clock on downlink 2 07:26:25:elinks:INFO: Disabling clock on downlink 3 07:26:25:elinks:INFO: Disabling clock on downlink 4 07:26:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:26:25:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:26:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:25:elinks:INFO: Disabling clock on downlink 0 07:26:25:elinks:INFO: Disabling clock on downlink 1 07:26:25:elinks:INFO: Disabling clock on downlink 2 07:26:25:elinks:INFO: Disabling clock on downlink 3 07:26:25:elinks:INFO: Disabling clock on downlink 4 07:26:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:26:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:25:elinks:INFO: Disabling clock on downlink 0 07:26:25:elinks:INFO: Disabling clock on downlink 1 07:26:26:elinks:INFO: Disabling clock on downlink 2 07:26:26:elinks:INFO: Disabling clock on downlink 3 07:26:26:elinks:INFO: Disabling clock on downlink 4 07:26:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:26:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 07:26:26:setup_element:INFO: Scanning clock phase 07:26:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:26:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:26:26:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 07:26:26:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 07:26:26:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXXX__ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 07:26:26:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 07:26:26:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 07:26:26:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________ Clock Delay: 40 07:26:26:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________ Clock Delay: 40 07:26:26:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:26:26:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:26:26:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 ==============================================OOO============================================== 07:26:26:setup_element:INFO: Scanning data phases 07:26:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:32:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:26:32:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 07:26:32:setup_element:INFO: Eye window for uplink 17: XX___________________________________XXX Data delay found: 19 07:26:32:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX Data delay found: 20 07:26:32:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 07:26:32:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX Data delay found: 19 07:26:32:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX Data delay found: 18 07:26:32:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX Data delay found: 19 07:26:32:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX Data delay found: 20 07:26:32:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________ Data delay found: 28 07:26:32:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________ Data delay found: 30 07:26:32:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________ Data delay found: 31 07:26:32:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________ Data delay found: 35 07:26:32:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________ Data delay found: 36 07:26:32:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________ Data delay found: 39 07:26:32:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 07:26:32:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________ Data delay found: 39 07:26:32:setup_element:INFO: Setting the data phase to 20 for uplink 16 07:26:32:setup_element:INFO: Setting the data phase to 19 for uplink 17 07:26:32:setup_element:INFO: Setting the data phase to 20 for uplink 18 07:26:32:setup_element:INFO: Setting the data phase to 17 for uplink 19 07:26:32:setup_element:INFO: Setting the data phase to 19 for uplink 20 07:26:32:setup_element:INFO: Setting the data phase to 18 for uplink 21 07:26:32:setup_element:INFO: Setting the data phase to 19 for uplink 22 07:26:32:setup_element:INFO: Setting the data phase to 20 for uplink 23 07:26:32:setup_element:INFO: Setting the data phase to 28 for uplink 24 07:26:32:setup_element:INFO: Setting the data phase to 30 for uplink 25 07:26:32:setup_element:INFO: Setting the data phase to 31 for uplink 26 07:26:32:setup_element:INFO: Setting the data phase to 35 for uplink 27 07:26:32:setup_element:INFO: Setting the data phase to 36 for uplink 28 07:26:32:setup_element:INFO: Setting the data phase to 39 for uplink 29 07:26:32:setup_element:INFO: Setting the data phase to 39 for uplink 30 07:26:32:setup_element:INFO: Setting the data phase to 39 for uplink 31 ==============================================OOO============================================== 07:26:32:setup_element:INFO: Beginning SMX ASICs map scan 07:26:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:26:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:26:32:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 07:26:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 07:26:32:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 07:26:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:26:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:26:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 07:26:32:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 07:26:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:26:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:26:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 07:26:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 07:26:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:26:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:26:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 07:26:33:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 07:26:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:26:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:26:34:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 32 Window Length: 69 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXXX___ Uplink 17: _____________________________________________________________________XXXXXXXX___ Uplink 18: ______________________________________________________________________XXXXXXX___ Uplink 19: ______________________________________________________________________XXXXXXX___ Uplink 20: ____________________________________________________________________XXXXXXXXXX__ Uplink 21: ____________________________________________________________________XXXXXXXXXX__ Uplink 22: _____________________________________________________________________XXXXXXXX___ Uplink 23: _____________________________________________________________________XXXXXXXX___ Uplink 24: ___________________________________________________________________XXXXXXXXX____ Uplink 25: ___________________________________________________________________XXXXXXXXX____ Uplink 26: _____________________________________________________________________XXXXXXX____ Uplink 27: _____________________________________________________________________XXXXXXX____ Uplink 28: ________________________________________________________________________________ Uplink 29: ________________________________________________________________________________ Uplink 30: _______________________________________________________________________XXXXXXX__ Uplink 31: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 16: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 17: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 18: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 19: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 22: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 23: Optimal Phase: 20 Window Length: 28 Eye Window: XXXXXXX____________________________XXXXX Uplink 24: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 25: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 26: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 27: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 28: Optimal Phase: 36 Window Length: 34 Eye Window: ______________XXXXXX____________________ Uplink 29: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 30: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ Uplink 31: Optimal Phase: 39 Window Length: 34 Eye Window: _________________XXXXXX_________________ ==============================================OOO============================================== 07:26:34:setup_element:INFO: Performing Elink synchronization 07:26:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:26:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 07:26:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:26:35:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:26:35:febtest:INFO: Init all SMX (CSA): 30 07:26:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:26:50:febtest:INFO: 23-00 | XA-000-09-004-003-008-008-09 | 31.4 | 1159.7 07:26:50:febtest:INFO: 30-01 | XA-000-09-004-004-013-013-08 | 25.1 | 1177.4 07:26:50:febtest:INFO: 21-02 | XA-000-09-004-003-009-010-04 | 40.9 | 1130.0 07:26:51:febtest:INFO: 28-03 | XA-000-09-004-003-008-011-09 | 25.1 | 1183.3 07:26:51:febtest:INFO: 19-04 | XA-000-09-004-003-008-014-09 | 25.1 | 1171.5 07:26:51:febtest:INFO: 26-05 | XA-000-09-004-003-009-014-04 | 28.2 | 1165.6 07:26:51:febtest:INFO: 17-06 | XA-000-09-004-003-008-010-09 | 40.9 | 1130.0 07:26:51:febtest:INFO: 24-07 | XA-000-09-004-003-009-009-04 | 25.1 | 1189.2 07:26:52:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:26:54:ST3_smx:INFO: chip: 23-0 31.389742 C 1171.483840 mV 07:26:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:54:ST3_smx:INFO: Electrons 07:26:54:ST3_smx:INFO: # loops 0 07:26:56:ST3_smx:INFO: # loops 1 07:26:58:ST3_smx:INFO: # loops 2 07:26:59:ST3_smx:INFO: # loops 3 07:27:01:ST3_smx:INFO: # loops 4 07:27:03:ST3_smx:INFO: Total # of broken channels: 0 07:27:03:ST3_smx:INFO: List of broken channels: [] 07:27:03:ST3_smx:INFO: Total # of broken channels: 10 07:27:03:ST3_smx:INFO: List of broken channels: [15, 17, 19, 21, 25, 29, 31, 33, 39, 41] 07:27:04:ST3_smx:INFO: chip: 30-1 25.062742 C 1189.190035 mV 07:27:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:04:ST3_smx:INFO: Electrons 07:27:04:ST3_smx:INFO: # loops 0 07:27:06:ST3_smx:INFO: # loops 1 07:27:08:ST3_smx:INFO: # loops 2 07:27:09:ST3_smx:INFO: # loops 3 07:27:11:ST3_smx:INFO: # loops 4 07:27:13:ST3_smx:INFO: Total # of broken channels: 0 07:27:13:ST3_smx:INFO: List of broken channels: [] 07:27:13:ST3_smx:INFO: Total # of broken channels: 1 07:27:13:ST3_smx:INFO: List of broken channels: [126] 07:27:15:ST3_smx:INFO: chip: 21-2 40.898880 C 1141.874115 mV 07:27:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:15:ST3_smx:INFO: Electrons 07:27:15:ST3_smx:INFO: # loops 0 07:27:16:ST3_smx:INFO: # loops 1 07:27:18:ST3_smx:INFO: # loops 2 07:27:20:ST3_smx:INFO: # loops 3 07:27:21:ST3_smx:INFO: # loops 4 07:27:23:ST3_smx:INFO: Total # of broken channels: 0 07:27:23:ST3_smx:INFO: List of broken channels: [] 07:27:23:ST3_smx:INFO: Total # of broken channels: 2 07:27:23:ST3_smx:INFO: List of broken channels: [33, 35] 07:27:25:ST3_smx:INFO: chip: 28-3 25.062742 C 1195.082160 mV 07:27:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:25:ST3_smx:INFO: Electrons 07:27:25:ST3_smx:INFO: # loops 0 07:27:26:ST3_smx:INFO: # loops 1 07:27:28:ST3_smx:INFO: # loops 2 07:27:30:ST3_smx:INFO: # loops 3 07:27:31:ST3_smx:INFO: # loops 4 07:27:33:ST3_smx:INFO: Total # of broken channels: 0 07:27:33:ST3_smx:INFO: List of broken channels: [] 07:27:33:ST3_smx:INFO: Total # of broken channels: 5 07:27:33:ST3_smx:INFO: List of broken channels: [13, 15, 17, 27, 93] 07:27:35:ST3_smx:INFO: chip: 19-4 28.225000 C 1183.292940 mV 07:27:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:35:ST3_smx:INFO: Electrons 07:27:35:ST3_smx:INFO: # loops 0 07:27:36:ST3_smx:INFO: # loops 1 07:27:38:ST3_smx:INFO: # loops 2 07:27:40:ST3_smx:INFO: # loops 3 07:27:41:ST3_smx:INFO: # loops 4 07:27:43:ST3_smx:INFO: Total # of broken channels: 0 07:27:43:ST3_smx:INFO: List of broken channels: [] 07:27:43:ST3_smx:INFO: Total # of broken channels: 3 07:27:43:ST3_smx:INFO: List of broken channels: [11, 17, 67] 07:27:45:ST3_smx:INFO: chip: 26-5 28.225000 C 1177.390875 mV 07:27:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:45:ST3_smx:INFO: Electrons 07:27:45:ST3_smx:INFO: # loops 0 07:27:46:ST3_smx:INFO: # loops 1 07:27:48:ST3_smx:INFO: # loops 2 07:27:50:ST3_smx:INFO: # loops 3 07:27:51:ST3_smx:INFO: # loops 4 07:27:53:ST3_smx:INFO: Total # of broken channels: 0 07:27:53:ST3_smx:INFO: List of broken channels: [] 07:27:53:ST3_smx:INFO: Total # of broken channels: 16 07:27:53:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 35] 07:27:55:ST3_smx:INFO: chip: 17-6 44.073563 C 1135.937260 mV 07:27:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:55:ST3_smx:INFO: Electrons 07:27:55:ST3_smx:INFO: # loops 0 07:27:57:ST3_smx:INFO: # loops 1 07:27:58:ST3_smx:INFO: # loops 2 07:28:00:ST3_smx:INFO: # loops 3 07:28:02:ST3_smx:INFO: # loops 4 07:28:03:ST3_smx:INFO: Total # of broken channels: 0 07:28:03:ST3_smx:INFO: List of broken channels: [] 07:28:03:ST3_smx:INFO: Total # of broken channels: 21 07:28:03:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 35, 37, 41, 43, 53] 07:28:05:ST3_smx:INFO: chip: 24-7 25.062742 C 1195.082160 mV 07:28:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:28:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:28:05:ST3_smx:INFO: Electrons 07:28:05:ST3_smx:INFO: # loops 0 07:28:07:ST3_smx:INFO: # loops 1 07:28:08:ST3_smx:INFO: # loops 2 07:28:10:ST3_smx:INFO: # loops 3 07:28:12:ST3_smx:INFO: # loops 4 07:28:13:ST3_smx:INFO: Total # of broken channels: 0 07:28:13:ST3_smx:INFO: List of broken channels: [] 07:28:13:ST3_smx:INFO: Total # of broken channels: 11 07:28:13:ST3_smx:INFO: List of broken channels: [5, 9, 11, 13, 15, 17, 19, 29, 33, 35, 55] 07:28:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:28:14:febtest:INFO: 23-00 | XA-000-09-004-003-008-008-09 | 34.6 | 1195.1 07:28:14:febtest:INFO: 30-01 | XA-000-09-004-004-013-013-08 | 25.1 | 1212.7 07:28:14:febtest:INFO: 21-02 | XA-000-09-004-003-009-010-04 | 40.9 | 1159.7 07:28:14:febtest:INFO: 28-03 | XA-000-09-004-003-008-011-09 | 25.1 | 1218.6 07:28:15:febtest:INFO: 19-04 | XA-000-09-004-003-008-014-09 | 28.2 | 1206.9 07:28:15:febtest:INFO: 26-05 | XA-000-09-004-003-009-014-04 | 31.4 | 1201.0 07:28:15:febtest:INFO: 17-06 | XA-000-09-004-003-008-010-09 | 44.1 | 1159.7 07:28:15:febtest:INFO: 24-07 | XA-000-09-004-003-009-009-04 | 25.1 | 1218.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_10_18-07_25_56 OPERATOR : Olga B.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2258| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ SENSOR_NAME: 03123 | SIZE: 62x62 | GRADE: U MODULE_NAME: M3DR0T2000542B2 LADDER_NAME: ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5430', '1.848', '2.8050'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0320', '1.850', '2.6770'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.6329']