FEB_2258    09.10.24 11:07:37

TextEdit.txt
            11:07:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:07:37:ST3_Shared:INFO:	                       FEB-Microcable                       
11:07:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:07:37:febtest:INFO:	Testing FEB with SN 2258
11:07:39:smx_tester:INFO:	Scanning setup
11:07:39:elinks:INFO:	Disabling clock on downlink 0
11:07:39:elinks:INFO:	Disabling clock on downlink 1
11:07:39:elinks:INFO:	Disabling clock on downlink 2
11:07:39:elinks:INFO:	Disabling clock on downlink 3
11:07:39:elinks:INFO:	Disabling clock on downlink 4
11:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:39:elinks:INFO:	Disabling clock on downlink 0
11:07:39:elinks:INFO:	Disabling clock on downlink 1
11:07:39:elinks:INFO:	Disabling clock on downlink 2
11:07:39:elinks:INFO:	Disabling clock on downlink 3
11:07:39:elinks:INFO:	Disabling clock on downlink 4
11:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:39:elinks:INFO:	Disabling clock on downlink 0
11:07:39:elinks:INFO:	Disabling clock on downlink 1
11:07:39:elinks:INFO:	Disabling clock on downlink 2
11:07:39:elinks:INFO:	Disabling clock on downlink 3
11:07:39:elinks:INFO:	Disabling clock on downlink 4
11:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:07:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:39:elinks:INFO:	Disabling clock on downlink 0
11:07:39:elinks:INFO:	Disabling clock on downlink 1
11:07:39:elinks:INFO:	Disabling clock on downlink 2
11:07:39:elinks:INFO:	Disabling clock on downlink 3
11:07:39:elinks:INFO:	Disabling clock on downlink 4
11:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:07:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:39:elinks:INFO:	Disabling clock on downlink 0
11:07:39:elinks:INFO:	Disabling clock on downlink 1
11:07:39:elinks:INFO:	Disabling clock on downlink 2
11:07:39:elinks:INFO:	Disabling clock on downlink 3
11:07:39:elinks:INFO:	Disabling clock on downlink 4
11:07:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:07:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:07:40:setup_element:INFO:	Scanning clock phase
11:07:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:40:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:07:40:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:07:40:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:07:40:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:07:40:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:07:40:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:07:40:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:07:40:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:07:40:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:07:40:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
==============================================OOO==============================================
11:07:40:setup_element:INFO:	Scanning data phases
11:07:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:45:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:07:45:setup_element:INFO:	Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
11:07:45:setup_element:INFO:	Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
11:07:45:setup_element:INFO:	Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
11:07:45:setup_element:INFO:	Eye window for uplink 27: ______________XXXXXX____________________
Data delay found: 36
11:07:45:setup_element:INFO:	Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
11:07:45:setup_element:INFO:	Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
11:07:45:setup_element:INFO:	Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
11:07:45:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
11:07:45:setup_element:INFO:	Setting the data phase to 29 for uplink 24
11:07:45:setup_element:INFO:	Setting the data phase to 31 for uplink 25
11:07:45:setup_element:INFO:	Setting the data phase to 32 for uplink 26
11:07:45:setup_element:INFO:	Setting the data phase to 36 for uplink 27
11:07:45:setup_element:INFO:	Setting the data phase to 36 for uplink 28
11:07:45:setup_element:INFO:	Setting the data phase to 39 for uplink 29
11:07:45:setup_element:INFO:	Setting the data phase to 39 for uplink 30
11:07:45:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
11:07:45:setup_element:INFO:	Beginning SMX ASICs map scan
11:07:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:07:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:07:45:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:07:45:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:07:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:07:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:07:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:07:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:07:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:07:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:07:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:07:48:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: ____________________________________________________________________XXXXXXX_____
      Uplink 27: ____________________________________________________________________XXXXXXX_____
      Uplink 28: ___________________________________________________________________XXXXXXXXX____
      Uplink 29: ___________________________________________________________________XXXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 26:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 27:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 29:
      Optimal Phase: 39
      Window Length: 34
      Eye Window: _________________XXXXXX_________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________

==============================================OOO==============================================
11:07:48:setup_element:INFO:	Performing Elink synchronization
11:07:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:07:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:07:48:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:07:48:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
11:07:49:febtest:INFO:	Init all SMX (CSA): 30
11:07:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:07:56:febtest:INFO:	30-01 | XA-000-09-004-004-013-013-08 |  31.4 | 1171.5
11:07:57:febtest:INFO:	28-03 | XA-000-09-004-003-008-011-09 |  28.2 | 1183.3
11:07:57:febtest:INFO:	26-05 | XA-000-09-004-003-009-014-04 |  34.6 | 1165.6
11:07:57:febtest:INFO:	24-07 | XA-000-09-004-003-009-009-04 |  28.2 | 1189.2
11:07:58:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:08:00:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1183.292940 mV
11:08:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:00:ST3_smx:INFO:		Electrons
11:08:00:ST3_smx:INFO:	# loops 0
11:08:02:ST3_smx:INFO:	# loops 1
11:08:03:ST3_smx:INFO:	# loops 2
11:08:05:ST3_smx:INFO:	Total # of broken channels: 0
11:08:05:ST3_smx:INFO:	List of broken channels: []
11:08:05:ST3_smx:INFO:	Total # of broken channels: 0
11:08:05:ST3_smx:INFO:	List of broken channels: []
11:08:07:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1195.082160 mV
11:08:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:07:ST3_smx:INFO:		Electrons
11:08:07:ST3_smx:INFO:	# loops 0
11:08:08:ST3_smx:INFO:	# loops 1
11:08:10:ST3_smx:INFO:	# loops 2
11:08:11:ST3_smx:INFO:	Total # of broken channels: 0
11:08:11:ST3_smx:INFO:	List of broken channels: []
11:08:11:ST3_smx:INFO:	Total # of broken channels: 0
11:08:11:ST3_smx:INFO:	List of broken channels: []
11:08:13:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1177.390875 mV
11:08:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:13:ST3_smx:INFO:		Electrons
11:08:13:ST3_smx:INFO:	# loops 0
11:08:15:ST3_smx:INFO:	# loops 1
11:08:16:ST3_smx:INFO:	# loops 2
11:08:18:ST3_smx:INFO:	Total # of broken channels: 0
11:08:18:ST3_smx:INFO:	List of broken channels: []
11:08:18:ST3_smx:INFO:	Total # of broken channels: 0
11:08:18:ST3_smx:INFO:	List of broken channels: []
11:08:20:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1195.082160 mV
11:08:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:20:ST3_smx:INFO:		Electrons
11:08:20:ST3_smx:INFO:	# loops 0
11:08:21:ST3_smx:INFO:	# loops 1
11:08:23:ST3_smx:INFO:	# loops 2
11:08:24:ST3_smx:INFO:	Total # of broken channels: 0
11:08:24:ST3_smx:INFO:	List of broken channels: []
11:08:24:ST3_smx:INFO:	Total # of broken channels: 0
11:08:24:ST3_smx:INFO:	List of broken channels: []
11:08:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:08:25:febtest:INFO:	30-01 | XA-000-09-004-004-013-013-08 |  31.4 | 1201.0
11:08:25:febtest:INFO:	28-03 | XA-000-09-004-003-008-011-09 |  28.2 | 1212.7
11:08:25:febtest:INFO:	26-05 | XA-000-09-004-003-009-014-04 |  34.6 | 1195.1
11:08:26:febtest:INFO:	24-07 | XA-000-09-004-003-009-009-04 |  31.4 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_09-11_07_37
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2258| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9959', '1.848', '1.4190']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0140', '1.850', '1.2910']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0010', '1.850', '0.2710']