
FEB_2261 17.10.24 09:29:40
TextEdit.txt
09:29:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:29:40:ST3_Shared:INFO: FEB-Microcable 09:29:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:29:40:febtest:INFO: Testing FEB with SN 2261 09:29:41:smx_tester:INFO: Scanning setup 09:29:41:elinks:INFO: Disabling clock on downlink 0 09:29:41:elinks:INFO: Disabling clock on downlink 1 09:29:41:elinks:INFO: Disabling clock on downlink 2 09:29:41:elinks:INFO: Disabling clock on downlink 3 09:29:41:elinks:INFO: Disabling clock on downlink 4 09:29:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:29:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:29:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:29:41:elinks:INFO: Disabling clock on downlink 0 09:29:41:elinks:INFO: Disabling clock on downlink 1 09:29:41:elinks:INFO: Disabling clock on downlink 2 09:29:41:elinks:INFO: Disabling clock on downlink 3 09:29:41:elinks:INFO: Disabling clock on downlink 4 09:29:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:29:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:29:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:29:42:elinks:INFO: Disabling clock on downlink 0 09:29:42:elinks:INFO: Disabling clock on downlink 1 09:29:42:elinks:INFO: Disabling clock on downlink 2 09:29:42:elinks:INFO: Disabling clock on downlink 3 09:29:42:elinks:INFO: Disabling clock on downlink 4 09:29:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:29:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:29:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:29:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:29:42:elinks:INFO: Disabling clock on downlink 0 09:29:42:elinks:INFO: Disabling clock on downlink 1 09:29:42:elinks:INFO: Disabling clock on downlink 2 09:29:42:elinks:INFO: Disabling clock on downlink 3 09:29:42:elinks:INFO: Disabling clock on downlink 4 09:29:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:29:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:29:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:29:42:elinks:INFO: Disabling clock on downlink 0 09:29:42:elinks:INFO: Disabling clock on downlink 1 09:29:42:elinks:INFO: Disabling clock on downlink 2 09:29:42:elinks:INFO: Disabling clock on downlink 3 09:29:42:elinks:INFO: Disabling clock on downlink 4 09:29:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:29:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:29:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:29:42:setup_element:INFO: Scanning clock phase 09:29:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:29:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:29:43:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:29:43:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:29:43:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:29:43:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:29:43:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:29:43:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 09:29:43:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 09:29:43:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________ Clock Delay: 40 09:29:43:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________ Clock Delay: 40 09:29:43:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:29:43:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:29:43:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:29:43:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:29:43:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:29:43:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:29:43:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:29:43:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:29:43:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 09:29:43:setup_element:INFO: Scanning data phases 09:29:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:29:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:29:48:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:29:48:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX Data delay found: 19 09:29:48:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXXX Data delay found: 17 09:29:48:setup_element:INFO: Eye window for uplink 18: X_________________________________XXXXXX Data delay found: 17 09:29:48:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__ Data delay found: 14 09:29:48:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX Data delay found: 19 09:29:48:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 09:29:48:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 09:29:48:setup_element:INFO: Eye window for uplink 23: XXXX____________________________XXXXXXXX Data delay found: 17 09:29:48:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX__________________________ Data delay found: 30 09:29:48:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 09:29:48:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________ Data delay found: 32 09:29:48:setup_element:INFO: Eye window for uplink 27: ______________XXXXX_____________________ Data delay found: 36 09:29:48:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX__XXXXXXXXXXXXXXXXX Data delay found: 7 09:29:48:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXXXXXXXXXXXXXXXXX Data delay found: 8 09:29:48:setup_element:INFO: Eye window for uplink 30: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 2 09:29:48:setup_element:INFO: Eye window for uplink 31: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 2 09:29:48:setup_element:INFO: Setting the data phase to 19 for uplink 16 09:29:48:setup_element:INFO: Setting the data phase to 17 for uplink 17 09:29:48:setup_element:INFO: Setting the data phase to 17 for uplink 18 09:29:48:setup_element:INFO: Setting the data phase to 14 for uplink 19 09:29:48:setup_element:INFO: Setting the data phase to 19 for uplink 20 09:29:48:setup_element:INFO: Setting the data phase to 17 for uplink 21 09:29:48:setup_element:INFO: Setting the data phase to 17 for uplink 22 09:29:48:setup_element:INFO: Setting the data phase to 17 for uplink 23 09:29:48:setup_element:INFO: Setting the data phase to 30 for uplink 24 09:29:48:setup_element:INFO: Setting the data phase to 32 for uplink 25 09:29:48:setup_element:INFO: Setting the data phase to 32 for uplink 26 09:29:48:setup_element:INFO: Setting the data phase to 36 for uplink 27 09:29:48:setup_element:INFO: Setting the data phase to 7 for uplink 28 09:29:48:setup_element:INFO: Setting the data phase to 8 for uplink 29 09:29:48:setup_element:INFO: Setting the data phase to 2 for uplink 30 09:29:48:setup_element:INFO: Setting the data phase to 2 for uplink 31 ==============================================OOO============================================== 09:29:48:setup_element:INFO: Beginning SMX ASICs map scan 09:29:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:29:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:29:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:29:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:29:48:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:29:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:29:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:29:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:29:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:29:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:29:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:29:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:29:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:29:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:29:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:29:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:29:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:29:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:29:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:29:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:29:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:29:51:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXX___ Uplink 17: ______________________________________________________________________XXXXXXX___ Uplink 18: _____________________________________________________________________XXXXXXXX___ Uplink 19: _____________________________________________________________________XXXXXXXX___ Uplink 20: ________________________________________________________________________________ Uplink 21: ________________________________________________________________________________ Uplink 22: ________________________________________________________________________________ Uplink 23: ________________________________________________________________________________ Uplink 24: ______________________________________________________________________XXXXXXX___ Uplink 25: ______________________________________________________________________XXXXXXX___ Uplink 26: _____________________________________________________________________XXXXXXXX___ Uplink 27: _____________________________________________________________________XXXXXXXX___ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 18: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 19: Optimal Phase: 14 Window Length: 34 Eye Window: ________________________________XXXXXX__ Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 17 Window Length: 28 Eye Window: XXXX____________________________XXXXXXXX Uplink 24: Optimal Phase: 30 Window Length: 33 Eye Window: _______XXXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 26: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 27: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 28: Optimal Phase: 7 Window Length: 15 Eye Window: _______________XXXXXX__XXXXXXXXXXXXXXXXX Uplink 29: Optimal Phase: 8 Window Length: 17 Eye Window: _________________XXXXXXXXXXXXXXXXXXXXXXX Uplink 30: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 31: Optimal Phase: 2 Window Length: 6 Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX ==============================================OOO============================================== 09:29:51:setup_element:INFO: Performing Elink synchronization 09:29:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:29:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:29:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:29:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:29:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:29:51:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:29:52:febtest:INFO: Init all SMX (CSA): 30 09:30:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:30:06:febtest:INFO: 23-00 | XA-000-09-004-004-016-018-04 | 34.6 | 1159.7 09:30:06:febtest:INFO: 30-01 | XA-000-09-004-004-016-011-03 | 44.1 | 1130.0 09:30:06:febtest:INFO: 21-02 | XA-000-09-004-004-016-013-03 | 47.3 | 1124.0 09:30:06:febtest:INFO: 28-03 | XA-000-09-004-004-017-020-09 | 25.1 | 1201.0 09:30:07:febtest:INFO: 19-04 | XA-000-09-004-004-016-012-03 | 34.6 | 1165.6 09:30:07:febtest:INFO: 26-05 | XA-000-09-004-004-017-019-09 | 31.4 | 1177.4 09:30:07:febtest:INFO: 17-06 | XA-000-09-004-004-017-012-14 | 37.7 | 1147.8 09:30:07:febtest:INFO: 24-07 | XA-000-09-004-004-018-012-00 | 44.1 | 1135.9 09:30:08:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:30:10:ST3_smx:INFO: chip: 23-0 34.556970 C 1171.483840 mV 09:30:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:10:ST3_smx:INFO: Electrons 09:30:10:ST3_smx:INFO: # loops 0 09:30:12:ST3_smx:INFO: # loops 1 09:30:13:ST3_smx:INFO: # loops 2 09:30:15:ST3_smx:INFO: Total # of broken channels: 0 09:30:15:ST3_smx:INFO: List of broken channels: [] 09:30:15:ST3_smx:INFO: Total # of broken channels: 0 09:30:15:ST3_smx:INFO: List of broken channels: [] 09:30:17:ST3_smx:INFO: chip: 30-1 44.073563 C 1141.874115 mV 09:30:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:17:ST3_smx:INFO: Electrons 09:30:17:ST3_smx:INFO: # loops 0 09:30:18:ST3_smx:INFO: # loops 1 09:30:20:ST3_smx:INFO: # loops 2 09:30:21:ST3_smx:INFO: Total # of broken channels: 0 09:30:21:ST3_smx:INFO: List of broken channels: [] 09:30:21:ST3_smx:INFO: Total # of broken channels: 0 09:30:21:ST3_smx:INFO: List of broken channels: [] 09:30:23:ST3_smx:INFO: chip: 21-2 47.250730 C 1129.995435 mV 09:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:23:ST3_smx:INFO: Electrons 09:30:23:ST3_smx:INFO: # loops 0 09:30:25:ST3_smx:INFO: # loops 1 09:30:26:ST3_smx:INFO: # loops 2 09:30:28:ST3_smx:INFO: Total # of broken channels: 0 09:30:28:ST3_smx:INFO: List of broken channels: [] 09:30:28:ST3_smx:INFO: Total # of broken channels: 4 09:30:28:ST3_smx:INFO: List of broken channels: [112, 114, 116, 120] 09:30:30:ST3_smx:INFO: chip: 28-3 25.062742 C 1212.728715 mV 09:30:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:30:ST3_smx:INFO: Electrons 09:30:30:ST3_smx:INFO: # loops 0 09:30:31:ST3_smx:INFO: # loops 1 09:30:33:ST3_smx:INFO: # loops 2 09:30:34:ST3_smx:INFO: Total # of broken channels: 0 09:30:34:ST3_smx:INFO: List of broken channels: [] 09:30:34:ST3_smx:INFO: Total # of broken channels: 0 09:30:34:ST3_smx:INFO: List of broken channels: [] 09:30:36:ST3_smx:INFO: chip: 19-4 34.556970 C 1177.390875 mV 09:30:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:36:ST3_smx:INFO: Electrons 09:30:36:ST3_smx:INFO: # loops 0 09:30:38:ST3_smx:INFO: # loops 1 09:30:39:ST3_smx:INFO: # loops 2 09:30:41:ST3_smx:INFO: Total # of broken channels: 0 09:30:41:ST3_smx:INFO: List of broken channels: [] 09:30:41:ST3_smx:INFO: Total # of broken channels: 1 09:30:41:ST3_smx:INFO: List of broken channels: [6] 09:30:43:ST3_smx:INFO: chip: 26-5 31.389742 C 1189.190035 mV 09:30:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:43:ST3_smx:INFO: Electrons 09:30:43:ST3_smx:INFO: # loops 0 09:30:44:ST3_smx:INFO: # loops 1 09:30:46:ST3_smx:INFO: # loops 2 09:30:47:ST3_smx:INFO: Total # of broken channels: 0 09:30:47:ST3_smx:INFO: List of broken channels: [] 09:30:47:ST3_smx:INFO: Total # of broken channels: 0 09:30:47:ST3_smx:INFO: List of broken channels: [] 09:30:49:ST3_smx:INFO: chip: 17-6 40.898880 C 1159.654860 mV 09:30:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:49:ST3_smx:INFO: Electrons 09:30:49:ST3_smx:INFO: # loops 0 09:30:51:ST3_smx:INFO: # loops 1 09:30:52:ST3_smx:INFO: # loops 2 09:30:54:ST3_smx:INFO: Total # of broken channels: 0 09:30:54:ST3_smx:INFO: List of broken channels: [] 09:30:54:ST3_smx:INFO: Total # of broken channels: 0 09:30:54:ST3_smx:INFO: List of broken channels: [] 09:30:55:ST3_smx:INFO: chip: 24-7 44.073563 C 1147.806000 mV 09:30:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:30:55:ST3_smx:INFO: Electrons 09:30:55:ST3_smx:INFO: # loops 0 09:30:57:ST3_smx:INFO: # loops 1 09:30:58:ST3_smx:INFO: # loops 2 09:31:00:ST3_smx:INFO: Total # of broken channels: 0 09:31:00:ST3_smx:INFO: List of broken channels: [] 09:31:00:ST3_smx:INFO: Total # of broken channels: 0 09:31:00:ST3_smx:INFO: List of broken channels: [] 09:31:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:31:01:febtest:INFO: 23-00 | XA-000-09-004-004-016-018-04 | 34.6 | 1189.2 09:31:01:febtest:INFO: 30-01 | XA-000-09-004-004-016-011-03 | 44.1 | 1165.6 09:31:01:febtest:INFO: 21-02 | XA-000-09-004-004-016-013-03 | 47.3 | 1153.7 09:31:01:febtest:INFO: 28-03 | XA-000-09-004-004-017-020-09 | 25.1 | 1236.2 09:31:01:febtest:INFO: 19-04 | XA-000-09-004-004-016-012-03 | 34.6 | 1195.1 09:31:02:febtest:INFO: 26-05 | XA-000-09-004-004-017-019-09 | 31.4 | 1206.9 09:31:02:febtest:INFO: 17-06 | XA-000-09-004-004-017-012-14 | 40.9 | 1177.4 09:31:02:febtest:INFO: 24-07 | XA-000-09-004-004-018-012-00 | 47.3 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_17-09_29_40 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2261| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8620', '1.848', '1.8640'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '2.4960'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5255']