Go Back
FEB_2262 22.11.24 11:09:34
TextEdit.txt
11:09:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:34:ST3_Shared:INFO: FEB-ASIC
11:09:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:09:36:ST3_Shared:INFO: STS mode selected
11:09:36:febtest:INFO: Testing FEB with SN 2262
11:09:38:smx_tester:INFO: Scanning setup
11:09:38:elinks:INFO: Disabling clock on downlink 0
11:09:38:elinks:INFO: Disabling clock on downlink 1
11:09:38:elinks:INFO: Disabling clock on downlink 2
11:09:38:elinks:INFO: Disabling clock on downlink 3
11:09:38:elinks:INFO: Disabling clock on downlink 4
11:09:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:09:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:38:elinks:INFO: Disabling clock on downlink 0
11:09:38:elinks:INFO: Disabling clock on downlink 1
11:09:38:elinks:INFO: Disabling clock on downlink 2
11:09:38:elinks:INFO: Disabling clock on downlink 3
11:09:38:elinks:INFO: Disabling clock on downlink 4
11:09:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:09:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:38:elinks:INFO: Disabling clock on downlink 0
11:09:38:elinks:INFO: Disabling clock on downlink 1
11:09:38:elinks:INFO: Disabling clock on downlink 2
11:09:38:elinks:INFO: Disabling clock on downlink 3
11:09:38:elinks:INFO: Disabling clock on downlink 4
11:09:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:09:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:09:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:38:elinks:INFO: Disabling clock on downlink 0
11:09:38:elinks:INFO: Disabling clock on downlink 1
11:09:38:elinks:INFO: Disabling clock on downlink 2
11:09:38:elinks:INFO: Disabling clock on downlink 3
11:09:38:elinks:INFO: Disabling clock on downlink 4
11:09:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:09:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:09:38:elinks:INFO: Disabling clock on downlink 0
11:09:38:elinks:INFO: Disabling clock on downlink 1
11:09:38:elinks:INFO: Disabling clock on downlink 2
11:09:38:elinks:INFO: Disabling clock on downlink 3
11:09:38:elinks:INFO: Disabling clock on downlink 4
11:09:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:09:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:09:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:09:39:setup_element:INFO: Scanning clock phase
11:09:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:09:39:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:09:39:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:09:39:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
11:09:39:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
11:09:39:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:39:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:09:39:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:09:39:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:09:39:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:09:39:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
11:09:39:setup_element:INFO: Scanning data phases
11:09:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:45:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:09:45:setup_element:INFO: Eye window for uplink 16: XX_________________XXXXXXXXXXXXXXXX__XXX
Data delay found: 10
11:09:45:setup_element:INFO: Eye window for uplink 17: ___________________XXXXXXXXXXXXXXXXXXXXX
Data delay found: 9
11:09:45:setup_element:INFO: Eye window for uplink 18: _XXXXXX____________________XXXXXXXXXXXXX
Data delay found: 16
11:09:45:setup_element:INFO: Eye window for uplink 19: XXXXXX_____________________XXXXXXXXXXXXX
Data delay found: 16
11:09:45:setup_element:INFO: Eye window for uplink 20: _XXXX___________________________________
Data delay found: 22
11:09:45:setup_element:INFO: Eye window for uplink 21: XXXX___________________________________X
Data delay found: 21
11:09:45:setup_element:INFO: Eye window for uplink 22: XXXXXX_________________________________X
Data delay found: 22
11:09:45:setup_element:INFO: Eye window for uplink 23: XXXXXXXXX____________________________XXX
Data delay found: 22
11:09:45:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
11:09:45:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
11:09:45:setup_element:INFO: Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
11:09:45:setup_element:INFO: Eye window for uplink 27: ______________XXXXXX____________________
Data delay found: 36
11:09:45:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
11:09:45:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________
Data delay found: 0
11:09:45:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
11:09:45:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXX______________
Data delay found: 2
11:09:45:setup_element:INFO: Setting the data phase to 10 for uplink 16
11:09:45:setup_element:INFO: Setting the data phase to 9 for uplink 17
11:09:45:setup_element:INFO: Setting the data phase to 16 for uplink 18
11:09:45:setup_element:INFO: Setting the data phase to 16 for uplink 19
11:09:45:setup_element:INFO: Setting the data phase to 22 for uplink 20
11:09:45:setup_element:INFO: Setting the data phase to 21 for uplink 21
11:09:45:setup_element:INFO: Setting the data phase to 22 for uplink 22
11:09:45:setup_element:INFO: Setting the data phase to 22 for uplink 23
11:09:45:setup_element:INFO: Setting the data phase to 32 for uplink 24
11:09:45:setup_element:INFO: Setting the data phase to 34 for uplink 25
11:09:45:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:09:45:setup_element:INFO: Setting the data phase to 36 for uplink 27
11:09:45:setup_element:INFO: Setting the data phase to 38 for uplink 28
11:09:45:setup_element:INFO: Setting the data phase to 0 for uplink 29
11:09:45:setup_element:INFO: Setting the data phase to 1 for uplink 30
11:09:45:setup_element:INFO: Setting the data phase to 2 for uplink 31
==============================================OOO==============================================
11:09:45:setup_element:INFO: Beginning SMX ASICs map scan
11:09:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:09:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:09:45:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:09:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:09:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:09:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:09:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:09:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:09:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:09:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:09:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:09:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:09:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:09:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:09:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:09:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:09:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:09:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:09:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:09:48:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXXX___
Uplink 17: ______________________________________________________________________XXXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXX__
Uplink 21: ______________________________________________________________________XXXXXXXX__
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 10
Window Length: 17
Eye Window: XX_________________XXXXXXXXXXXXXXXX__XXX
Uplink 17:
Optimal Phase: 9
Window Length: 19
Eye Window: ___________________XXXXXXXXXXXXXXXXXXXXX
Uplink 18:
Optimal Phase: 16
Window Length: 20
Eye Window: _XXXXXX____________________XXXXXXXXXXXXX
Uplink 19:
Optimal Phase: 16
Window Length: 21
Eye Window: XXXXXX_____________________XXXXXXXXXXXXX
Uplink 20:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 21:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 22:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 23:
Optimal Phase: 22
Window Length: 28
Eye Window: XXXXXXXXX____________________________XXX
Uplink 24:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 25:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 26:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 27:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 30:
Optimal Phase: 1
Window Length: 34
Eye Window: ___________________XXXXXX_______________
Uplink 31:
Optimal Phase: 2
Window Length: 33
Eye Window: ___________________XXXXXXX______________
==============================================OOO==============================================
11:09:48:setup_element:INFO: Performing Elink synchronization
11:09:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:09:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:09:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:09:48:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:09:48:febtest:INFO: Init all SMX (CSA): 30
11:10:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:03:febtest:INFO: 23-00 | XA-000-09-004-019-003-019-03 | 21.9 | 1195.1
11:10:03:febtest:INFO: 30-01 | XA-000-09-004-019-003-008-04 | 28.2 | 1189.2
11:10:03:febtest:INFO: 21-02 | XA-000-09-004-020-017-020-06 | 31.4 | 1171.5
11:10:04:febtest:INFO: 28-03 | XA-000-09-004-019-006-014-15 | 31.4 | 1165.6
11:10:04:febtest:INFO: 19-04 | XA-000-09-004-019-015-025-09 | 25.1 | 1183.3
11:10:04:febtest:INFO: 26-05 | XA-000-09-004-019-014-023-04 | 37.7 | 1153.7
11:10:04:febtest:INFO: 17-06 | XA-000-09-004-019-004-015-12 | 18.7 | 1201.0
11:10:05:febtest:INFO: 24-07 | XA-000-09-004-019-006-004-15 | 37.7 | 1135.9
11:10:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:10:08:ST3_smx:INFO: chip: 23-0 21.902970 C 1206.851500 mV
11:10:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:08:ST3_smx:INFO: Electrons
11:10:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:10:ST3_smx:INFO: ----> Checking Analog response
11:10:10:ST3_smx:INFO: ----> Checking broken channels
11:10:10:ST3_smx:INFO: Total # broken ch: 0
11:10:10:ST3_smx:INFO: List FAST: []
11:10:10:ST3_smx:INFO: List SLOW: []
11:10:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:10:ST3_smx:INFO: Holes
11:10:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:13:ST3_smx:INFO: ----> Checking Analog response
11:10:13:ST3_smx:INFO: ----> Checking broken channels
11:10:13:ST3_smx:INFO: Total # broken ch: 0
11:10:13:ST3_smx:INFO: List FAST: []
11:10:13:ST3_smx:INFO: List SLOW: []
11:10:14:ST3_smx:INFO: chip: 30-1 28.225000 C 1218.600960 mV
11:10:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:14:ST3_smx:INFO: Electrons
11:10:14:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:17:ST3_smx:INFO: ----> Checking Analog response
11:10:17:ST3_smx:INFO: ----> Checking broken channels
11:10:17:ST3_smx:INFO: Total # broken ch: 0
11:10:17:ST3_smx:INFO: List FAST: []
11:10:17:ST3_smx:INFO: List SLOW: []
11:10:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:17:ST3_smx:INFO: Holes
11:10:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:19:ST3_smx:INFO: ----> Checking Analog response
11:10:19:ST3_smx:INFO: ----> Checking broken channels
11:10:20:ST3_smx:INFO: Total # broken ch: 0
11:10:20:ST3_smx:INFO: List FAST: []
11:10:20:ST3_smx:INFO: List SLOW: []
11:10:21:ST3_smx:INFO: chip: 21-2 31.389742 C 1195.082160 mV
11:10:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:21:ST3_smx:INFO: Electrons
11:10:21:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:23:ST3_smx:INFO: ----> Checking Analog response
11:10:23:ST3_smx:INFO: ----> Checking broken channels
11:10:24:ST3_smx:INFO: Total # broken ch: 0
11:10:24:ST3_smx:INFO: List FAST: []
11:10:24:ST3_smx:INFO: List SLOW: []
11:10:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:24:ST3_smx:INFO: Holes
11:10:24:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:26:ST3_smx:INFO: ----> Checking Analog response
11:10:26:ST3_smx:INFO: ----> Checking broken channels
11:10:26:ST3_smx:INFO: Total # broken ch: 0
11:10:26:ST3_smx:INFO: List FAST: []
11:10:26:ST3_smx:INFO: List SLOW: []
11:10:28:ST3_smx:INFO: chip: 28-3 31.389742 C 1177.390875 mV
11:10:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:28:ST3_smx:INFO: Electrons
11:10:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:30:ST3_smx:INFO: ----> Checking Analog response
11:10:30:ST3_smx:INFO: ----> Checking broken channels
11:10:30:ST3_smx:INFO: Total # broken ch: 0
11:10:30:ST3_smx:INFO: List FAST: []
11:10:30:ST3_smx:INFO: List SLOW: []
11:10:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:30:ST3_smx:INFO: Holes
11:10:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:32:ST3_smx:INFO: ----> Checking Analog response
11:10:32:ST3_smx:INFO: ----> Checking broken channels
11:10:33:ST3_smx:INFO: Total # broken ch: 0
11:10:33:ST3_smx:INFO: List FAST: []
11:10:33:ST3_smx:INFO: List SLOW: []
11:10:34:ST3_smx:INFO: chip: 19-4 25.062742 C 1200.969315 mV
11:10:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:34:ST3_smx:INFO: Electrons
11:10:34:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:36:ST3_smx:INFO: ----> Checking Analog response
11:10:36:ST3_smx:INFO: ----> Checking broken channels
11:10:37:ST3_smx:INFO: Total # broken ch: 0
11:10:37:ST3_smx:INFO: List FAST: []
11:10:37:ST3_smx:INFO: List SLOW: []
11:10:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:37:ST3_smx:INFO: Holes
11:10:37:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:39:ST3_smx:INFO: ----> Checking Analog response
11:10:39:ST3_smx:INFO: ----> Checking broken channels
11:10:39:ST3_smx:INFO: Total # broken ch: 0
11:10:39:ST3_smx:INFO: List FAST: []
11:10:39:ST3_smx:INFO: List SLOW: []
11:10:40:ST3_smx:INFO: chip: 26-5 34.556970 C 1171.483840 mV
11:10:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:41:ST3_smx:INFO: Electrons
11:10:41:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:43:ST3_smx:INFO: ----> Checking Analog response
11:10:43:ST3_smx:INFO: ----> Checking broken channels
11:10:43:ST3_smx:INFO: Total # broken ch: 0
11:10:43:ST3_smx:INFO: List FAST: []
11:10:43:ST3_smx:INFO: List SLOW: []
11:10:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:43:ST3_smx:INFO: Holes
11:10:43:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:45:ST3_smx:INFO: ----> Checking Analog response
11:10:45:ST3_smx:INFO: ----> Checking broken channels
11:10:46:ST3_smx:INFO: Total # broken ch: 0
11:10:46:ST3_smx:INFO: List FAST: []
11:10:46:ST3_smx:INFO: List SLOW: []
11:10:47:ST3_smx:INFO: chip: 17-6 18.745682 C 1206.851500 mV
11:10:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:47:ST3_smx:INFO: Electrons
11:10:47:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:49:ST3_smx:INFO: ----> Checking Analog response
11:10:49:ST3_smx:INFO: ----> Checking broken channels
11:10:50:ST3_smx:INFO: Total # broken ch: 0
11:10:50:ST3_smx:INFO: List FAST: []
11:10:50:ST3_smx:INFO: List SLOW: []
11:10:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:50:ST3_smx:INFO: Holes
11:10:50:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:52:ST3_smx:INFO: ----> Checking Analog response
11:10:52:ST3_smx:INFO: ----> Checking broken channels
11:10:52:ST3_smx:INFO: Total # broken ch: 0
11:10:52:ST3_smx:INFO: List FAST: []
11:10:52:ST3_smx:INFO: List SLOW: []
11:10:54:ST3_smx:INFO: chip: 24-7 37.726682 C 1141.874115 mV
11:10:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:54:ST3_smx:INFO: Electrons
11:10:54:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:56:ST3_smx:INFO: ----> Checking Analog response
11:10:56:ST3_smx:INFO: ----> Checking broken channels
11:10:56:ST3_smx:INFO: Total # broken ch: 0
11:10:56:ST3_smx:INFO: List FAST: []
11:10:56:ST3_smx:INFO: List SLOW: []
11:10:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:56:ST3_smx:INFO: Holes
11:10:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:10:58:ST3_smx:INFO: ----> Checking Analog response
11:10:58:ST3_smx:INFO: ----> Checking broken channels
11:10:59:ST3_smx:INFO: Total # broken ch: 0
11:10:59:ST3_smx:INFO: List FAST: []
11:10:59:ST3_smx:INFO: List SLOW: []
11:10:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:59:febtest:INFO: 23-00 | XA-000-09-004-019-003-019-03 | 25.1 | 1224.5
11:10:59:febtest:INFO: 30-01 | XA-000-09-004-019-003-008-04 | 28.2 | 1466.4
11:10:59:febtest:INFO: 21-02 | XA-000-09-004-020-017-020-06 | 28.2 | 1489.0
11:11:00:febtest:INFO: 28-03 | XA-000-09-004-019-006-014-15 | 31.4 | 1201.0
11:11:00:febtest:INFO: 19-04 | XA-000-09-004-019-015-025-09 | 25.1 | 1271.2
11:11:00:febtest:INFO: 26-05 | XA-000-09-004-019-014-023-04 | 37.7 | 1212.7
11:11:00:febtest:INFO: 17-06 | XA-000-09-004-019-004-015-12 | 21.9 | 1230.3
11:11:01:febtest:INFO: 24-07 | XA-000-09-004-019-006-004-15 | 40.9 | 1165.6
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_22-11_09_34
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2262| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8390', '1.848', '2.3370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.850', '2.5840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9850', '1.850', '0.5150']