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FEB_2262 22.11.24 11:22:21
TextEdit.txt
11:22:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:21:ST3_Shared:INFO: FEB-ASIC
11:22:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:22:26:ST3_Shared:INFO: STS mode selected
11:22:26:febtest:INFO: Testing FEB with SN 2262
11:22:27:smx_tester:INFO: Scanning setup
11:22:27:elinks:INFO: Disabling clock on downlink 0
11:22:27:elinks:INFO: Disabling clock on downlink 1
11:22:27:elinks:INFO: Disabling clock on downlink 2
11:22:27:elinks:INFO: Disabling clock on downlink 3
11:22:27:elinks:INFO: Disabling clock on downlink 4
11:22:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:22:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:27:elinks:INFO: Disabling clock on downlink 0
11:22:27:elinks:INFO: Disabling clock on downlink 1
11:22:27:elinks:INFO: Disabling clock on downlink 2
11:22:27:elinks:INFO: Disabling clock on downlink 3
11:22:27:elinks:INFO: Disabling clock on downlink 4
11:22:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:22:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:22:28:elinks:INFO: Disabling clock on downlink 0
11:22:28:elinks:INFO: Disabling clock on downlink 1
11:22:28:elinks:INFO: Disabling clock on downlink 2
11:22:28:elinks:INFO: Disabling clock on downlink 3
11:22:28:elinks:INFO: Disabling clock on downlink 4
11:22:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:22:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:22:28:setup_element:INFO: Scanning clock phase
11:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:22:29:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:22:29:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:22:29:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:22:29:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
11:22:29:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
11:22:29:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:22:29:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:22:29:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
11:22:29:setup_element:INFO: Scanning data phases
11:22:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:22:34:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:22:34:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
11:22:34:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
11:22:34:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________
Data delay found: 23
11:22:34:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
11:22:34:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________
Data delay found: 22
11:22:34:setup_element:INFO: Eye window for uplink 21: XXXX__________________________________XX
Data delay found: 20
11:22:34:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X
Data delay found: 21
11:22:34:setup_element:INFO: Eye window for uplink 23: XXXXXXXX_____________________________XXX
Data delay found: 22
11:22:34:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
11:22:34:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
11:22:34:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
11:22:34:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
11:22:34:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
11:22:34:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
11:22:34:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXXXXXXXXXXX______
Data delay found: 6
11:22:34:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXXXXXXXXXXX______
Data delay found: 6
11:22:34:setup_element:INFO: Setting the data phase to 19 for uplink 16
11:22:34:setup_element:INFO: Setting the data phase to 17 for uplink 17
11:22:34:setup_element:INFO: Setting the data phase to 23 for uplink 18
11:22:34:setup_element:INFO: Setting the data phase to 21 for uplink 19
11:22:34:setup_element:INFO: Setting the data phase to 22 for uplink 20
11:22:34:setup_element:INFO: Setting the data phase to 20 for uplink 21
11:22:34:setup_element:INFO: Setting the data phase to 21 for uplink 22
11:22:34:setup_element:INFO: Setting the data phase to 22 for uplink 23
11:22:34:setup_element:INFO: Setting the data phase to 31 for uplink 24
11:22:34:setup_element:INFO: Setting the data phase to 33 for uplink 25
11:22:34:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:22:34:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:22:34:setup_element:INFO: Setting the data phase to 37 for uplink 28
11:22:34:setup_element:INFO: Setting the data phase to 39 for uplink 29
11:22:34:setup_element:INFO: Setting the data phase to 6 for uplink 30
11:22:34:setup_element:INFO: Setting the data phase to 6 for uplink 31
==============================================OOO==============================================
11:22:34:setup_element:INFO: Beginning SMX ASICs map scan
11:22:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:22:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:22:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:22:34:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:22:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:22:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:22:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:22:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:22:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:22:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:22:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:22:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:22:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:22:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:22:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:22:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:22:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:22:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:22:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:22:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:22:37:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 19:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 20:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 21:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 22:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 23:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 24:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 25:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 26:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 35
Eye Window: _______________XXXXX____________________
Uplink 29:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 30:
Optimal Phase: 6
Window Length: 25
Eye Window: ___________________XXXXXXXXXXXXXXX______
Uplink 31:
Optimal Phase: 6
Window Length: 25
Eye Window: ___________________XXXXXXXXXXXXXXX______
==============================================OOO==============================================
11:22:37:setup_element:INFO: Performing Elink synchronization
11:22:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:22:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:22:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:22:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:22:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:22:37:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:22:38:febtest:INFO: Init all SMX (CSA): 30
11:22:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:22:52:febtest:INFO: 23-00 | XA-000-09-004-019-003-019-03 | 28.2 | 1195.1
11:22:52:febtest:INFO: 30-01 | XA-000-09-004-019-003-008-04 | 28.2 | 1242.0
11:22:52:febtest:INFO: 21-02 | XA-000-09-004-020-017-020-06 | 31.4 | 1230.3
11:22:53:febtest:INFO: 28-03 | XA-000-09-004-019-006-014-15 | 37.7 | 1165.6
11:22:53:febtest:INFO: 19-04 | XA-000-09-004-019-015-025-09 | 28.2 | 1212.7
11:22:53:febtest:INFO: 26-05 | XA-000-09-004-019-014-023-04 | 40.9 | 1165.6
11:22:53:febtest:INFO: 17-06 | XA-000-09-004-019-004-015-12 | 25.1 | 1206.9
11:22:53:febtest:INFO: 24-07 | XA-000-09-004-019-006-004-15 | 40.9 | 1141.9
11:22:54:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:22:57:ST3_smx:INFO: chip: 23-0 28.225000 C 1206.851500 mV
11:22:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:57:ST3_smx:INFO: Electrons
11:22:57:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:22:59:ST3_smx:INFO: ----> Checking Analog response
11:22:59:ST3_smx:INFO: ----> Checking broken channels
11:22:59:ST3_smx:INFO: Total # broken ch: 0
11:22:59:ST3_smx:INFO: List FAST: []
11:22:59:ST3_smx:INFO: List SLOW: []
11:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:22:59:ST3_smx:INFO: Holes
11:22:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:02:ST3_smx:INFO: ----> Checking Analog response
11:23:02:ST3_smx:INFO: ----> Checking broken channels
11:23:02:ST3_smx:INFO: Total # broken ch: 0
11:23:02:ST3_smx:INFO: List FAST: []
11:23:02:ST3_smx:INFO: List SLOW: []
11:23:04:ST3_smx:INFO: chip: 30-1 28.225000 C 1311.880960 mV
11:23:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:04:ST3_smx:INFO: Electrons
11:23:04:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:06:ST3_smx:INFO: ----> Checking Analog response
11:23:06:ST3_smx:INFO: ----> Checking broken channels
11:23:06:ST3_smx:INFO: Total # broken ch: 0
11:23:06:ST3_smx:INFO: List FAST: []
11:23:06:ST3_smx:INFO: List SLOW: []
11:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:06:ST3_smx:INFO: Holes
11:23:06:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:08:ST3_smx:INFO: ----> Checking Analog response
11:23:08:ST3_smx:INFO: ----> Checking broken channels
11:23:09:ST3_smx:INFO: Total # broken ch: 0
11:23:09:ST3_smx:INFO: List FAST: []
11:23:09:ST3_smx:INFO: List SLOW: []
11:23:10:ST3_smx:INFO: chip: 21-2 31.389742 C 1306.088235 mV
11:23:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:10:ST3_smx:INFO: Electrons
11:23:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:12:ST3_smx:INFO: ----> Checking Analog response
11:23:12:ST3_smx:INFO: ----> Checking broken channels
11:23:13:ST3_smx:INFO: Total # broken ch: 0
11:23:13:ST3_smx:INFO: List FAST: []
11:23:13:ST3_smx:INFO: List SLOW: []
11:23:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:13:ST3_smx:INFO: Holes
11:23:13:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:15:ST3_smx:INFO: ----> Checking Analog response
11:23:15:ST3_smx:INFO: ----> Checking broken channels
11:23:15:ST3_smx:INFO: Total # broken ch: 0
11:23:15:ST3_smx:INFO: List FAST: []
11:23:15:ST3_smx:INFO: List SLOW: []
11:23:17:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV
11:23:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:17:ST3_smx:INFO: Electrons
11:23:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:19:ST3_smx:INFO: ----> Checking Analog response
11:23:19:ST3_smx:INFO: ----> Checking broken channels
11:23:20:ST3_smx:INFO: Total # broken ch: 0
11:23:20:ST3_smx:INFO: List FAST: []
11:23:20:ST3_smx:INFO: List SLOW: []
11:23:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:20:ST3_smx:INFO: Holes
11:23:20:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:22:ST3_smx:INFO: ----> Checking Analog response
11:23:22:ST3_smx:INFO: ----> Checking broken channels
11:23:22:ST3_smx:INFO: Total # broken ch: 0
11:23:22:ST3_smx:INFO: List FAST: []
11:23:22:ST3_smx:INFO: List SLOW: []
11:23:24:ST3_smx:INFO: chip: 19-4 28.225000 C 1259.567515 mV
11:23:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:24:ST3_smx:INFO: Electrons
11:23:24:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:26:ST3_smx:INFO: ----> Checking Analog response
11:23:26:ST3_smx:INFO: ----> Checking broken channels
11:23:27:ST3_smx:INFO: Total # broken ch: 0
11:23:27:ST3_smx:INFO: List FAST: []
11:23:27:ST3_smx:INFO: List SLOW: []
11:23:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:27:ST3_smx:INFO: Holes
11:23:27:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:29:ST3_smx:INFO: ----> Checking Analog response
11:23:29:ST3_smx:INFO: ----> Checking broken channels
11:23:29:ST3_smx:INFO: Total # broken ch: 0
11:23:29:ST3_smx:INFO: List FAST: []
11:23:29:ST3_smx:INFO: List SLOW: []
11:23:31:ST3_smx:INFO: chip: 26-5 40.898880 C 1212.728715 mV
11:23:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:31:ST3_smx:INFO: Electrons
11:23:31:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:33:ST3_smx:INFO: ----> Checking Analog response
11:23:33:ST3_smx:INFO: ----> Checking broken channels
11:23:33:ST3_smx:INFO: Total # broken ch: 0
11:23:33:ST3_smx:INFO: List FAST: []
11:23:33:ST3_smx:INFO: List SLOW: []
11:23:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:23:33:ST3_smx:INFO: Holes
11:23:33:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
11:23:36:ST3_smx:INFO: ----> Checking Analog response
11:23:36:ST3_smx:INFO: ----> Checking broken channels
11:23:36:ST3_smx:INFO: Total # broken ch: 0
11:23:36:ST3_smx:INFO: List FAST: []
11:23:36:ST3_smx:INFO: List SLOW: []
Traceback (most recent call last):
File "./febtest.py", line 788, in DoFEB_AsicTest
smx.ReadDiagnosticsAll()
File "/home/cbm/ST3_v2.29.38/lib/ST3_smx.py", line 674, in ReadDiagnosticsAll
data.append(self.ReadTemp() )
File "/home/cbm/ST3_v2.29.38/lib/ST3_smx.py", line 744, in ReadTemp
v_thr = self.ReadDiag("Temp")
File "/home/cbm/ST3_v2.29.38/lib/ST3_smx.py", line 697, in ReadDiag
self.smx.write(130,22,dac_thr)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 51, in write
return self.ack_monitor.check_write()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 63, in check_write
return self._check(self._check_write, timeout)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 60, in _check
raise AckNotReceived
hctsp.ack_monitor.AckNotReceived: Ack frame not received