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FEB_2263 29.10.24 07:45:14
Info
07:45:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:45:14:ST3_Shared:INFO: FEB-Sensor
07:45:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:45:21:ST3_ModuleSelector:INFO: M3DR2T3000123B2
07:45:21:ST3_ModuleSelector:INFO: 22363
07:45:21:febtest:INFO: Testing FEB with SN 2263
07:45:23:smx_tester:INFO: Scanning setup
07:45:23:elinks:INFO: Disabling clock on downlink 0
07:45:23:elinks:INFO: Disabling clock on downlink 1
07:45:23:elinks:INFO: Disabling clock on downlink 2
07:45:23:elinks:INFO: Disabling clock on downlink 3
07:45:23:elinks:INFO: Disabling clock on downlink 4
07:45:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:45:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:23:elinks:INFO: Disabling clock on downlink 0
07:45:23:elinks:INFO: Disabling clock on downlink 1
07:45:23:elinks:INFO: Disabling clock on downlink 2
07:45:23:elinks:INFO: Disabling clock on downlink 3
07:45:23:elinks:INFO: Disabling clock on downlink 4
07:45:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:23:elinks:INFO: Disabling clock on downlink 0
07:45:23:elinks:INFO: Disabling clock on downlink 1
07:45:23:elinks:INFO: Disabling clock on downlink 2
07:45:23:elinks:INFO: Disabling clock on downlink 3
07:45:23:elinks:INFO: Disabling clock on downlink 4
07:45:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:45:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:45:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:23:elinks:INFO: Disabling clock on downlink 0
07:45:23:elinks:INFO: Disabling clock on downlink 1
07:45:23:elinks:INFO: Disabling clock on downlink 2
07:45:23:elinks:INFO: Disabling clock on downlink 3
07:45:23:elinks:INFO: Disabling clock on downlink 4
07:45:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:45:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:24:elinks:INFO: Disabling clock on downlink 0
07:45:24:elinks:INFO: Disabling clock on downlink 1
07:45:24:elinks:INFO: Disabling clock on downlink 2
07:45:24:elinks:INFO: Disabling clock on downlink 3
07:45:24:elinks:INFO: Disabling clock on downlink 4
07:45:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:45:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
07:45:24:setup_element:INFO: Scanning clock phase
07:45:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:45:24:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:45:24:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:45:24:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:45:24:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:45:24:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:45:24:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:45:24:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:45:24:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
07:45:24:setup_element:INFO: Scanning data phases
07:45:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:30:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:45:30:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
07:45:30:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
07:45:30:setup_element:INFO: Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
07:45:30:setup_element:INFO: Eye window for uplink 19: XXX________________________________XXXXX
Data delay found: 18
07:45:30:setup_element:INFO: Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
07:45:30:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
07:45:30:setup_element:INFO: Eye window for uplink 22: XXXXX_________________________________XX
Data delay found: 21
07:45:30:setup_element:INFO: Eye window for uplink 23: XXXXXXXX_____________________________XXX
Data delay found: 22
07:45:30:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
07:45:30:setup_element:INFO: Eye window for uplink 25: ____________XXXXXX______________________
Data delay found: 34
07:45:30:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
07:45:30:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
07:45:30:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
07:45:30:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________________
Data delay found: 0
07:45:30:setup_element:INFO: Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
07:45:30:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
07:45:30:setup_element:INFO: Setting the data phase to 18 for uplink 16
07:45:30:setup_element:INFO: Setting the data phase to 15 for uplink 17
07:45:30:setup_element:INFO: Setting the data phase to 20 for uplink 18
07:45:30:setup_element:INFO: Setting the data phase to 18 for uplink 19
07:45:30:setup_element:INFO: Setting the data phase to 20 for uplink 20
07:45:30:setup_element:INFO: Setting the data phase to 18 for uplink 21
07:45:30:setup_element:INFO: Setting the data phase to 21 for uplink 22
07:45:30:setup_element:INFO: Setting the data phase to 22 for uplink 23
07:45:30:setup_element:INFO: Setting the data phase to 32 for uplink 24
07:45:30:setup_element:INFO: Setting the data phase to 34 for uplink 25
07:45:30:setup_element:INFO: Setting the data phase to 31 for uplink 26
07:45:30:setup_element:INFO: Setting the data phase to 35 for uplink 27
07:45:30:setup_element:INFO: Setting the data phase to 37 for uplink 28
07:45:30:setup_element:INFO: Setting the data phase to 0 for uplink 29
07:45:30:setup_element:INFO: Setting the data phase to 39 for uplink 30
07:45:30:setup_element:INFO: Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
07:45:30:setup_element:INFO: Beginning SMX ASICs map scan
07:45:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:45:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:45:30:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:45:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:45:30:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:45:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:45:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:45:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:45:30:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:45:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:45:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:45:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:45:31:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:45:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:45:31:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:45:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:45:31:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:45:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:45:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:45:33:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 16: ______________________________________________________________________XXXXXX____
Uplink 17: ______________________________________________________________________XXXXXX____
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 19:
Optimal Phase: 18
Window Length: 32
Eye Window: XXX________________________________XXXXX
Uplink 20:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 21:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 22:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 23:
Optimal Phase: 22
Window Length: 29
Eye Window: XXXXXXXX_____________________________XXX
Uplink 24:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 25:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 26:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 27:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 28:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 29:
Optimal Phase: 0
Window Length: 35
Eye Window: __________________XXXXX_________________
Uplink 30:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
Uplink 31:
Optimal Phase: 39
Window Length: 33
Eye Window: ________________XXXXXXX_________________
==============================================OOO==============================================
07:45:33:setup_element:INFO: Performing Elink synchronization
07:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:45:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:45:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
07:45:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:45:33:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:45:33:febtest:INFO: Init all SMX (CSA): 30
07:45:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:45:48:febtest:INFO: 23-00 | XA-000-09-004-004-018-017-07 | 9.3 | 1224.5
07:45:48:febtest:INFO: 30-01 | XA-000-09-004-004-017-018-09 | 9.3 | 1212.7
07:45:49:febtest:INFO: 21-02 | XA-000-09-004-004-016-016-04 | 25.1 | 1165.6
07:45:49:febtest:INFO: 28-03 | XA-000-09-004-004-016-017-04 | 15.6 | 1189.2
07:45:49:febtest:INFO: 19-04 | XA-000-09-004-004-017-016-09 | 18.7 | 1183.3
07:45:49:febtest:INFO: 26-05 | XA-000-09-004-004-018-018-07 | 18.7 | 1183.3
07:45:49:febtest:INFO: 17-06 | XA-000-09-004-004-016-015-03 | 21.9 | 1183.3
07:45:50:febtest:INFO: 24-07 | XA-000-09-004-004-017-017-09 | 18.7 | 1183.3
07:45:51:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:45:53:ST3_smx:INFO: chip: 23-0 9.288730 C 1236.187875 mV
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_smx:INFO: Electrons
07:45:53:ST3_smx:INFO: # loops 0
07:45:54:ST3_smx:INFO: # loops 1
07:45:56:ST3_smx:INFO: # loops 2
07:45:58:ST3_smx:INFO: # loops 3
07:45:59:ST3_smx:INFO: # loops 4
07:46:01:ST3_smx:INFO: Total # of broken channels: 1
07:46:01:ST3_smx:INFO: List of broken channels: [125]
07:46:01:ST3_smx:INFO: Total # of broken channels: 17
07:46:01:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 125]
07:46:03:ST3_smx:INFO: chip: 30-1 12.438562 C 1218.600960 mV
07:46:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:03:ST3_smx:INFO: Electrons
07:46:03:ST3_smx:INFO: # loops 0
07:46:05:ST3_smx:INFO: # loops 1
07:46:06:ST3_smx:INFO: # loops 2
07:46:08:ST3_smx:INFO: # loops 3
07:46:09:ST3_smx:INFO: # loops 4
07:46:11:ST3_smx:INFO: Total # of broken channels: 0
07:46:11:ST3_smx:INFO: List of broken channels: []
07:46:11:ST3_smx:INFO: Total # of broken channels: 0
07:46:11:ST3_smx:INFO: List of broken channels: []
07:46:13:ST3_smx:INFO: chip: 21-2 25.062742 C 1177.390875 mV
07:46:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:13:ST3_smx:INFO: Electrons
07:46:13:ST3_smx:INFO: # loops 0
07:46:15:ST3_smx:INFO: # loops 1
07:46:16:ST3_smx:INFO: # loops 2
07:46:18:ST3_smx:INFO: # loops 3
07:46:19:ST3_smx:INFO: # loops 4
07:46:21:ST3_smx:INFO: Total # of broken channels: 2
07:46:21:ST3_smx:INFO: List of broken channels: [124, 125]
07:46:21:ST3_smx:INFO: Total # of broken channels: 4
07:46:21:ST3_smx:INFO: List of broken channels: [19, 29, 124, 125]
07:46:23:ST3_smx:INFO: chip: 28-3 18.745682 C 1200.969315 mV
07:46:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:23:ST3_smx:INFO: Electrons
07:46:23:ST3_smx:INFO: # loops 0
07:46:24:ST3_smx:INFO: # loops 1
07:46:26:ST3_smx:INFO: # loops 2
07:46:28:ST3_smx:INFO: # loops 3
07:46:29:ST3_smx:INFO: # loops 4
07:46:31:ST3_smx:INFO: Total # of broken channels: 2
07:46:31:ST3_smx:INFO: List of broken channels: [124, 125]
07:46:31:ST3_smx:INFO: Total # of broken channels: 17
07:46:31:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 19, 21, 23, 25, 29, 31, 33, 35, 124, 125]
07:46:33:ST3_smx:INFO: chip: 19-4 18.745682 C 1195.082160 mV
07:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:33:ST3_smx:INFO: Electrons
07:46:33:ST3_smx:INFO: # loops 0
07:46:34:ST3_smx:INFO: # loops 1
07:46:36:ST3_smx:INFO: # loops 2
07:46:38:ST3_smx:INFO: # loops 3
07:46:39:ST3_smx:INFO: # loops 4
07:46:41:ST3_smx:INFO: Total # of broken channels: 1
07:46:41:ST3_smx:INFO: List of broken channels: [127]
07:46:41:ST3_smx:INFO: Total # of broken channels: 10
07:46:41:ST3_smx:INFO: List of broken channels: [11, 13, 15, 17, 19, 23, 27, 31, 87, 127]
07:46:43:ST3_smx:INFO: chip: 26-5 18.745682 C 1195.082160 mV
07:46:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:43:ST3_smx:INFO: Electrons
07:46:43:ST3_smx:INFO: # loops 0
07:46:44:ST3_smx:INFO: # loops 1
07:46:46:ST3_smx:INFO: # loops 2
07:46:48:ST3_smx:INFO: # loops 3
07:46:49:ST3_smx:INFO: # loops 4
07:46:51:ST3_smx:INFO: Total # of broken channels: 0
07:46:51:ST3_smx:INFO: List of broken channels: []
07:46:51:ST3_smx:INFO: Total # of broken channels: 11
07:46:51:ST3_smx:INFO: List of broken channels: [9, 11, 13, 15, 17, 19, 21, 23, 25, 29, 31]
07:46:52:ST3_smx:INFO: chip: 17-6 25.062742 C 1189.190035 mV
07:46:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:52:ST3_smx:INFO: Electrons
07:46:52:ST3_smx:INFO: # loops 0
07:46:54:ST3_smx:INFO: # loops 1
07:46:56:ST3_smx:INFO: # loops 2
07:46:57:ST3_smx:INFO: # loops 3
07:46:59:ST3_smx:INFO: # loops 4
07:47:01:ST3_smx:INFO: Total # of broken channels: 0
07:47:01:ST3_smx:INFO: List of broken channels: []
07:47:01:ST3_smx:INFO: Total # of broken channels: 14
07:47:01:ST3_smx:INFO: List of broken channels: [9, 11, 13, 17, 23, 29, 31, 33, 37, 39, 43, 45, 49, 55]
07:47:02:ST3_smx:INFO: chip: 24-7 18.745682 C 1195.082160 mV
07:47:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:47:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:47:02:ST3_smx:INFO: Electrons
07:47:02:ST3_smx:INFO: # loops 0
07:47:04:ST3_smx:INFO: # loops 1
07:47:05:ST3_smx:INFO: # loops 2
07:47:07:ST3_smx:INFO: # loops 3
07:47:09:ST3_smx:INFO: # loops 4
07:47:10:ST3_smx:INFO: Total # of broken channels: 1
07:47:10:ST3_smx:INFO: List of broken channels: [124]
07:47:10:ST3_smx:INFO: Total # of broken channels: 30
07:47:10:ST3_smx:INFO: List of broken channels: [3, 5, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 41, 43, 45, 47, 49, 63, 73, 79, 81, 91, 95, 99, 101, 124]
07:47:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:47:11:febtest:INFO: 23-00 | XA-000-09-004-004-018-017-07 | 9.3 | 1265.4
07:47:11:febtest:INFO: 30-01 | XA-000-09-004-004-017-018-09 | 12.4 | 1242.0
07:47:11:febtest:INFO: 21-02 | XA-000-09-004-004-016-016-04 | 28.2 | 1195.1
07:47:12:febtest:INFO: 28-03 | XA-000-09-004-004-016-017-04 | 18.7 | 1218.6
07:47:12:febtest:INFO: 19-04 | XA-000-09-004-004-017-016-09 | 21.9 | 1212.7
07:47:12:febtest:INFO: 26-05 | XA-000-09-004-004-018-018-07 | 21.9 | 1218.6
07:47:12:febtest:INFO: 17-06 | XA-000-09-004-004-016-015-03 | 25.1 | 1206.9
07:47:12:febtest:INFO: 24-07 | XA-000-09-004-004-017-017-09 | 21.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_29-07_45_14
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2263| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 22363 | SIZE: 62x62 | GRADE: A
MODULE_NAME: M3DR2T3000123B2
LADDER_NAME: L3DR200012
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5010', '1.848', '1.8630']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0030', '1.850', '2.5840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9590', '1.850', '0.5283']
07:48:07:ST3_Shared:INFO: Listo of operators:Olga B.;