FEB_2264 25.11.24 13:49:41
Info
13:49:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:49:41:ST3_Shared:INFO: FEB-ASIC
13:49:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:49:41:febtest:INFO: Testing FEB with SN 2264
13:49:43:smx_tester:INFO: Scanning setup
13:49:43:elinks:INFO: Disabling clock on downlink 0
13:49:43:elinks:INFO: Disabling clock on downlink 1
13:49:43:elinks:INFO: Disabling clock on downlink 2
13:49:43:elinks:INFO: Disabling clock on downlink 3
13:49:43:elinks:INFO: Disabling clock on downlink 4
13:49:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:49:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:49:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:49:43:elinks:INFO: Disabling clock on downlink 0
13:49:43:elinks:INFO: Disabling clock on downlink 1
13:49:43:elinks:INFO: Disabling clock on downlink 2
13:49:43:elinks:INFO: Disabling clock on downlink 3
13:49:43:elinks:INFO: Disabling clock on downlink 4
13:49:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:49:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:49:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:49:43:elinks:INFO: Disabling clock on downlink 0
13:49:43:elinks:INFO: Disabling clock on downlink 1
13:49:43:elinks:INFO: Disabling clock on downlink 2
13:49:43:elinks:INFO: Disabling clock on downlink 3
13:49:43:elinks:INFO: Disabling clock on downlink 4
13:49:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:49:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:49:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:49:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:49:43:elinks:INFO: Disabling clock on downlink 0
13:49:43:elinks:INFO: Disabling clock on downlink 1
13:49:43:elinks:INFO: Disabling clock on downlink 2
13:49:43:elinks:INFO: Disabling clock on downlink 3
13:49:43:elinks:INFO: Disabling clock on downlink 4
13:49:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:49:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:49:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:49:43:elinks:INFO: Disabling clock on downlink 0
13:49:43:elinks:INFO: Disabling clock on downlink 1
13:49:44:elinks:INFO: Disabling clock on downlink 2
13:49:44:elinks:INFO: Disabling clock on downlink 3
13:49:44:elinks:INFO: Disabling clock on downlink 4
13:49:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:49:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:49:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
13:49:44:setup_element:INFO: Scanning clock phase
13:49:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:49:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:49:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:49:44:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:44:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:44:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:44:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:49:44:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:49:44:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:49:44:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:49:44:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:49:44:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:49:44:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:49:44:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
13:49:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
13:49:44:setup_element:INFO: Scanning data phases
13:49:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:49:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:49:50:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:49:50:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
13:49:50:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXX_
Data delay found: 17
13:49:50:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
13:49:50:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
13:49:50:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________
Data delay found: 22
13:49:50:setup_element:INFO: Eye window for uplink 21: XXXXX__________________________________X
Data delay found: 21
13:49:50:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________
Data delay found: 23
13:49:50:setup_element:INFO: Eye window for uplink 23: XXXXXXXXX_____________________________XX
Data delay found: 23
13:49:50:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
13:49:50:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
13:49:50:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
13:49:50:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
13:49:50:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
13:49:50:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
13:49:50:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
13:49:50:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
13:49:50:setup_element:INFO: Setting the data phase to 19 for uplink 16
13:49:50:setup_element:INFO: Setting the data phase to 17 for uplink 17
13:49:50:setup_element:INFO: Setting the data phase to 18 for uplink 18
13:49:50:setup_element:INFO: Setting the data phase to 16 for uplink 19
13:49:50:setup_element:INFO: Setting the data phase to 22 for uplink 20
13:49:50:setup_element:INFO: Setting the data phase to 21 for uplink 21
13:49:50:setup_element:INFO: Setting the data phase to 23 for uplink 22
13:49:50:setup_element:INFO: Setting the data phase to 23 for uplink 23
13:49:50:setup_element:INFO: Setting the data phase to 30 for uplink 24
13:49:50:setup_element:INFO: Setting the data phase to 33 for uplink 25
13:49:50:setup_element:INFO: Setting the data phase to 31 for uplink 26
13:49:50:setup_element:INFO: Setting the data phase to 34 for uplink 27
13:49:50:setup_element:INFO: Setting the data phase to 35 for uplink 28
13:49:50:setup_element:INFO: Setting the data phase to 38 for uplink 29
13:49:50:setup_element:INFO: Setting the data phase to 38 for uplink 30
13:49:50:setup_element:INFO: Setting the data phase to 38 for uplink 31
==============================================OOO==============================================
13:49:50:setup_element:INFO: Beginning SMX ASICs map scan
13:49:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:49:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:49:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:49:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:49:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:49:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:49:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:49:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:49:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:49:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:49:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:49:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:49:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:49:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:49:51:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:49:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:49:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:49:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:49:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:49:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:49:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:49:52:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXXX___
Uplink 17: _____________________________________________________________________XXXXXXXX___
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ________________________________________________________________________________
Uplink 21: ________________________________________________________________________________
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: ____________________________________________________________________XXXXXXXX____
Uplink 25: ____________________________________________________________________XXXXXXXX____
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXX_
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 20:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 21:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 22:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 23:
Optimal Phase: 23
Window Length: 29
Eye Window: XXXXXXXXX_____________________________XX
Uplink 24:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 25:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 26:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 27:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 30:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
==============================================OOO==============================================
13:49:52:setup_element:INFO: Performing Elink synchronization
13:49:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:49:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:49:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:49:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
13:49:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:49:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:49:53:febtest:INFO: Init all SMX (CSA): 30
13:50:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:50:08:febtest:INFO: 23-00 | XA-000-09-004-015-014-026-15 | 15.6 | 1253.7
13:50:08:febtest:INFO: 30-01 | XA-000-09-004-015-012-003-11 | 25.1 | 1165.6
13:50:08:febtest:INFO: 21-02 | XA-000-09-004-015-017-007-00 | 31.4 | 1159.7
13:50:08:febtest:INFO: 28-03 | XA-000-09-004-015-014-003-08 | 40.9 | 1106.2
13:50:09:febtest:INFO: 19-04 | XA-000-09-004-015-005-009-10 | 21.9 | 1195.1
13:50:09:febtest:INFO: 26-05 | XA-000-09-004-010-003-018-11 | 31.4 | 1141.9
13:50:09:febtest:INFO: 17-06 | XA-000-09-004-015-006-021-03 | 31.4 | 1165.6
13:50:09:febtest:INFO: 24-07 | XA-000-09-004-010-002-012-01 | 28.2 | 1141.9
13:50:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:50:12:ST3_smx:INFO: chip: 23-0 15.590880 C 1311.880960 mV
13:50:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:12:ST3_smx:INFO: Electrons
13:50:12:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:15:ST3_smx:INFO: ----> Checking Analog response
13:50:15:ST3_smx:INFO: ----> Checking broken channels
13:50:15:ST3_smx:INFO: Total # broken ch: 0
13:50:15:ST3_smx:INFO: List FAST: []
13:50:15:ST3_smx:INFO: List SLOW: []
13:50:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:15:ST3_smx:INFO: Holes
13:50:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:17:ST3_smx:INFO: ----> Checking Analog response
13:50:17:ST3_smx:INFO: ----> Checking broken channels
13:50:18:ST3_smx:INFO: Total # broken ch: 0
13:50:18:ST3_smx:INFO: List FAST: []
13:50:18:ST3_smx:INFO: List SLOW: []
13:50:19:ST3_smx:INFO: chip: 30-1 25.062742 C 1177.390875 mV
13:50:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:19:ST3_smx:INFO: Electrons
13:50:19:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:21:ST3_smx:INFO: ----> Checking Analog response
13:50:21:ST3_smx:INFO: ----> Checking broken channels
13:50:22:ST3_smx:INFO: Total # broken ch: 0
13:50:22:ST3_smx:INFO: List FAST: []
13:50:22:ST3_smx:INFO: List SLOW: []
13:50:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:22:ST3_smx:INFO: Holes
13:50:22:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:24:ST3_smx:INFO: ----> Checking Analog response
13:50:24:ST3_smx:INFO: ----> Checking broken channels
13:50:24:ST3_smx:INFO: Total # broken ch: 0
13:50:24:ST3_smx:INFO: List FAST: []
13:50:24:ST3_smx:INFO: List SLOW: []
13:50:26:ST3_smx:INFO: chip: 21-2 31.389742 C 1177.390875 mV
13:50:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:26:ST3_smx:INFO: Electrons
13:50:26:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:28:ST3_smx:INFO: ----> Checking Analog response
13:50:28:ST3_smx:INFO: ----> Checking broken channels
13:50:28:ST3_smx:INFO: Total # broken ch: 0
13:50:28:ST3_smx:INFO: List FAST: []
13:50:28:ST3_smx:INFO: List SLOW: []
13:50:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:28:ST3_smx:INFO: Holes
13:50:28:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:31:ST3_smx:INFO: ----> Checking Analog response
13:50:31:ST3_smx:INFO: ----> Checking broken channels
13:50:31:ST3_smx:INFO: Total # broken ch: 0
13:50:31:ST3_smx:INFO: List FAST: []
13:50:31:ST3_smx:INFO: List SLOW: []
13:50:32:ST3_smx:INFO: chip: 28-3 40.898880 C 1118.096875 mV
13:50:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:32:ST3_smx:INFO: Electrons
13:50:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:35:ST3_smx:INFO: ----> Checking Analog response
13:50:35:ST3_smx:INFO: ----> Checking broken channels
13:50:35:ST3_smx:INFO: Total # broken ch: 0
13:50:35:ST3_smx:INFO: List FAST: []
13:50:35:ST3_smx:INFO: List SLOW: []
13:50:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:35:ST3_smx:INFO: Holes
13:50:35:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:37:ST3_smx:INFO: ----> Checking Analog response
13:50:37:ST3_smx:INFO: ----> Checking broken channels
13:50:38:ST3_smx:INFO: Total # broken ch: 0
13:50:38:ST3_smx:INFO: List FAST: []
13:50:38:ST3_smx:INFO: List SLOW: []
13:50:39:ST3_smx:INFO: chip: 19-4 21.902970 C 1212.728715 mV
13:50:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:39:ST3_smx:INFO: Electrons
13:50:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:41:ST3_smx:INFO: ----> Checking Analog response
13:50:41:ST3_smx:INFO: ----> Checking broken channels
13:50:42:ST3_smx:INFO: Total # broken ch: 0
13:50:42:ST3_smx:INFO: List FAST: []
13:50:42:ST3_smx:INFO: List SLOW: []
13:50:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:42:ST3_smx:INFO: Holes
13:50:42:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:44:ST3_smx:INFO: ----> Checking Analog response
13:50:44:ST3_smx:INFO: ----> Checking broken channels
13:50:44:ST3_smx:INFO: Total # broken ch: 0
13:50:44:ST3_smx:INFO: List FAST: []
13:50:44:ST3_smx:INFO: List SLOW: []
13:50:46:ST3_smx:INFO: chip: 26-5 31.389742 C 1153.732915 mV
13:50:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:46:ST3_smx:INFO: Electrons
13:50:46:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:48:ST3_smx:INFO: ----> Checking Analog response
13:50:48:ST3_smx:INFO: ----> Checking broken channels
13:50:48:ST3_smx:INFO: Total # broken ch: 0
13:50:48:ST3_smx:INFO: List FAST: []
13:50:48:ST3_smx:INFO: List SLOW: []
13:50:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:48:ST3_smx:INFO: Holes
13:50:48:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:51:ST3_smx:INFO: ----> Checking Analog response
13:50:51:ST3_smx:INFO: ----> Checking broken channels
13:50:51:ST3_smx:INFO: Total # broken ch: 0
13:50:51:ST3_smx:INFO: List FAST: []
13:50:51:ST3_smx:INFO: List SLOW: []
13:50:52:ST3_smx:INFO: chip: 17-6 31.389742 C 1171.483840 mV
13:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:52:ST3_smx:INFO: Electrons
13:50:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:55:ST3_smx:INFO: ----> Checking Analog response
13:50:55:ST3_smx:INFO: ----> Checking broken channels
13:50:55:ST3_smx:INFO: Total # broken ch: 0
13:50:55:ST3_smx:INFO: List FAST: []
13:50:55:ST3_smx:INFO: List SLOW: []
13:50:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:55:ST3_smx:INFO: Holes
13:50:55:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:50:57:ST3_smx:INFO: ----> Checking Analog response
13:50:57:ST3_smx:INFO: ----> Checking broken channels
13:50:57:ST3_smx:INFO: Total # broken ch: 0
13:50:57:ST3_smx:INFO: List FAST: []
13:50:57:ST3_smx:INFO: List SLOW: []
13:50:59:ST3_smx:INFO: chip: 24-7 28.225000 C 1159.654860 mV
13:50:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:59:ST3_smx:INFO: Electrons
13:50:59:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:51:01:ST3_smx:INFO: ----> Checking Analog response
13:51:01:ST3_smx:INFO: ----> Checking broken channels
13:51:01:ST3_smx:INFO: Total # broken ch: 0
13:51:01:ST3_smx:INFO: List FAST: []
13:51:01:ST3_smx:INFO: List SLOW: []
13:51:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:01:ST3_smx:INFO: Holes
13:51:01:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
13:51:04:ST3_smx:INFO: ----> Checking Analog response
13:51:04:ST3_smx:INFO: ----> Checking broken channels
13:51:04:ST3_smx:INFO: Total # broken ch: 0
13:51:04:ST3_smx:INFO: List FAST: []
13:51:04:ST3_smx:INFO: List SLOW: []
13:51:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:04:febtest:INFO: 23-00 | XA-000-09-004-015-014-026-15 | 9.3 | 1578.5
13:51:04:febtest:INFO: 30-01 | XA-000-09-004-015-012-003-11 | 28.2 | 1195.1
13:51:05:febtest:INFO: 21-02 | XA-000-09-004-015-017-007-00 | 31.4 | 1247.9
13:51:05:febtest:INFO: 28-03 | XA-000-09-004-015-014-003-08 | 44.1 | 1135.9
13:51:05:febtest:INFO: 19-04 | XA-000-09-004-015-005-009-10 | 21.9 | 1247.9
13:51:05:febtest:INFO: 26-05 | XA-000-09-004-010-003-018-11 | 34.6 | 1171.5
13:51:05:febtest:INFO: 17-06 | XA-000-09-004-015-006-021-03 | 34.6 | 1189.2
13:51:06:febtest:INFO: 24-07 | XA-000-09-004-010-002-012-01 | 31.4 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_11_25-13_49_41
OPERATOR : Oleksandr S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2264| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
MODULE_NAME
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.848', '2.7580']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1430', '1.850', '2.9840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1280', '1.850', '0.9636']