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FEB_2265 30.10.24 08:48:09
Info
08:48:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:48:09:ST3_Shared:INFO: FEB-Sensor
08:48:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:50:24:ST3_ModuleSelector:INFO: New Module Name: M3DR2B3000123A24
08:50:25:ST3_ModuleSelector:INFO: New Module Name: M3DR2B3000123A2
08:52:32:ST3_ModuleSelector:INFO:
08:52:32:ST3_ModuleSelector:INFO:
08:52:32:febtest:INFO: Testing FEB with SN 2265
08:52:33:smx_tester:INFO: Scanning setup
08:52:33:elinks:INFO: Disabling clock on downlink 0
08:52:33:elinks:INFO: Disabling clock on downlink 1
08:52:33:elinks:INFO: Disabling clock on downlink 2
08:52:33:elinks:INFO: Disabling clock on downlink 3
08:52:33:elinks:INFO: Disabling clock on downlink 4
08:52:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:33:elinks:INFO: Disabling clock on downlink 0
08:52:33:elinks:INFO: Disabling clock on downlink 1
08:52:33:elinks:INFO: Disabling clock on downlink 2
08:52:33:elinks:INFO: Disabling clock on downlink 3
08:52:33:elinks:INFO: Disabling clock on downlink 4
08:52:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:34:elinks:INFO: Disabling clock on downlink 0
08:52:34:elinks:INFO: Disabling clock on downlink 1
08:52:34:elinks:INFO: Disabling clock on downlink 2
08:52:34:elinks:INFO: Disabling clock on downlink 3
08:52:34:elinks:INFO: Disabling clock on downlink 4
08:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:52:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:34:elinks:INFO: Disabling clock on downlink 0
08:52:34:elinks:INFO: Disabling clock on downlink 1
08:52:34:elinks:INFO: Disabling clock on downlink 2
08:52:34:elinks:INFO: Disabling clock on downlink 3
08:52:34:elinks:INFO: Disabling clock on downlink 4
08:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:34:elinks:INFO: Disabling clock on downlink 0
08:52:34:elinks:INFO: Disabling clock on downlink 1
08:52:34:elinks:INFO: Disabling clock on downlink 2
08:52:34:elinks:INFO: Disabling clock on downlink 3
08:52:34:elinks:INFO: Disabling clock on downlink 4
08:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
08:52:34:setup_element:INFO: Scanning clock phase
08:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:52:34:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:52:34:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
08:52:34:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
08:52:34:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:52:34:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:34:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:34:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:34:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:34:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:52:34:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:52:34:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
==============================================OOO==============================================
08:52:34:setup_element:INFO: Scanning data phases
08:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:52:39:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:52:39:setup_element:INFO: Eye window for uplink 16: _XXXX__________________________________X
Data delay found: 21
08:52:39:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
08:52:39:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
08:52:39:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
08:52:39:setup_element:INFO: Eye window for uplink 20: X____________________________________XXX
Data delay found: 18
08:52:40:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
08:52:40:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
08:52:40:setup_element:INFO: Eye window for uplink 23: XXX_____________________________XXXXXXXX
Data delay found: 17
08:52:40:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX__________________________
Data delay found: 30
08:52:40:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
08:52:40:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
08:52:40:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
08:52:40:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
08:52:40:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
08:52:40:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
08:52:40:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
08:52:40:setup_element:INFO: Setting the data phase to 21 for uplink 16
08:52:40:setup_element:INFO: Setting the data phase to 19 for uplink 17
08:52:40:setup_element:INFO: Setting the data phase to 17 for uplink 18
08:52:40:setup_element:INFO: Setting the data phase to 15 for uplink 19
08:52:40:setup_element:INFO: Setting the data phase to 18 for uplink 20
08:52:40:setup_element:INFO: Setting the data phase to 17 for uplink 21
08:52:40:setup_element:INFO: Setting the data phase to 15 for uplink 22
08:52:40:setup_element:INFO: Setting the data phase to 17 for uplink 23
08:52:40:setup_element:INFO: Setting the data phase to 30 for uplink 24
08:52:40:setup_element:INFO: Setting the data phase to 31 for uplink 25
08:52:40:setup_element:INFO: Setting the data phase to 30 for uplink 26
08:52:40:setup_element:INFO: Setting the data phase to 33 for uplink 27
08:52:40:setup_element:INFO: Setting the data phase to 34 for uplink 28
08:52:40:setup_element:INFO: Setting the data phase to 36 for uplink 29
08:52:40:setup_element:INFO: Setting the data phase to 39 for uplink 30
08:52:40:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
08:52:40:setup_element:INFO: Beginning SMX ASICs map scan
08:52:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:52:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:52:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:52:40:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:52:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:52:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:52:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:52:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:52:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:52:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:52:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:52:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:52:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:52:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:52:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:52:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:52:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:52:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:52:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:52:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:52:42:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXX___
Uplink 17: _______________________________________________________________________XXXXXX___
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXX___
Uplink 21: ______________________________________________________________________XXXXXXX___
Uplink 22: ________________________________________________________________________________
Uplink 23: ________________________________________________________________________________
Uplink 24: ______________________________________________________________________XXXXXXX___
Uplink 25: ______________________________________________________________________XXXXXXX___
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _______________________________________________________________________XXXXXXXXX
Uplink 31: _______________________________________________________________________XXXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: _XXXX__________________________________X
Uplink 17:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 17
Window Length: 29
Eye Window: XXX_____________________________XXXXXXXX
Uplink 24:
Optimal Phase: 30
Window Length: 33
Eye Window: _______XXXXXXX__________________________
Uplink 25:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
==============================================OOO==============================================
08:52:42:setup_element:INFO: Performing Elink synchronization
08:52:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:52:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:52:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
08:52:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:52:42:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:52:43:febtest:INFO: Init all SMX (CSA): 30
08:52:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:52:58:febtest:INFO: 23-00 | XA-000-09-004-004-011-024-10 | 28.2 | 1153.7
08:52:58:febtest:INFO: 30-01 | XA-000-09-004-004-015-022-12 | 18.7 | 1183.3
08:52:58:febtest:INFO: 21-02 | XA-000-09-004-004-012-027-02 | 25.1 | 1165.6
08:52:58:febtest:INFO: 28-03 | XA-000-09-004-004-015-021-12 | 21.9 | 1171.5
08:52:59:febtest:INFO: 19-04 | XA-000-09-004-004-010-027-07 | 40.9 | 1112.1
08:52:59:febtest:INFO: 26-05 | XA-000-09-004-004-013-020-15 | 34.6 | 1130.0
08:52:59:febtest:INFO: 17-06 | XA-000-09-004-004-011-026-10 | 28.2 | 1165.6
08:52:59:febtest:INFO: 24-07 | XA-000-09-004-004-014-020-01 | 15.6 | 1189.2
08:53:00:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:53:02:ST3_smx:INFO: chip: 23-0 31.389742 C 1165.571835 mV
08:53:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:02:ST3_smx:INFO: Electrons
08:53:02:ST3_smx:INFO: # loops 0
08:53:04:ST3_smx:INFO: # loops 1
08:53:06:ST3_smx:INFO: # loops 2
08:53:07:ST3_smx:INFO: # loops 3
08:53:09:ST3_smx:INFO: # loops 4
08:53:10:ST3_smx:INFO: Total # of broken channels: 1
08:53:10:ST3_smx:INFO: List of broken channels: [126]
08:53:10:ST3_smx:INFO: Total # of broken channels: 1
08:53:10:ST3_smx:INFO: List of broken channels: [126]
08:53:12:ST3_smx:INFO: chip: 30-1 18.745682 C 1195.082160 mV
08:53:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:12:ST3_smx:INFO: Electrons
08:53:12:ST3_smx:INFO: # loops 0
08:53:14:ST3_smx:INFO: # loops 1
08:53:16:ST3_smx:INFO: # loops 2
08:53:17:ST3_smx:INFO: # loops 3
08:53:19:ST3_smx:INFO: # loops 4
08:53:21:ST3_smx:INFO: Total # of broken channels: 0
08:53:21:ST3_smx:INFO: List of broken channels: []
08:53:21:ST3_smx:INFO: Total # of broken channels: 0
08:53:21:ST3_smx:INFO: List of broken channels: []
08:53:22:ST3_smx:INFO: chip: 21-2 28.225000 C 1177.390875 mV
08:53:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:22:ST3_smx:INFO: Electrons
08:53:22:ST3_smx:INFO: # loops 0
08:53:24:ST3_smx:INFO: # loops 1
08:53:26:ST3_smx:INFO: # loops 2
08:53:27:ST3_smx:INFO: # loops 3
08:53:29:ST3_smx:INFO: # loops 4
08:53:31:ST3_smx:INFO: Total # of broken channels: 0
08:53:31:ST3_smx:INFO: List of broken channels: []
08:53:31:ST3_smx:INFO: Total # of broken channels: 0
08:53:31:ST3_smx:INFO: List of broken channels: []
08:53:32:ST3_smx:INFO: chip: 28-3 21.902970 C 1183.292940 mV
08:53:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:32:ST3_smx:INFO: Electrons
08:53:32:ST3_smx:INFO: # loops 0
08:53:34:ST3_smx:INFO: # loops 1
08:53:36:ST3_smx:INFO: # loops 2
08:53:37:ST3_smx:INFO: # loops 3
08:53:39:ST3_smx:INFO: # loops 4
08:53:41:ST3_smx:INFO: Total # of broken channels: 0
08:53:41:ST3_smx:INFO: List of broken channels: []
08:53:41:ST3_smx:INFO: Total # of broken channels: 0
08:53:41:ST3_smx:INFO: List of broken channels: []
08:53:42:ST3_smx:INFO: chip: 19-4 44.073563 C 1118.096875 mV
08:53:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:42:ST3_smx:INFO: Electrons
08:53:42:ST3_smx:INFO: # loops 0
08:53:44:ST3_smx:INFO: # loops 1
08:53:46:ST3_smx:INFO: # loops 2
08:53:47:ST3_smx:INFO: # loops 3
08:53:49:ST3_smx:INFO: # loops 4
08:53:51:ST3_smx:INFO: Total # of broken channels: 0
08:53:51:ST3_smx:INFO: List of broken channels: []
08:53:51:ST3_smx:INFO: Total # of broken channels: 0
08:53:51:ST3_smx:INFO: List of broken channels: []
08:53:52:ST3_smx:INFO: chip: 26-5 34.556970 C 1135.937260 mV
08:53:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:53:52:ST3_smx:INFO: Electrons
08:53:52:ST3_smx:INFO: # loops 0
08:53:54:ST3_smx:INFO: # loops 1
08:53:56:ST3_smx:INFO: # loops 2
08:53:57:ST3_smx:INFO: # loops 3
08:53:59:ST3_smx:INFO: # loops 4
08:54:01:ST3_smx:INFO: Total # of broken channels: 0
08:54:01:ST3_smx:INFO: List of broken channels: []
08:54:01:ST3_smx:INFO: Total # of broken channels: 1
08:54:01:ST3_smx:INFO: List of broken channels: [72]
08:54:02:ST3_smx:INFO: chip: 17-6 31.389742 C 1171.483840 mV
08:54:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:02:ST3_smx:INFO: Electrons
08:54:02:ST3_smx:INFO: # loops 0
08:54:04:ST3_smx:INFO: # loops 1
08:54:06:ST3_smx:INFO: # loops 2
08:54:07:ST3_smx:INFO: # loops 3
08:54:09:ST3_smx:INFO: # loops 4
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:12:ST3_smx:INFO: chip: 24-7 18.745682 C 1200.969315 mV
08:54:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:12:ST3_smx:INFO: Electrons
08:54:12:ST3_smx:INFO: # loops 0
08:54:14:ST3_smx:INFO: # loops 1
08:54:16:ST3_smx:INFO: # loops 2
08:54:17:ST3_smx:INFO: # loops 3
08:54:19:ST3_smx:INFO: # loops 4
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:21:febtest:INFO: 23-00 | XA-000-09-004-004-011-024-10 | 31.4 | 1189.2
08:54:21:febtest:INFO: 30-01 | XA-000-09-004-004-015-022-12 | 18.7 | 1212.7
08:54:22:febtest:INFO: 21-02 | XA-000-09-004-004-012-027-02 | 28.2 | 1206.9
08:54:22:febtest:INFO: 28-03 | XA-000-09-004-004-015-021-12 | 25.1 | 1201.0
08:54:22:febtest:INFO: 19-04 | XA-000-09-004-004-010-027-07 | 47.3 | 1141.9
08:54:22:febtest:INFO: 26-05 | XA-000-09-004-004-013-020-15 | 37.7 | 1159.7
08:54:22:febtest:INFO: 17-06 | XA-000-09-004-004-011-026-10 | 31.4 | 1189.2
08:54:23:febtest:INFO: 24-07 | XA-000-09-004-004-014-020-01 | 21.9 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_30-08_48_09
OPERATOR : Kerstin S.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2265| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: | SIZE: None | GRADE:
MODULE_NAME:
LADDER_NAME:
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9080', '1.848', '2.1440']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '2.6160']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9670', '1.850', '0.5235']
Comment
M4DL 0 B1101611B2
Sensor: 08123