09:14:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:17:ST3_Shared:INFO:	                         FEB-Sensor                         
09:14:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:14:29:ST3_ModuleSelector:DEBUG:	M7UL1B0110390A2
09:14:29:ST3_ModuleSelector:DEBUG:	L7UL101039
09:14:29:ST3_ModuleSelector:DEBUG:	

09:14:29:ST3_ModuleSelector:DEBUG:	62x22
09:14:29:ST3_ModuleSelector:DEBUG:	A
09:14:31:ST3_ModuleSelector:DEBUG:	
09:14:31:ST3_ModuleSelector:DEBUG:	
09:14:31:ST3_ModuleSelector:DEBUG:	
09:14:31:ST3_ModuleSelector:DEBUG:	None
09:14:31:ST3_ModuleSelector:DEBUG:	
09:14:37:ST3_ModuleSelector:DEBUG:	M3DR6B0000150A2
09:14:37:ST3_ModuleSelector:DEBUG:	L3DR600015
09:14:37:ST3_ModuleSelector:DEBUG:	13413
09:14:37:ST3_ModuleSelector:DEBUG:	62x62
09:14:37:ST3_ModuleSelector:DEBUG:	C
09:14:37:ST3_ModuleSelector:DEBUG:	M3DR6B0000150A2
09:14:37:ST3_ModuleSelector:DEBUG:	L3DR600015
09:14:37:ST3_ModuleSelector:DEBUG:	13413
09:14:37:ST3_ModuleSelector:DEBUG:	62x62
09:14:37:ST3_ModuleSelector:DEBUG:	C
09:14:44:ST3_ModuleSelector:INFO:	M3DR6B0000150A2
09:14:44:ST3_ModuleSelector:INFO:	13413
09:14:44:febtest:INFO:	Testing FEB with SN 2267
09:14:46:smx_tester:INFO:	Scanning setup
09:14:46:elinks:INFO:	Disabling clock on downlink 0
09:14:46:elinks:INFO:	Disabling clock on downlink 1
09:14:46:elinks:INFO:	Disabling clock on downlink 2
09:14:46:elinks:INFO:	Disabling clock on downlink 3
09:14:46:elinks:INFO:	Disabling clock on downlink 4
09:14:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:14:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:46:elinks:INFO:	Disabling clock on downlink 0
09:14:46:elinks:INFO:	Disabling clock on downlink 1
09:14:46:elinks:INFO:	Disabling clock on downlink 2
09:14:46:elinks:INFO:	Disabling clock on downlink 3
09:14:46:elinks:INFO:	Disabling clock on downlink 4
09:14:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:14:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:46:elinks:INFO:	Disabling clock on downlink 0
09:14:46:elinks:INFO:	Disabling clock on downlink 1
09:14:46:elinks:INFO:	Disabling clock on downlink 2
09:14:46:elinks:INFO:	Disabling clock on downlink 3
09:14:46:elinks:INFO:	Disabling clock on downlink 4
09:14:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:14:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:14:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:46:elinks:INFO:	Disabling clock on downlink 0
09:14:46:elinks:INFO:	Disabling clock on downlink 1
09:14:46:elinks:INFO:	Disabling clock on downlink 2
09:14:46:elinks:INFO:	Disabling clock on downlink 3
09:14:46:elinks:INFO:	Disabling clock on downlink 4
09:14:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:14:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:14:46:elinks:INFO:	Disabling clock on downlink 0
09:14:47:elinks:INFO:	Disabling clock on downlink 1
09:14:47:elinks:INFO:	Disabling clock on downlink 2
09:14:47:elinks:INFO:	Disabling clock on downlink 3
09:14:47:elinks:INFO:	Disabling clock on downlink 4
09:14:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:14:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:14:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
09:14:47:setup_element:INFO:	Scanning clock phase
09:14:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:14:47:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:14:47:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:47:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:14:47:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:14:47:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:14:47:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:14:47:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:14:47:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:14:47:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:14:47:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:14:47:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:14:47:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
09:14:47:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
09:14:47:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:14:47:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:14:47:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:14:48:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:14:48:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
==============================================OOO==============================================
09:14:48:setup_element:INFO:	Scanning data phases
09:14:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:14:53:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:14:53:setup_element:INFO:	Eye window for uplink 16: XXXXX_________________________________XX
Data delay found: 21
09:14:53:setup_element:INFO:	Eye window for uplink 17: XXX_________________________________XXXX
Data delay found: 19
09:14:53:setup_element:INFO:	Eye window for uplink 18: XXXXX________________________________XXX
Data delay found: 20
09:14:53:setup_element:INFO:	Eye window for uplink 19: XXX________________________________XXXXX
Data delay found: 18
09:14:53:setup_element:INFO:	Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
09:14:53:setup_element:INFO:	Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
09:14:53:setup_element:INFO:	Eye window for uplink 22: __________________________________XXXXX_
Data delay found: 16
09:14:53:setup_element:INFO:	Eye window for uplink 23: XXX_____________________________XXXXXXXX
Data delay found: 17
09:14:53:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
09:14:53:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
09:14:53:setup_element:INFO:	Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
09:14:53:setup_element:INFO:	Eye window for uplink 27: _______________XXXXXX___________________
Data delay found: 37
09:14:53:setup_element:INFO:	Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
09:14:53:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
09:14:53:setup_element:INFO:	Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
09:14:53:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
09:14:53:setup_element:INFO:	Setting the data phase to 21 for uplink 16
09:14:53:setup_element:INFO:	Setting the data phase to 19 for uplink 17
09:14:53:setup_element:INFO:	Setting the data phase to 20 for uplink 18
09:14:53:setup_element:INFO:	Setting the data phase to 18 for uplink 19
09:14:53:setup_element:INFO:	Setting the data phase to 19 for uplink 20
09:14:53:setup_element:INFO:	Setting the data phase to 18 for uplink 21
09:14:53:setup_element:INFO:	Setting the data phase to 16 for uplink 22
09:14:53:setup_element:INFO:	Setting the data phase to 17 for uplink 23
09:14:53:setup_element:INFO:	Setting the data phase to 28 for uplink 24
09:14:53:setup_element:INFO:	Setting the data phase to 29 for uplink 25
09:14:53:setup_element:INFO:	Setting the data phase to 33 for uplink 26
09:14:53:setup_element:INFO:	Setting the data phase to 37 for uplink 27
09:14:53:setup_element:INFO:	Setting the data phase to 35 for uplink 28
09:14:53:setup_element:INFO:	Setting the data phase to 38 for uplink 29
09:14:53:setup_element:INFO:	Setting the data phase to 1 for uplink 30
09:14:53:setup_element:INFO:	Setting the data phase to 1 for uplink 31
==============================================OOO==============================================
09:14:53:setup_element:INFO:	Beginning SMX ASICs map scan
09:14:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:14:53:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:14:53:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:14:53:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:14:53:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:14:53:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:14:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:14:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:14:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:14:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:14:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:14:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:14:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:14:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:14:54:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:14:54:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:14:54:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:14:54:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:14:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:14:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:14:56:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 67
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: _____________________________________________________________________XXXXXXXX___
      Uplink 21: _____________________________________________________________________XXXXXXXX___
      Uplink 22: ___________________________________________________________________XXXXXXXXX____
      Uplink 23: ___________________________________________________________________XXXXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ________________________________________________________________________________
      Uplink 28: _____________________________________________________________________XXXXXXXXX__
      Uplink 29: _____________________________________________________________________XXXXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXXXX
      Uplink 31: _______________________________________________________________________XXXXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 17:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 20:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 21:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 22:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 23:
      Optimal Phase: 17
      Window Length: 29
      Eye Window: XXX_____________________________XXXXXXXX
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 27:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 29:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
    Uplink 30:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________
    Uplink 31:
      Optimal Phase: 1
      Window Length: 33
      Eye Window: __________________XXXXXXX_______________

==============================================OOO==============================================
09:14:56:setup_element:INFO:	Performing Elink synchronization
09:14:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:14:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:14:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:14:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
09:14:56:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:14:56:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:14:57:febtest:INFO:	Init all SMX (CSA): 30
09:15:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:15:11:febtest:INFO:	23-00 | XA-000-09-004-004-014-021-01 |  18.7 | 1212.7
09:15:12:febtest:INFO:	30-01 | XA-000-09-004-004-014-025-01 |  18.7 | 1195.1
09:15:12:febtest:INFO:	21-02 | XA-000-09-004-004-014-022-01 |  18.7 | 1206.9
09:15:12:febtest:INFO:	28-03 | XA-000-09-004-004-014-024-01 |  21.9 | 1183.3
09:15:12:febtest:INFO:	19-04 | XA-000-09-004-004-015-023-12 |  15.6 | 1236.2
09:15:12:febtest:INFO:	26-05 | XA-000-09-004-004-015-025-12 |  21.9 | 1183.3
09:15:13:febtest:INFO:	17-06 | XA-000-09-004-004-014-023-01 |  40.9 | 1141.9
09:15:13:febtest:INFO:	24-07 | XA-000-09-004-004-013-021-15 |  34.6 | 1147.8
09:15:14:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:15:16:ST3_smx:INFO:	chip: 23-0 	 21.902970 C 	 1224.468235 mV
09:15:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:16:ST3_smx:INFO:		Electrons
09:15:16:ST3_smx:INFO:	# loops 0
09:15:18:ST3_smx:INFO:	# loops 1
09:15:19:ST3_smx:INFO:	# loops 2
09:15:21:ST3_smx:INFO:	# loops 3
09:15:22:ST3_smx:INFO:	# loops 4
09:15:24:ST3_smx:INFO:	Total # of broken channels: 0
09:15:24:ST3_smx:INFO:	List of broken channels: []
09:15:24:ST3_smx:INFO:	Total # of broken channels: 0
09:15:24:ST3_smx:INFO:	List of broken channels: []
09:15:26:ST3_smx:INFO:	chip: 30-1 	 18.745682 C 	 1206.851500 mV
09:15:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:26:ST3_smx:INFO:		Electrons
09:15:26:ST3_smx:INFO:	# loops 0
09:15:28:ST3_smx:INFO:	# loops 1
09:15:29:ST3_smx:INFO:	# loops 2
09:15:31:ST3_smx:INFO:	# loops 3
09:15:32:ST3_smx:INFO:	# loops 4
09:15:34:ST3_smx:INFO:	Total # of broken channels: 0
09:15:34:ST3_smx:INFO:	List of broken channels: []
09:15:34:ST3_smx:INFO:	Total # of broken channels: 1
09:15:34:ST3_smx:INFO:	List of broken channels: [0]
09:15:36:ST3_smx:INFO:	chip: 21-2 	 18.745682 C 	 1218.600960 mV
09:15:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:36:ST3_smx:INFO:		Electrons
09:15:36:ST3_smx:INFO:	# loops 0
09:15:38:ST3_smx:INFO:	# loops 1
09:15:39:ST3_smx:INFO:	# loops 2
09:15:41:ST3_smx:INFO:	# loops 3
09:15:42:ST3_smx:INFO:	# loops 4
09:15:44:ST3_smx:INFO:	Total # of broken channels: 0
09:15:44:ST3_smx:INFO:	List of broken channels: []
09:15:44:ST3_smx:INFO:	Total # of broken channels: 0
09:15:44:ST3_smx:INFO:	List of broken channels: []
09:15:46:ST3_smx:INFO:	chip: 28-3 	 21.902970 C 	 1195.082160 mV
09:15:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:46:ST3_smx:INFO:		Electrons
09:15:46:ST3_smx:INFO:	# loops 0
09:15:47:ST3_smx:INFO:	# loops 1
09:15:49:ST3_smx:INFO:	# loops 2
09:15:50:ST3_smx:INFO:	# loops 3
09:15:52:ST3_smx:INFO:	# loops 4
09:15:53:ST3_smx:INFO:	Total # of broken channels: 0
09:15:53:ST3_smx:INFO:	List of broken channels: []
09:15:53:ST3_smx:INFO:	Total # of broken channels: 0
09:15:53:ST3_smx:INFO:	List of broken channels: []
09:15:55:ST3_smx:INFO:	chip: 19-4 	 15.590880 C 	 1247.887635 mV
09:15:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:15:55:ST3_smx:INFO:		Electrons
09:15:55:ST3_smx:INFO:	# loops 0
09:15:57:ST3_smx:INFO:	# loops 1
09:15:58:ST3_smx:INFO:	# loops 2
09:16:00:ST3_smx:INFO:	# loops 3
09:16:02:ST3_smx:INFO:	# loops 4
09:16:03:ST3_smx:INFO:	Total # of broken channels: 0
09:16:03:ST3_smx:INFO:	List of broken channels: []
09:16:03:ST3_smx:INFO:	Total # of broken channels: 0
09:16:03:ST3_smx:INFO:	List of broken channels: []
09:16:05:ST3_smx:INFO:	chip: 26-5 	 21.902970 C 	 1195.082160 mV
09:16:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:05:ST3_smx:INFO:		Electrons
09:16:05:ST3_smx:INFO:	# loops 0
09:16:07:ST3_smx:INFO:	# loops 1
09:16:08:ST3_smx:INFO:	# loops 2
09:16:10:ST3_smx:INFO:	# loops 3
09:16:11:ST3_smx:INFO:	# loops 4
09:16:13:ST3_smx:INFO:	Total # of broken channels: 0
09:16:13:ST3_smx:INFO:	List of broken channels: []
09:16:13:ST3_smx:INFO:	Total # of broken channels: 0
09:16:13:ST3_smx:INFO:	List of broken channels: []
09:16:15:ST3_smx:INFO:	chip: 17-6 	 40.898880 C 	 1147.806000 mV
09:16:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:15:ST3_smx:INFO:		Electrons
09:16:15:ST3_smx:INFO:	# loops 0
09:16:16:ST3_smx:INFO:	# loops 1
09:16:18:ST3_smx:INFO:	# loops 2
09:16:19:ST3_smx:INFO:	# loops 3
09:16:21:ST3_smx:INFO:	# loops 4
09:16:22:ST3_smx:INFO:	Total # of broken channels: 0
09:16:22:ST3_smx:INFO:	List of broken channels: []
09:16:22:ST3_smx:INFO:	Total # of broken channels: 0
09:16:22:ST3_smx:INFO:	List of broken channels: []
09:16:24:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1159.654860 mV
09:16:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:16:24:ST3_smx:INFO:		Electrons
09:16:24:ST3_smx:INFO:	# loops 0
09:16:26:ST3_smx:INFO:	# loops 1
09:16:27:ST3_smx:INFO:	# loops 2
09:16:29:ST3_smx:INFO:	# loops 3
09:16:31:ST3_smx:INFO:	# loops 4
09:16:32:ST3_smx:INFO:	Total # of broken channels: 0
09:16:32:ST3_smx:INFO:	List of broken channels: []
09:16:32:ST3_smx:INFO:	Total # of broken channels: 0
09:16:32:ST3_smx:INFO:	List of broken channels: []
09:16:33:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:16:33:febtest:INFO:	23-00 | XA-000-09-004-004-014-021-01 |  21.9 | 1242.0
09:16:33:febtest:INFO:	30-01 | XA-000-09-004-004-014-025-01 |  18.7 | 1230.3
09:16:33:febtest:INFO:	21-02 | XA-000-09-004-004-014-022-01 |  21.9 | 1236.2
09:16:34:febtest:INFO:	28-03 | XA-000-09-004-004-014-024-01 |  21.9 | 1218.6
09:16:34:febtest:INFO:	19-04 | XA-000-09-004-004-015-023-12 |  18.7 | 1265.4
09:16:34:febtest:INFO:	26-05 | XA-000-09-004-004-015-025-12 |  25.1 | 1212.7
09:16:34:febtest:INFO:	17-06 | XA-000-09-004-004-014-023-01 |  40.9 | 1171.5
09:16:35:febtest:INFO:	24-07 | XA-000-09-004-004-013-021-15 |  37.7 | 1177.4
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_12-09_14_17
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2267| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 13413 | SIZE: 62x62 | GRADE: C
MODULE_NAME: M3DR6B0000150A2
LADDER_NAME: L3DR600015
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4640', '1.848', '2.2270']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9430', '1.850', '2.5280']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9180', '1.850', '0.5154']