11:25:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:25:42:ST3_Shared:INFO:	                       FEB-Microcable                       
11:25:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:25:44:ST3_Shared:INFO:	STS mode selected
11:25:44:febtest:INFO:	Testing FEB with SN 2268
11:25:45:smx_tester:INFO:	Scanning setup
11:25:45:elinks:INFO:	Disabling clock on downlink 0
11:25:45:elinks:INFO:	Disabling clock on downlink 1
11:25:45:elinks:INFO:	Disabling clock on downlink 2
11:25:45:elinks:INFO:	Disabling clock on downlink 3
11:25:45:elinks:INFO:	Disabling clock on downlink 4
11:25:45:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:25:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:25:46:elinks:INFO:	Disabling clock on downlink 0
11:25:46:elinks:INFO:	Disabling clock on downlink 1
11:25:46:elinks:INFO:	Disabling clock on downlink 2
11:25:46:elinks:INFO:	Disabling clock on downlink 3
11:25:46:elinks:INFO:	Disabling clock on downlink 4
11:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:25:46:elinks:INFO:	Disabling clock on downlink 0
11:25:46:elinks:INFO:	Disabling clock on downlink 1
11:25:46:elinks:INFO:	Disabling clock on downlink 2
11:25:46:elinks:INFO:	Disabling clock on downlink 3
11:25:46:elinks:INFO:	Disabling clock on downlink 4
11:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:25:46:elinks:INFO:	Disabling clock on downlink 0
11:25:46:elinks:INFO:	Disabling clock on downlink 1
11:25:46:elinks:INFO:	Disabling clock on downlink 2
11:25:46:elinks:INFO:	Disabling clock on downlink 3
11:25:46:elinks:INFO:	Disabling clock on downlink 4
11:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:25:46:elinks:INFO:	Disabling clock on downlink 0
11:25:46:elinks:INFO:	Disabling clock on downlink 1
11:25:46:elinks:INFO:	Disabling clock on downlink 2
11:25:46:elinks:INFO:	Disabling clock on downlink 3
11:25:46:elinks:INFO:	Disabling clock on downlink 4
11:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
11:25:46:setup_element:INFO:	Scanning clock phase
11:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:25:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:25:46:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:25:46:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
11:25:46:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
11:25:46:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
11:25:46:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
11:25:47:setup_element:INFO:	Eye window for uplink 20: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 21: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 22: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
11:25:47:setup_element:INFO:	Eye window for uplink 23: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
11:25:47:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:25:47:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
11:25:47:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXXXX____
Clock Delay: 30
11:25:47:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:25:47:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
11:25:47:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
==============================================OOO==============================================
11:25:47:setup_element:INFO:	Scanning data phases
11:25:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:25:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:25:52:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:25:52:setup_element:INFO:	Eye window for uplink 16: XXX________________________________XXXXX
Data delay found: 18
11:25:52:setup_element:INFO:	Eye window for uplink 17: _______________________________XXXXXXXX_
Data delay found: 14
11:25:52:setup_element:INFO:	Eye window for uplink 18: XXXXXX_____________________________XXXXX
Data delay found: 20
11:25:52:setup_element:INFO:	Eye window for uplink 19: XXXX_____________________________XXXXXXX
Data delay found: 18
11:25:52:setup_element:INFO:	Eye window for uplink 20: XX_______________________________XXXXXXX
Data delay found: 17
11:25:52:setup_element:INFO:	Eye window for uplink 21: X_______________________________XXXXXXXX
Data delay found: 16
11:25:52:setup_element:INFO:	Eye window for uplink 22: XXXXX______________________________XXXXX
Data delay found: 19
11:25:52:setup_element:INFO:	Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
11:25:52:setup_element:INFO:	Eye window for uplink 24: ______XXXXXXXXXX________________________
Data delay found: 30
11:25:52:setup_element:INFO:	Eye window for uplink 25: _________XXXXXXXXX______________________
Data delay found: 33
11:25:52:setup_element:INFO:	Eye window for uplink 26: _______XXXXXXXXX________________________
Data delay found: 31
11:25:52:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
11:25:52:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXXXXXX__________________
Data delay found: 36
11:25:52:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXXXXXX_______________
Data delay found: 39
11:25:52:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXXX________________
Data delay found: 39
11:25:52:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXXXXX________________
Data delay found: 39
11:25:52:setup_element:INFO:	Setting the data phase to 18 for uplink 16
11:25:52:setup_element:INFO:	Setting the data phase to 14 for uplink 17
11:25:52:setup_element:INFO:	Setting the data phase to 20 for uplink 18
11:25:52:setup_element:INFO:	Setting the data phase to 18 for uplink 19
11:25:52:setup_element:INFO:	Setting the data phase to 17 for uplink 20
11:25:52:setup_element:INFO:	Setting the data phase to 16 for uplink 21
11:25:52:setup_element:INFO:	Setting the data phase to 19 for uplink 22
11:25:52:setup_element:INFO:	Setting the data phase to 20 for uplink 23
11:25:52:setup_element:INFO:	Setting the data phase to 30 for uplink 24
11:25:52:setup_element:INFO:	Setting the data phase to 33 for uplink 25
11:25:52:setup_element:INFO:	Setting the data phase to 31 for uplink 26
11:25:52:setup_element:INFO:	Setting the data phase to 34 for uplink 27
11:25:52:setup_element:INFO:	Setting the data phase to 36 for uplink 28
11:25:52:setup_element:INFO:	Setting the data phase to 39 for uplink 29
11:25:52:setup_element:INFO:	Setting the data phase to 39 for uplink 30
11:25:52:setup_element:INFO:	Setting the data phase to 39 for uplink 31
==============================================OOO==============================================
11:25:52:setup_element:INFO:	Beginning SMX ASICs map scan
11:25:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:25:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:25:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:25:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:25:52:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:25:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:25:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:25:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:25:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:25:53:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:25:53:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:25:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:25:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:25:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:25:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:25:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:25:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:25:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:25:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:25:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:25:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:25:55:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 68
    Eye Windows:
      Uplink 16: ________________________________________________________________XXXXXXXXX_______
      Uplink 17: ________________________________________________________________XXXXXXXXX_______
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: __________________________________________________________________XXXXXXXX______
      Uplink 21: __________________________________________________________________XXXXXXXX______
      Uplink 22: __________________________________________________________________XXXXXXXXX_____
      Uplink 23: __________________________________________________________________XXXXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXXXX____
      Uplink 29: __________________________________________________________________XXXXXXXXXX____
      Uplink 30: ___________________________________________________________________XXXXXXXXX____
      Uplink 31: ___________________________________________________________________XXXXXXXXX____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 32
      Eye Window: _______________________________XXXXXXXX_
    Uplink 18:
      Optimal Phase: 20
      Window Length: 29
      Eye Window: XXXXXX_____________________________XXXXX
    Uplink 19:
      Optimal Phase: 18
      Window Length: 29
      Eye Window: XXXX_____________________________XXXXXXX
    Uplink 20:
      Optimal Phase: 17
      Window Length: 31
      Eye Window: XX_______________________________XXXXXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 31
      Eye Window: X_______________________________XXXXXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 30
      Eye Window: XXXXX______________________________XXXXX
    Uplink 23:
      Optimal Phase: 20
      Window Length: 28
      Eye Window: XXXXXXX____________________________XXXXX
    Uplink 24:
      Optimal Phase: 30
      Window Length: 30
      Eye Window: ______XXXXXXXXXX________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 31
      Eye Window: _________XXXXXXXXX______________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 31
      Eye Window: _______XXXXXXXXX________________________
    Uplink 27:
      Optimal Phase: 34
      Window Length: 32
      Eye Window: ___________XXXXXXXX_____________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 30
      Eye Window: ____________XXXXXXXXXX__________________
    Uplink 29:
      Optimal Phase: 39
      Window Length: 29
      Eye Window: ______________XXXXXXXXXXX_______________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 32
      Eye Window: ________________XXXXXXXX________________
    Uplink 31:
      Optimal Phase: 39
      Window Length: 31
      Eye Window: _______________XXXXXXXXX________________

==============================================OOO==============================================
11:25:55:setup_element:INFO:	Performing Elink synchronization
11:25:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:25:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:25:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:25:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
11:25:55:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:25:55:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:25:56:febtest:INFO:	Init all SMX (CSA): 30
11:26:10:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:26:10:febtest:INFO:	23-00 | XA-000-09-004-007-006-013-11 |  44.1 | 1147.8
11:26:10:febtest:INFO:	30-01 | XA-000-09-004-007-006-014-11 |  44.1 | 1135.9
11:26:11:febtest:INFO:	21-02 | XA-000-09-004-007-004-012-08 |  31.4 | 1195.1
11:26:11:febtest:INFO:	28-03 | XA-000-09-004-007-005-013-05 |  31.4 | 1195.1
11:26:11:febtest:INFO:	19-04 | XA-000-09-004-006-011-002-04 |  53.6 | 1100.2
11:26:11:febtest:INFO:	26-05 | XA-000-09-004-006-011-004-04 |  44.1 | 1153.7
11:26:11:febtest:INFO:	17-06 | XA-000-09-004-007-005-012-05 |  34.6 | 1183.3
11:26:12:febtest:INFO:	24-07 | XA-000-09-004-007-004-013-08 |  47.3 | 1141.9
11:26:13:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:26:15:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1159.654860 mV
11:26:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:15:ST3_smx:INFO:		Electrons
11:26:15:ST3_smx:INFO:	# loops 0
11:26:16:ST3_smx:INFO:	# loops 1
11:26:18:ST3_smx:INFO:	# loops 2
11:26:20:ST3_smx:INFO:	Total # of broken channels: 0
11:26:20:ST3_smx:INFO:	List of broken channels: []
11:26:20:ST3_smx:INFO:	Total # of broken channels: 1
11:26:20:ST3_smx:INFO:	List of broken channels: [122]
11:26:21:ST3_smx:INFO:	chip: 30-1 	 47.250730 C 	 1153.732915 mV
11:26:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:21:ST3_smx:INFO:		Electrons
11:26:21:ST3_smx:INFO:	# loops 0
11:26:23:ST3_smx:INFO:	# loops 1
11:26:25:ST3_smx:INFO:	# loops 2
11:26:26:ST3_smx:INFO:	Total # of broken channels: 0
11:26:26:ST3_smx:INFO:	List of broken channels: []
11:26:26:ST3_smx:INFO:	Total # of broken channels: 0
11:26:26:ST3_smx:INFO:	List of broken channels: []
11:26:28:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1206.851500 mV
11:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:28:ST3_smx:INFO:		Electrons
11:26:28:ST3_smx:INFO:	# loops 0
11:26:30:ST3_smx:INFO:	# loops 1
11:26:31:ST3_smx:INFO:	# loops 2
11:26:33:ST3_smx:INFO:	Total # of broken channels: 0
11:26:33:ST3_smx:INFO:	List of broken channels: []
11:26:33:ST3_smx:INFO:	Total # of broken channels: 0
11:26:33:ST3_smx:INFO:	List of broken channels: []
11:26:35:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1206.851500 mV
11:26:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:35:ST3_smx:INFO:		Electrons
11:26:35:ST3_smx:INFO:	# loops 0
11:26:36:ST3_smx:INFO:	# loops 1
11:26:38:ST3_smx:INFO:	# loops 2
11:26:39:ST3_smx:INFO:	Total # of broken channels: 0
11:26:39:ST3_smx:INFO:	List of broken channels: []
11:26:39:ST3_smx:INFO:	Total # of broken channels: 0
11:26:39:ST3_smx:INFO:	List of broken channels: []
11:26:41:ST3_smx:INFO:	chip: 19-4 	 56.797143 C 	 1112.140140 mV
11:26:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:41:ST3_smx:INFO:		Electrons
11:26:41:ST3_smx:INFO:	# loops 0
11:26:43:ST3_smx:INFO:	# loops 1
11:26:44:ST3_smx:INFO:	# loops 2
11:26:46:ST3_smx:INFO:	Total # of broken channels: 0
11:26:46:ST3_smx:INFO:	List of broken channels: []
11:26:46:ST3_smx:INFO:	Total # of broken channels: 0
11:26:46:ST3_smx:INFO:	List of broken channels: []
11:26:48:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1159.654860 mV
11:26:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:48:ST3_smx:INFO:		Electrons
11:26:48:ST3_smx:INFO:	# loops 0
11:26:49:ST3_smx:INFO:	# loops 1
11:26:51:ST3_smx:INFO:	# loops 2
11:26:53:ST3_smx:INFO:	Total # of broken channels: 0
11:26:53:ST3_smx:INFO:	List of broken channels: []
11:26:53:ST3_smx:INFO:	Total # of broken channels: 0
11:26:53:ST3_smx:INFO:	List of broken channels: []
11:26:54:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1195.082160 mV
11:26:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:26:54:ST3_smx:INFO:		Electrons
11:26:54:ST3_smx:INFO:	# loops 0
11:26:56:ST3_smx:INFO:	# loops 1
11:26:58:ST3_smx:INFO:	# loops 2
11:26:59:ST3_smx:INFO:	Total # of broken channels: 0
11:26:59:ST3_smx:INFO:	List of broken channels: []
11:26:59:ST3_smx:INFO:	Total # of broken channels: 0
11:26:59:ST3_smx:INFO:	List of broken channels: []
11:27:01:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1159.654860 mV
11:27:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:27:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:27:01:ST3_smx:INFO:		Electrons
11:27:01:ST3_smx:INFO:	# loops 0
11:27:03:ST3_smx:INFO:	# loops 1
11:27:04:ST3_smx:INFO:	# loops 2
11:27:06:ST3_smx:INFO:	Total # of broken channels: 0
11:27:06:ST3_smx:INFO:	List of broken channels: []
11:27:06:ST3_smx:INFO:	Total # of broken channels: 0
11:27:06:ST3_smx:INFO:	List of broken channels: []
11:27:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:27:07:febtest:INFO:	23-00 | XA-000-09-004-007-006-013-11 |  47.3 | 1183.3
11:27:07:febtest:INFO:	30-01 | XA-000-09-004-007-006-014-11 |  47.3 | 1171.5
11:27:07:febtest:INFO:	21-02 | XA-000-09-004-007-004-012-08 |  34.6 | 1224.5
11:27:07:febtest:INFO:	28-03 | XA-000-09-004-007-005-013-05 |  34.6 | 1224.5
11:27:08:febtest:INFO:	19-04 | XA-000-09-004-006-011-002-04 |  56.8 | 1135.9
11:27:08:febtest:INFO:	26-05 | XA-000-09-004-006-011-004-04 |  47.3 | 1183.3
11:27:08:febtest:INFO:	17-06 | XA-000-09-004-007-005-012-05 |  34.6 | 1218.6
11:27:08:febtest:INFO:	24-07 | XA-000-09-004-007-004-013-08 |  47.3 | 1247.9
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_20-11_25_42
OPERATOR  : Oleksandr S.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2268| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5620', '1.848', '2.3480']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0280', '1.850', '2.5870']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.5239']