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FEB_2270 03.02.25 10:27:37
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10:27:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:27:37:ST3_Shared:INFO: FEB-Sensor
10:27:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:27:48:ST3_ModuleSelector:DEBUG: M4UR3T0011310A2
10:27:48:ST3_ModuleSelector:DEBUG: L4UR301131
10:27:48:ST3_ModuleSelector:DEBUG: 08362
10:27:48:ST3_ModuleSelector:DEBUG: 62x42
10:27:48:ST3_ModuleSelector:DEBUG: A
10:27:48:ST3_ModuleSelector:DEBUG: M4UR3T0011310A2
10:27:48:ST3_ModuleSelector:DEBUG: L4UR301131
10:27:48:ST3_ModuleSelector:DEBUG: 08362
10:27:48:ST3_ModuleSelector:DEBUG: 62x42
10:27:48:ST3_ModuleSelector:DEBUG: A
10:28:07:ST3_ModuleSelector:INFO: M4UR3T0011310A2
10:28:07:ST3_ModuleSelector:INFO: 08362
10:28:07:febtest:INFO: Testing FEB with SN 2270
10:28:08:smx_tester:INFO: Scanning setup
10:28:08:elinks:INFO: Disabling clock on downlink 0
10:28:08:elinks:INFO: Disabling clock on downlink 1
10:28:08:elinks:INFO: Disabling clock on downlink 2
10:28:08:elinks:INFO: Disabling clock on downlink 3
10:28:08:elinks:INFO: Disabling clock on downlink 4
10:28:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:28:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:09:elinks:INFO: Disabling clock on downlink 0
10:28:09:elinks:INFO: Disabling clock on downlink 1
10:28:09:elinks:INFO: Disabling clock on downlink 2
10:28:09:elinks:INFO: Disabling clock on downlink 3
10:28:09:elinks:INFO: Disabling clock on downlink 4
10:28:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:28:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:09:elinks:INFO: Disabling clock on downlink 0
10:28:09:elinks:INFO: Disabling clock on downlink 1
10:28:09:elinks:INFO: Disabling clock on downlink 2
10:28:09:elinks:INFO: Disabling clock on downlink 3
10:28:09:elinks:INFO: Disabling clock on downlink 4
10:28:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:28:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:28:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:09:elinks:INFO: Disabling clock on downlink 0
10:28:09:elinks:INFO: Disabling clock on downlink 1
10:28:09:elinks:INFO: Disabling clock on downlink 2
10:28:09:elinks:INFO: Disabling clock on downlink 3
10:28:09:elinks:INFO: Disabling clock on downlink 4
10:28:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:28:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:28:09:elinks:INFO: Disabling clock on downlink 0
10:28:09:elinks:INFO: Disabling clock on downlink 1
10:28:09:elinks:INFO: Disabling clock on downlink 2
10:28:09:elinks:INFO: Disabling clock on downlink 3
10:28:09:elinks:INFO: Disabling clock on downlink 4
10:28:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:28:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:28:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:28:09:setup_element:INFO: Scanning clock phase
10:28:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:10:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:28:10:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:28:10:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:28:10:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:28:10:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:28:10:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
==============================================OOO==============================================
10:28:10:setup_element:INFO: Scanning data phases
10:28:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:15:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:28:15:setup_element:INFO: Eye window for uplink 16: _XXXX___________________________________
Data delay found: 22
10:28:15:setup_element:INFO: Eye window for uplink 17: XXXX___________________________________X
Data delay found: 21
10:28:15:setup_element:INFO: Eye window for uplink 18: _XXXXXX_________________________________
Data delay found: 23
10:28:15:setup_element:INFO: Eye window for uplink 19: __XXXXXX________________________________
Data delay found: 24
10:28:15:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________
Data delay found: 22
10:28:15:setup_element:INFO: Eye window for uplink 21: _XXXXXX_________________________________
Data delay found: 23
10:28:15:setup_element:INFO: Eye window for uplink 22: __XXXXX_________________________________
Data delay found: 24
10:28:15:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
10:28:15:setup_element:INFO: Eye window for uplink 24: _____________XXXXXX_____________________
Data delay found: 35
10:28:15:setup_element:INFO: Eye window for uplink 25: _______________XXXXXX___________________
Data delay found: 37
10:28:15:setup_element:INFO: Eye window for uplink 26: ______________XXXXXX____________________
Data delay found: 36
10:28:15:setup_element:INFO: Eye window for uplink 27: ________________XXXXXX__________________
Data delay found: 38
10:28:15:setup_element:INFO: Eye window for uplink 28: ____________________XXXXXX______________
Data delay found: 2
10:28:15:setup_element:INFO: Eye window for uplink 29: ____________________XXXXXX______________
Data delay found: 2
10:28:15:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
10:28:15:setup_element:INFO: Eye window for uplink 31: __________________XXXXXX________________
Data delay found: 0
10:28:15:setup_element:INFO: Setting the data phase to 22 for uplink 16
10:28:15:setup_element:INFO: Setting the data phase to 21 for uplink 17
10:28:15:setup_element:INFO: Setting the data phase to 23 for uplink 18
10:28:15:setup_element:INFO: Setting the data phase to 24 for uplink 19
10:28:15:setup_element:INFO: Setting the data phase to 22 for uplink 20
10:28:15:setup_element:INFO: Setting the data phase to 23 for uplink 21
10:28:15:setup_element:INFO: Setting the data phase to 24 for uplink 22
10:28:15:setup_element:INFO: Setting the data phase to 23 for uplink 23
10:28:15:setup_element:INFO: Setting the data phase to 35 for uplink 24
10:28:15:setup_element:INFO: Setting the data phase to 37 for uplink 25
10:28:15:setup_element:INFO: Setting the data phase to 36 for uplink 26
10:28:15:setup_element:INFO: Setting the data phase to 38 for uplink 27
10:28:15:setup_element:INFO: Setting the data phase to 2 for uplink 28
10:28:15:setup_element:INFO: Setting the data phase to 2 for uplink 29
10:28:15:setup_element:INFO: Setting the data phase to 2 for uplink 30
10:28:15:setup_element:INFO: Setting the data phase to 0 for uplink 31
==============================================OOO==============================================
10:28:15:setup_element:INFO: Beginning SMX ASICs map scan
10:28:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:28:15:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:28:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:28:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:28:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:28:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:28:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:28:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:28:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:28:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:28:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:28:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:28:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:28:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:28:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:28:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:28:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:28:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:28:18:ST3_emu:INFO:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 16: _____________________________________________________________________XXXXXXX____
Uplink 17: _____________________________________________________________________XXXXXXX____
Uplink 18: _____________________________________________________________________XXXXXXXXX__
Uplink 19: _____________________________________________________________________XXXXXXXXX__
Uplink 20: _____________________________________________________________________XXXXXXXX___
Uplink 21: _____________________________________________________________________XXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _____________________________________________________________________XXXXXXXXX__
Uplink 31: _____________________________________________________________________XXXXXXXXX__
Data phase characteristics:
Uplink 16:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 17:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 18:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 19:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 20:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 21:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 22:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 23:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 24:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 25:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 26:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 27:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
Uplink 28:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 29:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 30:
Optimal Phase: 2
Window Length: 34
Eye Window: ____________________XXXXXX______________
Uplink 31:
Optimal Phase: 0
Window Length: 34
Eye Window: __________________XXXXXX________________
==============================================OOO==============================================
10:28:18:setup_element:INFO: Performing Elink synchronization
10:28:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:28:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:28:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:28:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
==============================================OOO==============================================
10:28:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:28:18:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:28:19:febtest:INFO: Init all SMX (CSA): 30
10:28:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:28:34:febtest:INFO: 23-00 | XA-000-09-004-006-013-004-01 | 34.6 | 1153.7
10:28:34:febtest:INFO: 30-01 | XA-000-09-004-006-013-003-01 | 47.3 | 1112.1
10:28:34:febtest:INFO: 21-02 | XA-000-09-004-007-004-018-15 | 40.9 | 1141.9
10:28:34:febtest:INFO: 28-03 | XA-000-09-004-007-005-017-02 | 40.9 | 1135.9
10:28:35:febtest:INFO: 19-04 | XA-000-09-004-006-013-005-01 | 47.3 | 1124.0
10:28:35:febtest:INFO: 26-05 | XA-000-09-004-006-014-003-15 | 53.6 | 1088.3
10:28:35:febtest:INFO: 17-06 | XA-000-09-004-006-011-003-04 | 53.6 | 1100.2
10:28:35:febtest:INFO: 24-07 | XA-000-09-004-007-004-019-15 | 40.9 | 1135.9
10:28:36:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:28:38:ST3_smx:INFO: chip: 23-0 34.556970 C 1165.571835 mV
10:28:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:38:ST3_smx:INFO: Electrons
10:28:38:ST3_smx:INFO: # loops 0
10:28:40:ST3_smx:INFO: # loops 1
10:28:42:ST3_smx:INFO: # loops 2
10:28:43:ST3_smx:INFO: # loops 3
10:28:45:ST3_smx:INFO: # loops 4
10:28:47:ST3_smx:INFO: Total # of broken channels: 0
10:28:47:ST3_smx:INFO: List of broken channels: []
10:28:47:ST3_smx:INFO: Total # of broken channels: 1
10:28:47:ST3_smx:INFO: List of broken channels: [125]
10:28:48:ST3_smx:INFO: chip: 30-1 47.250730 C 1124.048640 mV
10:28:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:48:ST3_smx:INFO: Electrons
10:28:48:ST3_smx:INFO: # loops 0
10:28:50:ST3_smx:INFO: # loops 1
10:28:52:ST3_smx:INFO: # loops 2
10:28:53:ST3_smx:INFO: # loops 3
10:28:55:ST3_smx:INFO: # loops 4
10:28:57:ST3_smx:INFO: Total # of broken channels: 1
10:28:57:ST3_smx:INFO: List of broken channels: [0]
10:28:57:ST3_smx:INFO: Total # of broken channels: 1
10:28:57:ST3_smx:INFO: List of broken channels: [0]
10:28:58:ST3_smx:INFO: chip: 21-2 40.898880 C 1153.732915 mV
10:28:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:28:58:ST3_smx:INFO: Electrons
10:28:58:ST3_smx:INFO: # loops 0
10:29:00:ST3_smx:INFO: # loops 1
10:29:02:ST3_smx:INFO: # loops 2
10:29:03:ST3_smx:INFO: # loops 3
10:29:05:ST3_smx:INFO: # loops 4
10:29:07:ST3_smx:INFO: Total # of broken channels: 0
10:29:07:ST3_smx:INFO: List of broken channels: []
10:29:07:ST3_smx:INFO: Total # of broken channels: 1
10:29:07:ST3_smx:INFO: List of broken channels: [121]
10:29:08:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV
10:29:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:08:ST3_smx:INFO: Electrons
10:29:08:ST3_smx:INFO: # loops 0
10:29:10:ST3_smx:INFO: # loops 1
10:29:12:ST3_smx:INFO: # loops 2
10:29:13:ST3_smx:INFO: # loops 3
10:29:15:ST3_smx:INFO: # loops 4
10:29:17:ST3_smx:INFO: Total # of broken channels: 0
10:29:17:ST3_smx:INFO: List of broken channels: []
10:29:17:ST3_smx:INFO: Total # of broken channels: 0
10:29:17:ST3_smx:INFO: List of broken channels: []
10:29:18:ST3_smx:INFO: chip: 19-4 47.250730 C 1135.937260 mV
10:29:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:18:ST3_smx:INFO: Electrons
10:29:18:ST3_smx:INFO: # loops 0
10:29:20:ST3_smx:INFO: # loops 1
10:29:21:ST3_smx:INFO: # loops 2
10:29:23:ST3_smx:INFO: # loops 3
10:29:25:ST3_smx:INFO: # loops 4
10:29:26:ST3_smx:INFO: Total # of broken channels: 0
10:29:26:ST3_smx:INFO: List of broken channels: []
10:29:26:ST3_smx:INFO: Total # of broken channels: 0
10:29:26:ST3_smx:INFO: List of broken channels: []
10:29:28:ST3_smx:INFO: chip: 26-5 53.612520 C 1106.178435 mV
10:29:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:28:ST3_smx:INFO: Electrons
10:29:28:ST3_smx:INFO: # loops 0
10:29:30:ST3_smx:INFO: # loops 1
10:29:31:ST3_smx:INFO: # loops 2
10:29:33:ST3_smx:INFO: # loops 3
10:29:35:ST3_smx:INFO: # loops 4
10:29:36:ST3_smx:INFO: Total # of broken channels: 0
10:29:36:ST3_smx:INFO: List of broken channels: []
10:29:36:ST3_smx:INFO: Total # of broken channels: 0
10:29:36:ST3_smx:INFO: List of broken channels: []
10:29:38:ST3_smx:INFO: chip: 17-6 56.797143 C 1106.178435 mV
10:29:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:38:ST3_smx:INFO: Electrons
10:29:38:ST3_smx:INFO: # loops 0
10:29:39:ST3_smx:INFO: # loops 1
10:29:41:ST3_smx:INFO: # loops 2
10:29:43:ST3_smx:INFO: # loops 3
10:29:44:ST3_smx:INFO: # loops 4
10:29:46:ST3_smx:INFO: Total # of broken channels: 0
10:29:46:ST3_smx:INFO: List of broken channels: []
10:29:46:ST3_smx:INFO: Total # of broken channels: 0
10:29:46:ST3_smx:INFO: List of broken channels: []
10:29:48:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV
10:29:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:29:48:ST3_smx:INFO: Electrons
10:29:48:ST3_smx:INFO: # loops 0
10:29:49:ST3_smx:INFO: # loops 1
10:29:51:ST3_smx:INFO: # loops 2
10:29:52:ST3_smx:INFO: # loops 3
10:29:54:ST3_smx:INFO: # loops 4
10:29:55:ST3_smx:INFO: Total # of broken channels: 0
10:29:55:ST3_smx:INFO: List of broken channels: []
10:29:55:ST3_smx:INFO: Total # of broken channels: 1
10:29:55:ST3_smx:INFO: List of broken channels: [121]
10:29:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:29:56:febtest:INFO: 23-00 | XA-000-09-004-006-013-004-01 | 37.7 | 1189.2
10:29:56:febtest:INFO: 30-01 | XA-000-09-004-006-013-003-01 | 47.3 | 1147.8
10:29:56:febtest:INFO: 21-02 | XA-000-09-004-007-004-018-15 | 44.1 | 1171.5
10:29:57:febtest:INFO: 28-03 | XA-000-09-004-007-005-017-02 | 40.9 | 1171.5
10:29:57:febtest:INFO: 19-04 | XA-000-09-004-006-013-005-01 | 47.3 | 1153.7
10:29:57:febtest:INFO: 26-05 | XA-000-09-004-006-014-003-15 | 53.6 | 1124.0
10:29:57:febtest:INFO: 17-06 | XA-000-09-004-006-011-003-04 | 56.8 | 1124.0
10:29:58:febtest:INFO: 24-07 | XA-000-09-004-007-004-019-15 | 44.1 | 1171.5
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_03-10_27_37
OPERATOR : Alois Alzheimer
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2270| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
AMP_MODE : STS
------------------------------------------------------------
SENSOR_NAME: 08362 | SIZE: 62x42 | GRADE: A
MODULE_NAME: M4UR3T0011310A2
LADDER_NAME: L4UR301131
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5320', '1.848', '2.1150']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0210', '1.850', '2.5950']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '0.5302']