
FEB_2271 22.11.24 09:39:31
TextEdit.txt
09:39:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:39:31:ST3_Shared:INFO: FEB-ASIC 09:39:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:39:31:febtest:INFO: Testing FEB with SN 2271 09:39:33:smx_tester:INFO: Scanning setup 09:39:33:elinks:INFO: Disabling clock on downlink 0 09:39:33:elinks:INFO: Disabling clock on downlink 1 09:39:33:elinks:INFO: Disabling clock on downlink 2 09:39:33:elinks:INFO: Disabling clock on downlink 3 09:39:33:elinks:INFO: Disabling clock on downlink 4 09:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:33:elinks:INFO: Disabling clock on downlink 0 09:39:33:elinks:INFO: Disabling clock on downlink 1 09:39:33:elinks:INFO: Disabling clock on downlink 2 09:39:33:elinks:INFO: Disabling clock on downlink 3 09:39:33:elinks:INFO: Disabling clock on downlink 4 09:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:33:elinks:INFO: Disabling clock on downlink 0 09:39:33:elinks:INFO: Disabling clock on downlink 1 09:39:33:elinks:INFO: Disabling clock on downlink 2 09:39:33:elinks:INFO: Disabling clock on downlink 3 09:39:33:elinks:INFO: Disabling clock on downlink 4 09:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:33:elinks:INFO: Disabling clock on downlink 0 09:39:33:elinks:INFO: Disabling clock on downlink 1 09:39:33:elinks:INFO: Disabling clock on downlink 2 09:39:33:elinks:INFO: Disabling clock on downlink 3 09:39:33:elinks:INFO: Disabling clock on downlink 4 09:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:33:elinks:INFO: Disabling clock on downlink 0 09:39:33:elinks:INFO: Disabling clock on downlink 1 09:39:33:elinks:INFO: Disabling clock on downlink 2 09:39:33:elinks:INFO: Disabling clock on downlink 3 09:39:33:elinks:INFO: Disabling clock on downlink 4 09:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection ==============================================OOO============================================== 09:39:33:setup_element:INFO: Scanning clock phase 09:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:34:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:39:34:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 20: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 21: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:39:34:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________ Clock Delay: 40 09:39:34:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________ Clock Delay: 40 09:39:34:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 09:39:34:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 09:39:34:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 ==============================================OOO============================================== 09:39:34:setup_element:INFO: Scanning data phases 09:39:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:39:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:39:39:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX Data delay found: 19 09:39:39:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX Data delay found: 17 09:39:39:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 09:39:39:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 09:39:39:setup_element:INFO: Eye window for uplink 20: XXX__________________________________XXX Data delay found: 19 09:39:39:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX Data delay found: 18 09:39:39:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________XX Data delay found: 20 09:39:39:setup_element:INFO: Eye window for uplink 23: XXXXXXX______________________________XXX Data delay found: 21 09:39:39:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________ Data delay found: 30 09:39:39:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________ Data delay found: 32 09:39:39:setup_element:INFO: Eye window for uplink 26: ___________XXXXXX_______________________ Data delay found: 33 09:39:39:setup_element:INFO: Eye window for uplink 27: ______________XXXXXXX___________________ Data delay found: 37 09:39:39:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________XXXXXXXX Data delay found: 24 09:39:39:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________XXXXXXXX Data delay found: 6 09:39:39:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 09:39:39:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________ Data delay found: 38 09:39:39:setup_element:INFO: Setting the data phase to 19 for uplink 16 09:39:39:setup_element:INFO: Setting the data phase to 17 for uplink 17 09:39:39:setup_element:INFO: Setting the data phase to 19 for uplink 18 09:39:39:setup_element:INFO: Setting the data phase to 17 for uplink 19 09:39:39:setup_element:INFO: Setting the data phase to 19 for uplink 20 09:39:39:setup_element:INFO: Setting the data phase to 18 for uplink 21 09:39:39:setup_element:INFO: Setting the data phase to 20 for uplink 22 09:39:39:setup_element:INFO: Setting the data phase to 21 for uplink 23 09:39:39:setup_element:INFO: Setting the data phase to 30 for uplink 24 09:39:39:setup_element:INFO: Setting the data phase to 32 for uplink 25 09:39:39:setup_element:INFO: Setting the data phase to 33 for uplink 26 09:39:39:setup_element:INFO: Setting the data phase to 37 for uplink 27 09:39:39:setup_element:INFO: Setting the data phase to 24 for uplink 28 09:39:39:setup_element:INFO: Setting the data phase to 6 for uplink 29 09:39:39:setup_element:INFO: Setting the data phase to 38 for uplink 30 09:39:39:setup_element:INFO: Setting the data phase to 38 for uplink 31 ==============================================OOO============================================== 09:39:39:setup_element:INFO: Beginning SMX ASICs map scan 09:39:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:39:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:39:39:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:39:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:39:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:39:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:39:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:39:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:39:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:39:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:39:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:39:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:39:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:39:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:39:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:39:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:39:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:39:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:39:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:39:42:ST3_emu:INFO: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 71 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXX___ Uplink 17: ______________________________________________________________________XXXXXXX___ Uplink 18: _____________________________________________________________________XXXXXXXXX__ Uplink 19: _____________________________________________________________________XXXXXXXXX__ Uplink 20: _____________________________________________________________________XXXXXXXXX__ Uplink 21: _____________________________________________________________________XXXXXXXXX__ Uplink 22: ______________________________________________________________________XXXXXXXX__ Uplink 23: ______________________________________________________________________XXXXXXXX__ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: ________________________________________________________________________________ Uplink 29: ________________________________________________________________________________ Uplink 30: ________________________________________________________________________________ Uplink 31: ________________________________________________________________________________ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 20: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 21: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 22: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 23: Optimal Phase: 21 Window Length: 30 Eye Window: XXXXXXX______________________________XXX Uplink 24: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 25: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 26: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 27: Optimal Phase: 37 Window Length: 33 Eye Window: ______________XXXXXXX___________________ Uplink 28: Optimal Phase: 24 Window Length: 14 Eye Window: ____________XXXXXX______________XXXXXXXX Uplink 29: Optimal Phase: 6 Window Length: 14 Eye Window: ______________XXXXXX____________XXXXXXXX Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ ==============================================OOO============================================== 09:39:42:setup_element:INFO: Performing Elink synchronization 09:39:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:39:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] ==============================================OOO============================================== 09:39:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:39:42:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ==============================================OOO============================================== |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:39:43:febtest:INFO: Init all SMX (CSA): 30 09:39:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:39:58:febtest:INFO: 23-00 | XA-000-09-004-017-015-022-00 | 37.7 | 1165.6 09:39:58:febtest:INFO: 30-01 | XA-000-09-004-017-011-027-06 | 28.2 | 1426.7 09:39:58:febtest:INFO: 21-02 | XA-000-09-004-017-013-016-03 | 28.2 | 1195.1 09:39:59:febtest:INFO: 28-03 | XA-000-09-004-017-010-024-11 | 37.7 | 1171.5 09:39:59:febtest:INFO: 19-04 | XA-000-09-004-017-004-015-05 | 40.9 | 1153.7 09:39:59:febtest:INFO: 26-05 | XA-000-09-004-017-002-016-07 | 15.6 | 1421.0 09:39:59:febtest:INFO: 17-06 | XA-000-09-004-017-015-024-00 | 31.4 | 1236.2 09:40:00:febtest:INFO: 24-07 | XA-000-09-004-017-012-027-14 | 44.1 | 1147.8 09:40:01:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:40:03:ST3_smx:INFO: chip: 23-0 34.556970 C 1183.292940 mV 09:40:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:03:ST3_smx:INFO: Electrons 09:40:03:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:05:ST3_smx:INFO: ----> Checking Analog response 09:40:05:ST3_smx:INFO: ----> Checking broken channels 09:40:05:ST3_smx:INFO: Total # broken ch: 0 09:40:05:ST3_smx:INFO: List FAST: [] 09:40:05:ST3_smx:INFO: List SLOW: [] 09:40:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:05:ST3_smx:INFO: Holes 09:40:05:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:08:ST3_smx:INFO: ----> Checking Analog response 09:40:08:ST3_smx:INFO: ----> Checking broken channels 09:40:08:ST3_smx:INFO: Total # broken ch: 0 09:40:08:ST3_smx:INFO: List FAST: [] 09:40:08:ST3_smx:INFO: List SLOW: [] 09:40:09:ST3_smx:INFO: chip: 30-1 28.225000 C 1578.532875 mV 09:40:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:09:ST3_smx:INFO: Electrons 09:40:09:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:12:ST3_smx:INFO: ----> Checking Analog response 09:40:12:ST3_smx:INFO: ----> Checking broken channels 09:40:12:ST3_smx:INFO: Total # broken ch: 0 09:40:12:ST3_smx:INFO: List FAST: [] 09:40:12:ST3_smx:INFO: List SLOW: [] 09:40:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:12:ST3_smx:INFO: Holes 09:40:12:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:14:ST3_smx:INFO: ----> Checking Analog response 09:40:14:ST3_smx:INFO: ----> Checking broken channels 09:40:15:ST3_smx:INFO: Total # broken ch: 0 09:40:15:ST3_smx:INFO: List FAST: [] 09:40:15:ST3_smx:INFO: List SLOW: [] 09:40:16:ST3_smx:INFO: chip: 21-2 28.225000 C 1206.851500 mV 09:40:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:16:ST3_smx:INFO: Electrons 09:40:16:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:18:ST3_smx:INFO: ----> Checking Analog response 09:40:18:ST3_smx:INFO: ----> Checking broken channels 09:40:19:ST3_smx:INFO: Total # broken ch: 0 09:40:19:ST3_smx:INFO: List FAST: [] 09:40:19:ST3_smx:INFO: List SLOW: [] 09:40:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:19:ST3_smx:INFO: Holes 09:40:19:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:21:ST3_smx:INFO: ----> Checking Analog response 09:40:21:ST3_smx:INFO: ----> Checking broken channels 09:40:21:ST3_smx:INFO: Total # broken ch: 0 09:40:21:ST3_smx:INFO: List FAST: [] 09:40:21:ST3_smx:INFO: List SLOW: [] 09:40:23:ST3_smx:INFO: chip: 28-3 37.726682 C 1189.190035 mV 09:40:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:23:ST3_smx:INFO: Electrons 09:40:23:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:25:ST3_smx:INFO: ----> Checking Analog response 09:40:25:ST3_smx:INFO: ----> Checking broken channels 09:40:25:ST3_smx:INFO: Total # broken ch: 0 09:40:25:ST3_smx:INFO: List FAST: [] 09:40:25:ST3_smx:INFO: List SLOW: [] 09:40:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:25:ST3_smx:INFO: Holes 09:40:25:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:28:ST3_smx:INFO: ----> Checking Analog response 09:40:28:ST3_smx:INFO: ----> Checking broken channels 09:40:28:ST3_smx:INFO: Total # broken ch: 0 09:40:28:ST3_smx:INFO: List FAST: [] 09:40:28:ST3_smx:INFO: List SLOW: [] 09:40:29:ST3_smx:INFO: chip: 19-4 40.898880 C 1165.571835 mV 09:40:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:29:ST3_smx:INFO: Electrons 09:40:29:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:32:ST3_smx:INFO: ----> Checking Analog response 09:40:32:ST3_smx:INFO: ----> Checking broken channels 09:40:32:ST3_smx:INFO: Total # broken ch: 0 09:40:32:ST3_smx:INFO: List FAST: [] 09:40:32:ST3_smx:INFO: List SLOW: [] 09:40:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:32:ST3_smx:INFO: Holes 09:40:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:34:ST3_smx:INFO: ----> Checking Analog response 09:40:34:ST3_smx:INFO: ----> Checking broken channels 09:40:35:ST3_smx:INFO: Total # broken ch: 0 09:40:35:ST3_smx:INFO: List FAST: [] 09:40:35:ST3_smx:INFO: List SLOW: [] 09:40:36:ST3_smx:INFO: chip: 26-5 15.590880 C 1578.532875 mV 09:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:36:ST3_smx:INFO: Electrons 09:40:36:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:38:ST3_smx:INFO: ----> Checking Analog response 09:40:38:ST3_smx:INFO: ----> Checking broken channels 09:40:39:ST3_smx:INFO: Total # broken ch: 0 09:40:39:ST3_smx:INFO: List FAST: [] 09:40:39:ST3_smx:INFO: List SLOW: [] 09:40:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:39:ST3_smx:INFO: Holes 09:40:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:41:ST3_smx:INFO: ----> Checking Analog response 09:40:41:ST3_smx:INFO: ----> Checking broken channels 09:40:41:ST3_smx:INFO: Total # broken ch: 0 09:40:41:ST3_smx:INFO: List FAST: [] 09:40:41:ST3_smx:INFO: List SLOW: [] 09:40:43:ST3_smx:INFO: chip: 17-6 31.389742 C 1259.567515 mV 09:40:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:43:ST3_smx:INFO: Electrons 09:40:43:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:45:ST3_smx:INFO: ----> Checking Analog response 09:40:45:ST3_smx:INFO: ----> Checking broken channels 09:40:45:ST3_smx:INFO: Total # broken ch: 0 09:40:45:ST3_smx:INFO: List FAST: [] 09:40:45:ST3_smx:INFO: List SLOW: [] 09:40:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:45:ST3_smx:INFO: Holes 09:40:45:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:48:ST3_smx:INFO: ----> Checking Analog response 09:40:48:ST3_smx:INFO: ----> Checking broken channels 09:40:48:ST3_smx:INFO: Total # broken ch: 0 09:40:48:ST3_smx:INFO: List FAST: [] 09:40:48:ST3_smx:INFO: List SLOW: [] 09:40:49:ST3_smx:INFO: chip: 24-7 44.073563 C 1159.654860 mV 09:40:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:49:ST3_smx:INFO: Electrons 09:40:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:52:ST3_smx:INFO: ----> Checking Analog response 09:40:52:ST3_smx:INFO: ----> Checking broken channels 09:40:52:ST3_smx:INFO: Total # broken ch: 0 09:40:52:ST3_smx:INFO: List FAST: [] 09:40:52:ST3_smx:INFO: List SLOW: [] 09:40:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:40:52:ST3_smx:INFO: Holes 09:40:52:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC 09:40:54:ST3_smx:INFO: ----> Checking Analog response 09:40:54:ST3_smx:INFO: ----> Checking broken channels 09:40:55:ST3_smx:INFO: Total # broken ch: 0 09:40:55:ST3_smx:INFO: List FAST: [] 09:40:55:ST3_smx:INFO: List SLOW: [] 09:40:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:40:55:febtest:INFO: 23-00 | XA-000-09-004-017-015-022-00 | 37.7 | 1201.0 09:40:55:febtest:INFO: 30-01 | XA-000-09-004-017-011-027-06 | 25.1 | 1578.5 09:40:55:febtest:INFO: 21-02 | XA-000-09-004-017-013-016-03 | 28.2 | 1230.3 09:40:56:febtest:INFO: 28-03 | XA-000-09-004-017-010-024-11 | 37.7 | 1230.3 09:40:56:febtest:INFO: 19-04 | XA-000-09-004-017-004-015-05 | 44.1 | 1183.3 09:40:56:febtest:INFO: 26-05 | XA-000-09-004-017-002-016-07 | 9.3 | 1578.5 09:40:56:febtest:INFO: 17-06 | XA-000-09-004-017-015-024-00 | 28.2 | 1561.8 09:40:56:febtest:INFO: 24-07 | XA-000-09-004-017-012-027-14 | 44.1 | 1171.5 {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-ASIC TEST_DATE : 24_11_22-09_39_31 OPERATOR : Oleksandr S.; SITE : GSI | SETUP : GSI_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 2271| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B AMP_MODE : STS ------------------------------------------------------------ MODULE_NAME ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4990', '1.848', '2.1910'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.850', '2.5550'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9730', '1.850', '0.5157']